JP3203889B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, a hybrid IC device, and other semiconductor devices, and more particularly, to a semiconductor device using a high-density wiring board in which a board wiring is provided immediately below a semiconductor chip. The present invention relates to an improvement in a board wiring structure for effectively preventing a break in a board wiring.

[0002]

2. Description of the Related Art With the recent increase in the mounting density of semiconductor chips on a substrate, there is an increasing demand for routing a substrate wiring directly under the semiconductor chips to be mounted.

For example, Japanese Patent Application Laid-Open No. Sho 59-125641 discloses that by wiring all terminals of an IC chip to external connection terminals arranged in a grid, it is possible to take out a large number of terminals at high density. A leadless chip carrier is described. When such an IC chip is mounted on a substrate, the substrate wiring is naturally routed immediately below the IC chip.

Japanese Patent Application Laid-Open No. 61-104868 discloses a method of connecting an electric element by connecting a wiring between a heating resistor and an electric element (driver IC) directly underneath the electric element and making a face-down connection. A thermal recording head capable of high-density mounting is described. In this heat-sensitive recording head, the lead-out wiring directly under the electric element (driver IC) is radially drawn out from the linear part at an appropriate angle, and is applied so that the wiring width becomes wider toward the tip. Thereby, short circuit between the wiring conductors and disconnection of the wiring conductors are prevented.

[0005]

As described above, if the substrate wiring is provided directly under a semiconductor chip such as an IC,
Certainly, the mounting density of these semiconductor chips is greatly improved.

In addition, as seen in the thermal recording head described in Japanese Patent Application Laid-Open No. 61-104868, the wiring width of the substrate wiring provided immediately below these semiconductor chips is increased as going toward the tip. Indeed, the disconnection of these wiring conductors is unlikely to occur.

However, in reality, when a large amount of heat is generated with the driving of these semiconductor devices, or when the semiconductor device is placed in an environment where there is a large difference in temperature between when the semiconductor device is stopped and when the device is driven, for example,
For example, a semiconductor chip made of a material such as Si
A large stress is generated due to a difference in thermal expansion coefficient from a substrate made of a material such as 2 O3. That is, due to the repetition of such heat generation and the like, a large stress is applied between the electrode portion electrically and physically connected to the terminals of the semiconductor chips on the substrate and the substrate wiring (lead wiring) drawn from the electrode portion. Will occur, and eventually
Breakage occurs between these electrode portions and the lead wires, resulting in a situation where electrical conduction cannot be achieved. This is the same as described above, even when the wiring width of the substrate wiring provided immediately below the semiconductor chip is increased toward the front end portion, and the generated stress causes breakage even in a part thereof. If they do (such breaks can extend to the substrate), they can quickly evolve and, in the worst case, not even maintain electrical continuity. As described above, although there is an inevitable problem in a semiconductor device using a high-density wiring substrate in which a substrate wiring is also provided directly below a semiconductor chip, conventionally, measures have been taken to cope with this problem. Had not been.

The present invention has been made in view of such circumstances, and provides a semiconductor device capable of favorably preventing disconnection of a substrate wiring provided immediately below a semiconductor chip even if the above-mentioned stress occurs. The purpose is to:

[0009]

In order to achieve the above object, according to the present invention, there is provided a semiconductor chip and a substrate on which the semiconductor chip is mounted, wherein the substrate is connected to each terminal of the mounted semiconductor chip. A semiconductor device, comprising: a plurality of electrode portions that are electrically and physically connected; and lead wires drawn out from these electrode portions, wherein a board wire is also provided directly under the semiconductor chip through the lead wires. The lead wires drawn from the electrode portions are arranged on the side of each of the electrode portions that is far from the center of the semiconductor chip to be mounted.

[0010]

In a semiconductor device in which a substrate wiring is also provided directly below the semiconductor chip, in a normal relation where the thermal expansion coefficient of the substrate is larger than that of the semiconductor chip,
Breakage of the substrate wiring occurs with a high probability on the side facing the center of the semiconductor chip mounted on the substrate when viewed from each electrode portion. This was discovered and confirmed by the inventor.

Therefore, as described above, if the lead wires drawn from the respective electrode portions are arranged on the sides of the electrode portions that are farther from the center of the semiconductor chip to be mounted, the above-described breakage can be achieved. Irrespective of whether it occurs or even extends to the substrate itself, it is possible to avoid only a situation in which electrical continuity cannot be established between the electrode portions and the lead wiring.

It is to be noted that the respective lead-out wirings are particularly arranged on an extension of a straight line connecting the center of each of the electrode portions and the center of the semiconductor chip to be mounted, that is, the center of each of the electrode portions. If the lead wires are pulled out from the electrode portion at an angle of 180 degrees that is exactly opposite when looking at the center of the semiconductor chip from the
It has been confirmed that it can almost certainly be avoided.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the principle of the present invention will be described. The above-described problem in a semiconductor device in which substrate wiring is also provided immediately below a semiconductor chip, that is, in a case where a large amount of heat is generated due to driving of the semiconductor device, or in an environment where there is a large difference in temperature between a pause and a drive. For example, when the stress was generated between the substrate electrode portion and the lead-out wiring due to the difference in the thermal expansion coefficient between the semiconductor chip and the substrate, as well as the stress caused by the stress, an experiment was performed. Led to the discovery of the following facts: That is, in a normal relationship where the thermal expansion coefficient of the substrate is larger than the thermal expansion coefficient of the semiconductor chip, the breakage of the substrate wiring is
When viewed from each electrode portion, it occurs with a high probability on the side facing the center of the semiconductor chip mounted on the same substrate.

FIG. 6 is a graph showing the relationship between the wire lead-out angle and the wire breakage rate when the chip center is viewed from the center of these electrode portions, based on the results of these experiments.

As shown in FIG. 6, the lead-out wiring drawn from each electrode portion toward the center of the semiconductor chip is disconnected with a probability of almost 100% due to the repetition of the cooling / heating cycle for the semiconductor device. I do. However, by changing the drawing direction, the probability of disconnection of the wiring is reduced, and in particular, the drawing wiring is drawn out of the electrode portion at an angle of 180 degrees which is exactly opposite to the center of the semiconductor chip from the center of each electrode portion. In such a case, such disconnection can be almost certainly avoided even if the cooling and heating cycle is repeated. That is, this means that if the lead wirings drawn out from the respective electrode portions are arranged on the sides of the electrode portions that are farther from the center of the semiconductor chip to be mounted, for example, the center of the semiconductor chip of the electrode portion may be provided. Regardless of whether the break occurs on the side or extends to the substrate itself, a situation in which electrical continuity is not established between the electrode portions and the lead-out wiring is preferably avoided. Means that

FIG. 1 shows an embodiment of a semiconductor device according to the present invention constructed based on such a principle. In the semiconductor device of this embodiment, a semiconductor chip 2 made of a flip chip IC or the like is placed on a substrate 1 made of a soda glass plate or the like.
(Shown by broken lines) are joined by soldering to form a desired semiconductor device.

For this reason, the electrode portions 3 are previously formed on the substrate 1 so as to face the respective terminal positions of the semiconductor chip 2, and the lead-outs drawn from the electrode portions 3 are formed in conjunction with the formation of the electrode portions 3. The wiring 4 and the substrate wiring 5 that is further routed on the substrate 1 from the lead wiring 4 are formed. Each of the electrode portion 3, the lead wiring 4, and the substrate wiring 5 is formed by depositing an appropriate thin-film metal on the substrate 1.
In addition, it is assumed to be formed into the shape shown in FIG. 1 by etching.

Here, in particular, the arrangement of the lead wires 4 with respect to the electrode portions 3, that is, the lead direction, as is clear from FIG. 1, shows the center of the electrode portions 3 and the semiconductor chip to be mounted. The direction is set to a direction in which a straight line extending from the center 6 of the semiconductor chip 2 to the center 6 of the semiconductor chip is viewed from the center of each of the electrode portions 3, which is exactly opposite to the angle of 180 degrees. As a result, the semiconductor chip 2 is
Even if the thermal cycle is repeated in the usage environment after being mounted on the above, disconnection of the lead-out wirings 4 can be almost certainly avoided based on the above-described principle.

FIG. 2 is an enlarged perspective view mainly showing the structure near the electrode portion 3 of the semiconductor device of this embodiment. In FIG. 2, the outer peripheral portion of the solder 7 for electrically and physically connecting the terminals of the semiconductor chip 2 and the electrode portions 3 formed on the substrate 1, in particular, the portion near the chip center 6 is an a portion, and Assuming that a portion farther from the chip center 6 is a portion b, the above-mentioned cooling and heating cycle particularly causes the above-mentioned a near the chip center 6 when the temperature changes from a high temperature to a low temperature.
The semiconductor chip 2 in the direction of cleaving it.
It has been confirmed that a maximum principal stress is generated due to a difference in thermal expansion coefficient between the substrate and the substrate 1.

Therefore, as in the semiconductor device of this embodiment, the lead-out wiring 4 is drawn out from the side of the part b far from the chip center 6, so that the breakage of the lead-out wiring 4 due to such stress is avoided. Become so. FIG. 3 shows the substrate wiring structure employed in the conventional semiconductor device in correspondence with FIG. 2, and as shown in FIG. In the case where the wiring 4 is provided, the above-mentioned stress surely causes a break CL in the lead wiring 4. In the worst case, such a break CL may be accompanied by breakage of the substrate 1 itself.

For reference, as a prototype of the semiconductor device of this embodiment, a soda glass plate (thermal expansion coefficient = 9.3)
× 10 ＾ −6 / ° C., where 表 す represents a power), as the semiconductor chip 2, a chip size of 12 × 5 mm,
Flip chip IC with 162 terminals (coefficient of thermal expansion = 3.
5 × 10 ＾ −6 / ° C., where ＾ represents a power) ・ These are joined by solder (Sn64%, Pb36%). ・ Electrode portion 3, lead-out wiring 4, and substrate on substrate 1. The thin film metal deposited to form the wiring 5 has a three-layer structure of Cr, Ni, and Au. The electrode part 3 is etched to a diameter of 200 μm, and the lead wiring 4 and the substrate wiring 5 are each etched to a line width of 50 μm. A semiconductor device was manufactured under the following conditions, and the heating and cooling cycle was repeated. As a result, no breakage of the lead-out wiring 4 was observed, and the electrical continuity was maintained well.

However, in the semiconductor device of this embodiment, the material of the substrate 1 is arbitrary, and other materials such as metal, resin,
Materials such as ceramic, glass and the like can be used as well. Normally, these materials used as the substrate 1 have a larger value than the thermal expansion coefficient of the semiconductor chip 2 to be mounted.

In the apparatus of the embodiment, the method of forming the electrode portions 3, the lead wires 4, and the substrate wires 5 on the substrate 1 and the wiring materials thereof are not limited to the above-mentioned examples, and are arbitrary. . Alternatively, for example, these wirings may be formed by plating, printing, or the like, and a glass-based or resin-based conductive paste may be used as the wiring material.

The material used for the solder is not limited to the above-mentioned Sn-based material, and any material may be used. There is no need to do this by attaching. That is, the bonding may be performed using a conductive adhesive, or the bonding may be realized using a material such as Sn, In, or An.

FIG. 4 shows another embodiment of the semiconductor device according to the present invention. That is, the apparatus of this embodiment is one in which the electrode portion 3 is formed by photolithography or the like after the insulating film 8 is formed on the substrate wire where the width of the lead wire 4 is sufficiently larger than the diameter of the electrode portion 3. It is. Also in this case, as is apparent from FIG. 4, the lead wiring 4 is drawn from the direction of extension of a straight line connecting the centers of the electrode portions 3 and the center 6 of the semiconductor chip (not shown here) to be mounted. It is arranged to be. Thus, even in the semiconductor device of this embodiment, even after the semiconductor chip is mounted on the substrate 1 and the cooling and heating cycle is repeated in the use environment, the disconnection of the lead wires 4 is performed based on the above principle. Will almost certainly be avoided.

FIG. 5 shows, for reference, a board wiring structure generally used in the prior art corresponding to the board wiring structure of the embodiment shown in FIG. As shown in FIG. 5, conventionally, the lead wiring 4 is often arranged in the direction of the center 6 of the semiconductor chip (not shown) as viewed from the electrode portion 3. Also, as in the example here, when the wiring width of the substrate wiring 5 including the lead wiring 4 is sufficiently larger than the diameter of the electrode part 3, these electrode parts 3 and the lead wiring 4 are not connected. Even if a large stress is generated due to the difference in the coefficient of thermal expansion between the semiconductor chip and the substrate during the above-described process, and even if a wiring crack (which may be accompanied by a substrate crack) occurs in the lead-out wiring 4, the wiring is immediately pulled out. Wiring 4
However, the possibility of disconnection is certainly low. However, once the wiring crack occurs in the lead-out wiring 4, the generated crack is rapidly developed by the stress that is maintained thereafter, and eventually the electrical continuity of the lead-out wiring 4 is completely reduced. Will hinder you. That is, even with such a substrate wiring structure, the disconnection of the lead-out wiring 4 cannot be essentially avoided.

In this respect, according to the substrate wiring structure of the apparatus of the embodiment shown in FIG. 4, even if a crack occurs on the side of the electrode portion 3 when the chip center 6 is viewed, the crack is caused by the electrode portion 3. There is no disconnection between the wire and the lead wire 4.

As described above, in the semiconductor device according to the present invention, the wiring width of the substrate wiring as shown in FIG.
It is also effective for a wiring structure sufficiently larger than the diameter of the wiring.

The above-mentioned phenomenon caused by the difference in the coefficient of thermal expansion between the semiconductor chip and the substrate becomes more remarkable as the chip size of the semiconductor chip mounted becomes larger. The significance of applying the present invention to the present invention is particularly significant.

Further, as shown in each of the above-described embodiments, the arrangement shape of each lead-out wiring 4 with respect to each electrode portion 3,
That is, the drawing direction is directly opposite to the extension direction of a straight line connecting the center of the electrode portions 3 and the center 6 of the semiconductor chip 2 to be mounted, that is, the center 6 of the semiconductor chip from the center of each electrode portion 180. By setting the direction to have a degree angle, the maximum effect as the semiconductor device according to the present invention can be obtained. However, according to FIG. 6, it is clear that the disconnection rate is greatly reduced even when the lead-out angle of the lead-out wiring 4 from the center of the electrode portion 3 to the chip center 6 is near 90 degrees. is there.
Therefore, the point is that the lead-out wirings drawn out from the respective electrode portions are related to the present invention as long as the conditions for disposing the electrode portions on the side farther from the center of the semiconductor chip to be mounted are satisfied. A sufficient effect as a semiconductor device can be obtained.

[0031]

As described above, according to the present invention, there is provided a semiconductor device in which a substrate wiring is also provided immediately below a semiconductor chip, wherein a coefficient of thermal expansion between the semiconductor chip and a substrate on which the semiconductor chip is mounted is provided. Therefore, even if stress due to the difference occurs, disconnection of the substrate wiring to be applied can be satisfactorily prevented.

[Brief description of the drawings]

FIG. 1 is a plan view showing a substrate wiring structure as one embodiment of a semiconductor device according to the present invention.

FIG. 2 is an enlarged perspective view showing a part of a substrate wiring structure of the semiconductor device of the embodiment.

FIG. 3 is a perspective sectional view corresponding to FIG. 2, showing a substrate wiring structure employed in a conventional semiconductor device.

FIG. 4 is a plan view showing a substrate wiring structure as another embodiment of the semiconductor device according to the present invention.

FIG. 5 is a plan view showing a substrate wiring structure employed in a conventional semiconductor device corresponding to the embodiment shown in FIG.

FIG. 6 is a graph showing a relationship between a wire lead-out angle and a wire breakage ratio when the chip center is viewed from the center of the electrode portion with respect to the wire breakage ratio of the electrode lead-out wires.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate (soda glass plate), 2 ... Semiconductor chip (flip chip IC), 3 ... Electrode part, 4 ... Lead-out wiring, 5
... board wiring, 6 ... chip center, 7 ... solder, 8 ... insulating film.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 23/12 H01L 21/60

Claims (2)

(57) [Claims] 1. A semiconductor device comprising: a semiconductor chip; and a substrate on which the semiconductor chip is mounted. The substrate includes a plurality of electrode portions electrically and physically connected to respective terminals of the mounted semiconductor chip. In a semiconductor device comprising lead wires drawn out from the electrode portions, and through which the substrate wires are also provided immediately below the semiconductor chip, the lead wires pulled out from each of the electrode portions are formed of the electrode portions, A semiconductor device, which is disposed on a side that is farther from a center of a semiconductor chip to be mounted. 2. The semiconductor device according to claim 1, wherein each of the lead wirings is provided on an extension of a straight line connecting a center of each of the electrode portions and a center of the mounted semiconductor chip.