JP3204380B2 - Automatic placement and routing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an automatic placement and routing method for a semiconductor integrated circuit, and more particularly to an automatic placement and routing method using terminal and routing prohibition information.

[0002]

2. Description of the Related Art At present, the layout design of an LSI (Large Scale Integrated Circuit) is increasing in scale, and is created using an automatic placement and routing program instead of manual design.

FIG. 3 is a block diagram showing this conventional example. In the automatic placement and routing program 6, three steps of placement, general wiring 3, and detailed wiring 4 are performed. First, the terminal having the terminal information in the block and the wiring prohibition information in the block, the wiring prohibition information 23, and the circuit connection information 1 are read. Next, the process proceeds to arrangement 2 based on the read information, and an optimal arrangement is performed in consideration of the connection between the blocks. Subsequently, the schematic wiring 3 determines the schematic path of the wiring connecting the blocks, and the detailed wiring 4 finally determines the wiring path connecting the blocks. The terminal and wiring prohibition information 23 is created from the layout pattern. There are several types of methods for providing the information of the terminal and wiring prohibition information 23.

FIG. 4 is a block diagram showing a comparison between a layout pattern and terminal and wiring prohibition information. As shown in this figure, the terminal and wiring prohibition information is, for example, a terminal and wiring prohibition information 13 that is equivalent in shape to the layout pattern 12.
And a terminal that limits the access point of the terminal, the wiring prohibition information 14, and the like. Layout pattern conceptual diagram 12
Are aluminum power supply terminal 17, aluminum ground terminal 21, P
It has a channel diffusion layer 18, an N-channel diffusion layer 20, a gate polysilicon layer 16, an aluminum input terminal 19, and an aluminum output terminal I5. The conceptual diagram of the terminal and wiring prohibition information which is equivalent in shape to the layout pattern is created from the conceptual diagram of the layout pattern 12. The terminal and wiring prohibition information conceptual diagram 14 in which the access points of the terminals are limited has the aluminum wiring prohibition 22 and is created from the layout pattern conceptual diagram 12.

[0005] Figure 5 is a diagram comparing the layout pattern and shape equivalent terminals, a wiring prohibition information, the terminal for limiting the access point terminal, and a wiring prohibition information. The terminal and the wiring prohibition information 13 whose shape is equivalent to the layout pattern and the wiring prohibition information 13 have a larger data amount than the terminal and the wiring prohibition information 14 whose terminal access points are limited. Although the processing time becomes longer, the number of access points of the terminals is large, so that the wiring property is good and the degree of integration can be increased. In addition, the terminal and wiring prohibition information 14 having a limited terminal access point have fewer access points than the terminal and wiring prohibition information 13 whose terminals and wiring prohibition information are equivalent in shape to the layout pattern, so that the wiring property is poor. Although the degree of integration is deteriorated, the processing time can be shortened because the amount of data is small.

As described above, in the conventional technology, the terminal and the wiring prohibition information to be used throughout all processes are previously selected, created, and provided depending on whether the processing time or the integration degree is to be taken.

[0007]

As described above, the degree of integration of LSIs is increasing with the evolution of processes. However, an increase in the degree of integration leads to an increase in the amount of data to be handled, resulting in an increase in processing time required for placement and routing. However, it is becoming a problem to take a long time to process the automatic placement and routing in a situation where there are many short-term development requests. Further, worsening the degree of integration leads to an increase in product cost, which can be fatal.

Accordingly, as the scale of LSIs has increased, it has become necessary to reduce the processing time without deteriorating the degree of integration.

SUMMARY OF THE INVENTION An object of the present invention is to provide an automatic placement and routing method in which the processing time for automatic placement and routing is reduced.

[0010]

In order to achieve the above object, an automatic placement and routing method according to the present invention reads circuit connection information, terminal and wiring prohibition information, performs placement, and performs a placement based on a placement result. In the automatic placement and routing method, which includes the steps of performing general wiring and performing detailed wiring using each wiring as actual data based on the result of the general wiring, the steps of performing placement and general wiring include:
Terminals with limited access points for terminals, wiring prohibition information
The step of performing detailed wiring using the access point
Edge that is geometrically equivalent to a layout pattern that does not limit the
This is characterized in that child and wiring prohibition information is used .

In addition, a plurality of types of terminals and wiring prohibition information are prepared in advance, and prior to execution of each of a step of arranging, a step of performing general wiring, and a step of performing detailed wiring, an optimum terminal, It is preferable to read the wiring prohibition information.

Further, it is preferable to generate and use optimal terminal and wiring prohibition information prior to execution of each of the step of arranging, the step of performing general wiring, and the step of performing detailed wiring.

Further, it is preferable that, for each step, information designating which is the optimum terminal and wiring prohibition information is read from a file, and the type of the optimum terminal and wiring prohibition information is selected.

It is preferable that the method further includes a step of determining whether it is necessary to convert the read terminal and wiring prohibition information based on information designating the optimum terminal and wiring prohibition information.

Further, it is preferable that the plurality of terminals and the wiring prohibition information include at least information extracted from only the wiring layer of the actual data, and information obtained by extracting only the terminals and setting the remaining portion as the wiring prohibition area.

In the automatic placement and routing method of the present invention, in particular, in an automatic placement and routing method for designing a semiconductor integrated circuit through several steps, it is necessary to select and use terminals and routing inhibition information used in each step. Features.

As described above, by making it possible to select the terminal and the wiring prohibition information used in each step, it is possible to shorten the processing time without lowering the integration degree.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a first embodiment of the automatic placement and routing method according to the present invention.
FIG. 3 is a block diagram showing a configuration of the example. In the first embodiment, a plurality of terminals and wiring prohibition information are prepared in advance, and the plurality of terminals and wiring prohibition information are selected and used for each process.

First, the terminal and wiring prohibition information include terminals and wiring prohibition information 8 that are equivalent in shape to the layout pattern, and terminals and wiring prohibition information 9 that limit the access points of the terminals.
And terminal information used in each step and instruction information 7 of wiring prohibition information
Are prepared in advance. Next, the circuit connection information 1 is input, and the layout 2 is entered. In the arrangement 2, only the terminal information is required. Therefore, the terminal for which the access point of the terminal with a short processing time is limited, the terminal to select the wiring prohibition information 9 in advance, and the terminal used in each step for the selection 5 of the wiring prohibition information, It is given as instruction information 7 of the wiring prohibition information. After that, the arrangement 2 is executed by using the terminal for which the access point of the terminal is limited and the wiring prohibition information 9, and then the general wiring 3 is entered. Schematic wiring 3
In this case, approximate terminal position information is required. For this reason, also in this case, the terminal for which the access point of the terminal having the short read time and the short processing time is limited, the terminal to be used in each step in the selection of the terminal and the wiring prohibition information 6 so as to select the wiring prohibition information 9 and the instruction of the wiring prohibition information Information 7 is provided.
Thereafter, the general wiring processing 3 is executed using the terminal for which the access point of the terminal is limited and the wiring prohibition information 9, and then the detailed wiring 4 is entered. In the detailed wiring 4, the final wiring route is determined, so that the terminals and the wiring prohibition information are terminals whose shapes are equivalent to the layout pattern to improve the accessibility.
In order to select the wiring prohibition information 8, the terminal and the wiring prohibition information selection 5 are given in advance as the terminal used in each step and the instruction information 7 of the wiring prohibition information, and the detailed wiring 4 is executed. In addition, the method of selecting the terminal and the wiring prohibition information can be uniquely determined as described above, and can be selected artificially.

FIG. 2 shows a second embodiment of the automatic placement and routing method according to the present invention.
FIG. 3 is a block diagram showing an embodiment. In the second embodiment, the terminal and wiring prohibition information used in each process are converted and automatically generated as needed based on a certain type of terminal and wiring prohibition information.

First, terminals and wiring prohibition information 8 whose terminals and wiring prohibition information are equivalent in shape to the layout pattern, and instruction information 7 of terminals and wiring prohibition information used in each step are prepared in advance. Next, circuit connection information 1 is input, and the process of arrangement 2 is started. Here, a selection 10 is made as to whether or not to execute the conversion of the terminal used in the arrangement 2 and the wiring prohibition information.
In the arrangement 2, only the terminal information is required, so that the terminals that limit the access points of the terminals with a short read time,
The wiring prohibition information 9 is suitable. For this reason, the terminal used in each step and the instruction information 7 of the wiring prohibition information are given so as to convert the terminal and the wiring prohibition information 9 so as to convert the access point of the terminal into the limited terminal and the wiring prohibition information 9. Is executed, the terminal and wiring prohibition information 8 which are geometrically equivalent to the layout pattern are converted into the terminal and wiring prohibition information 9 which limit the access point of the terminal, and the arrangement 2 is executed using this. Subsequently, the general wiring 3 is entered.
Also in this case, a selection 10 is made as to whether or not to execute the conversion of the terminal used in the arrangement 2 and the wiring prohibition information. Schematic wiring 3
In this case, approximate terminal position information is required. For this reason, the terminal and the wiring prohibition information 9 that limit the access point of the terminal having the short reading time and the short processing time are also suitable here. For this reason, the terminal used in each step and the instruction information 7 of the wiring prohibition information are given so as to convert the terminal and the wiring prohibition information 9 so as to convert the access point of the terminal into the limited terminal and the wiring prohibition information 9. Is executed, the terminal and wiring prohibition information 8 which are equivalent in shape to the layout pattern are converted into the terminal and wiring prohibition information 9 which limit the access point of the terminal, and the schematic wiring 3 is executed using this. Subsequently, the detailed wiring 4 is entered. Also in this case, a selection 10 is made as to whether or not to execute the conversion of the terminal used in the arrangement 2 and the wiring prohibition information. Since the final wiring route is determined in the detailed wiring 4, terminals and wiring prohibition information 8 whose terminals and wiring prohibition information are equivalent in shape to the layout pattern are suitable for improving accessibility. Therefore, terminals and wiring prohibition information 8 that are geometrically equivalent to this layout pattern
Is given as instruction information 7 of the terminal and wiring prohibition information used in each process so that the conversion 11 of the terminal and wiring prohibition information is not executed, and the wiring prohibition information is equivalent in shape to the layout pattern. The detailed wiring 4 is executed by using the terminal and the wiring prohibition information 8.

[0023]

As described above, according to the automatic placement and routing method of the present invention, it is possible to select the terminal to be used in each step and the wiring prohibition information, thereby reducing the processing time without reducing the degree of integration. Can be shortened. Experimental results show that the processing time can be reduced by almost 10% in the present invention, compared to the case of using terminals and wiring prohibition information that are geometrically equivalent to the layout pattern, although the results differ depending on the scale of the LSI. it can.

Further, it is possible to select the terminal and the wiring prohibition information according to the purpose, such as giving priority to the processing time or the degree of integration.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of the tree invention.

FIG. 2 is a block diagram showing a configuration of a second embodiment of the tree invention.

FIG. 3 is a block diagram showing a configuration of a conventional example.

FIG. 4 is a diagram comparing a layout pattern with terminal and wiring prohibition information.

FIG. 5 is a diagram comparing terminals and wiring prohibition information that are equivalent in shape to a layout pattern with terminals and wiring prohibition information for which access points of terminals are limited.

[Explanation of symbols]

1 Circuit connection information 2 Arrangement 3 Schematic wiring 4 Detailed wiring 5 Selection of terminal and wiring prohibition information 6 Automatic placement and wiring program 7 Terminals used in each process, instruction information of wiring prohibition information 8 Terminals equivalent in shape to layout pattern Wiring prohibition information 9 Terminals with limited access points for terminals, wiring prohibition information 10 Conversion processing execution selection 11 Terminal and wiring prohibition information conversion 12 Layout pattern conceptual diagram 13 Terminals that are geometrically equivalent to the layout pattern, wiring prohibition information concept FIG. 14 Conceptual diagram of terminal and wiring prohibition information with terminal access points limited 15 Aluminum output terminal 16 Gate polysilicon layer 17 Aluminum power supply terminal 18 P channel diffusion layer 19 Aluminum input terminal 20 N channel diffusion layer 21 Aluminum ground terminal 22 Aluminum wiring prohibition 23 Terminal and wiring prohibition information

Claims (1)

(57) [Claims] A step of reading circuit connection information and terminals and wiring prohibition information and arranging them; a step of performing general wiring based on a result of the arrangement; and a step of performing each wiring based on a result of the general wiring. in the automatic placement and routing method comprising the steps of performing a detailed routing to actual data, the step of performing step and the schematic wiring for performing the arrangement, the terminal for limiting the access point terminal, distribution
The step of performing the detailed wiring using the line prohibition information includes:
Layout pattern that does not limit the access point
An automatic placement and routing method, characterized by using terminal and wiring prohibition information which are geometrically equivalent to the above .