JP3205488B2 - Jig for heat treatment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat treatment jig, and more particularly to a heat treatment jig most suitable for heat treatment of a semiconductor wafer.

[0002]

2. Description of the Related Art A semiconductor wafer such as a silicon wafer is mounted on a furnace core tube via a boat or the like, and is subjected to a heat treatment in an atmosphere of a processing gas introduced into the furnace core tube. There are horizontal and vertical heat treatment furnaces, but in recent years, vertical heat treatment furnaces capable of treating a large number of wafers have been used in many cases.

Conventionally, the furnace core tube, boat, and other jigs for heat treatment that constitute the heat treatment furnace are often formed of quartz glass.

[0004]

[SUMMARY OF THE INVENTION However, the heat treatment jig made of these quartz glasses, typically 10 ^{0 -} 10
Contains metal impurities such as iron and copper in the order of ^-2 ppm. For this reason, when the heat treatment jig is etched with the processing gas introduced into the furnace, metal impurities or reaction products of the processing gas and the metal impurities are mixed into the processing gas, and the quality of the wafer to be processed is reduced. There was a problem of lowering.

Further, quartz glass furnace core tubes and quartz glass boats are inferior in thermal shock resistance, making it difficult to raise and lower the temperature at a high speed, and fail to improve the processing efficiency of the wafer.

In view of the above-mentioned problems of the prior art, the present invention enables high-speed heating and cooling in a heat treatment sequence, and allows impurities contained in the process gas and the process gas to pass through a heat treatment jig. An object of the present invention is to maintain a high-purity processing atmosphere and to produce a high-quality wafer by accurately trapping impurities that may be mixed. Further, according to the present invention, a getter layer (dislocation layer) of an impurity can be removed by etching with hydrofluoric nitric acid or the like, and a dislocation layer can be formed again.
It is an object of the present invention to provide a heat treatment jig capable of maintaining the getter ability of the heat treatment jig for a long time.

[0007]

An embodiment of the present invention will be described.
When shown, the jig for heat treatment according to each of claims 1 to 5
There is .

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic view showing a furnace core tube 4 and a boat 2 which are one example of a heat treatment jig of the present invention. A semiconductor wafer 3 is set on the boat 2. FIG. 2 is a sectional view thereof.

The furnace core tube 4 is formed by hollowing out a silicon single crystal pulled up by the Czochralski method, and forming it into a cylindrical shape as a whole. A gas inlet 5 is attached to the upper part of the furnace core tube 4, and a gas outlet 6 is attached to the bottom.
The gas inlet 5 and the gas outlet 6 are formed as separate members, but are made of single-crystal silicon including dislocations similarly to the furnace core tube 4.

The core tube 4 made of single crystal silicon has dislocations formed therein, and the dislocations are used to trap impurities such as heavy metals. In the embodiment of FIG. 1, dislocations are formed so as to be dispersed throughout the furnace core tube, and the dislocation density of the dislocations is 10 ³ / cm ² or more. By forming a dislocation portion with such a dislocation density, it is possible to reliably prevent trapped impurities from leaking during heat treatment.

When the dislocation density is less than 10 ³ / cm ² , impurities cannot be effectively trapped.

From such a viewpoint, in order to obtain a more reliable trapping effect , the dislocation density is set to 10 ⁵ to 10 ⁶ /
It is preferably set in the range of cm ² .

[0013] With respect to the distribution of dislocations part, dislocation
The portions are preferably distributed substantially uniformly throughout the single crystal silicon, but may be somewhat biased.

The dislocations of single crystal silicon can be formed by applying a thermal stress or performing sand blasting to create a stress field in single crystal silicon. As an example of a method of applying thermal stress, dislocations can be formed in single-crystal silicon by performing a heat treatment of rapidly raising and lowering the temperature in a predetermined temperature range.

A method for controlling the dislocation density is as follows. By adjusting the degree of the stress field created in single-crystal silicon, dislocations can be formed at a desired density.

Incidentally, as long as a stress field can be created in the single crystal silicon, dislocations can be formed by a method other than thermal stress or sandblasting, for example, a method such as grinding. .

In FIG. 1, the boat 2 is also formed of the same material as the furnace core tube 4. That is, the boat 2 is also formed of monocrystalline silicon having a dislocation portion <br/>, it has a structure to trap impurities in dislocation portion. The dislocation density is the same as that of the furnace core tube 4.

Next, another embodiment of the present invention will be described with reference to FIGS.

In the furnace core tube 4 of FIG. 3, a dislocation layer 16 is formed inside the furnace core tube 4 made of single crystal silicon.
Other portions are dislocation-free crystal portions 15. As described above, the dislocation layer 16 may be formed on a part of the surface of the heat treatment jig, and impurities may be trapped by the dislocation layer 16.

The dislocation density in the dislocation layer 16 is preferably adjusted within the range mentioned in <br/> embodiment of FIG. However, in this case, since dislocations are formed intensively as a “layer”, a more preferable dislocation density is 10 ⁵ to 10 ⁶
Pieces / cm ² .

The thickness of the dislocation layer 16 is preferably 20 to
It is 200 μm. The reason is that if the thickness of the dislocation layer 16 is less than 20 μm, leakage of trap impurities cannot be prevented reliably, and if it exceeds 200 μm, the cost increases due to excessive formation.

A dislocation layer 1 is placed in a furnace core tube 4 made of single crystal silicon.
A method for forming 6 will be described. In this case, the stress field may be formed only in a predetermined portion of the single crystal silicon body, that is, only in the inner layer portion. For that purpose, the sandblast method is effective. In another method, a method such as grinding can be used.

In the embodiment shown in FIG. 4, a reinforcing layer 17 is formed outside the furnace core tube 4 shown in FIG. The reinforcing layer 17 can be formed by CVD coating of quartz glass or SiC.

The thickness of the reinforcing layer 17 is preferably 0.1 to
Make it about 5 mm. The reason is that if the thickness is less than 0.1 mm, the reinforcement is not sufficient, and if the thickness exceeds 5 mm, the residual stress at the interface increases, and the possibility of separation between the two increases.

[0025] Here, the semiconductor wafer having a diameter of 150 mm, placed on the single crystal silicon boat including dislocation portion, which was inserted into the furnace core tube made of single crystal silicon containing dislocations unit (Figure 1 , 2), and the following heat treatment was applied to the semiconductor wafer. Thereafter, the wafer was subjected to impurity analysis to examine the surface state.

In the heat treatment, hydrogen gas is used as a processing gas for 20 hours.
The run was performed at a temperature of 1200 ° C. for 60 minutes at a flow rate of liter / minute.

The impurity analysis of the wafer and the evaluation of the surface state were performed on the wafer set at the center of the boat using a commercially available ICP analyzer and LST (light scattering measurement) apparatus. Table 1 shows the results.

For comparison, the same heat treatment was carried out using a conventional quartz glass furnace core tube and quartz glass boat.
The impurity analysis and the evaluation of the surface state were performed in the same procedure. Table 1 also shows the results.

As can be seen from Table 1, when the heat treatment is performed using the furnace tube and the boat according to the embodiment of the present invention, an excellent surface state with few impurities can be realized.

On the other hand, when the same heat treatment was performed using a furnace tube and a boat having a CVD-SiC reinforcing layer formed on the outside, almost the same results were obtained.

[0031]

[Table 1]

[0032]

According to the jig for heat treatment of the present invention, since the jig itself hardly reacts with the processing gas during heat treatment, for example, a reaction product containing water is not generated. As a result, a high-purity processing atmosphere can be maintained, and a high-quality wafer with a good surface state can be manufactured.

Further, according to the jig for heat treatment of the present invention,
Impurities in the processing atmosphere or impurities that might be mixed into the processing gas via the heat treatment jig were formed on the jig.
Trapping can be reliably performed at dislocations . For this reason, the processing atmosphere can be maintained at a higher purity, and a wafer of higher quality can be manufactured.

When the heat treatment jig of the present invention is used, the temperature can be rapidly raised and lowered in the heat treatment sequence. Therefore, heat treatment can be performed efficiently and in an optimal sequence.

The impurities trapped in the dislocations are:
It can be removed by etching with a solution such as hydrofluoric-nitric acid or baking in a hydrochloric acid gas or the like.

In addition, the decrease in the impurity gettering ability of the dislocation layer due to the long-term use of the heat treatment jig is performed by removing the dislocation layer saturated with impurities by etching with hydrofluoric nitric acid or the like and forming the dislocation layer again. As a result, the life of the heat treatment jig is extended, and a high-quality wafer can be manufactured more stably.

[Brief description of the drawings]

FIG. 1 is a conceptual view showing a furnace core tube and a boat as an example of a heat treatment jig of the present invention.

FIG. 2 is a schematic sectional view showing the furnace core tube and the boat shown in FIG.

FIG. 3 is a diagram corresponding to FIG. 2 of another embodiment.

FIG. 4 is a view corresponding to FIG. 2 of still another embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 wafer 2 boat 3 semiconductor wafer 4 furnace core tube 5 gas inlet 6 gas outlet 15 non-dislocation crystal part 16 dislocation layer 17 reinforcing layer

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/68 H01L 21/22 H01L 21/324

Claims (5)

(57) [Claims] 1. A single-crystal silicon single-crystal silicon substrate.
Dislocation density of crystalline silicon is 10 ³ / cm ² or more
A jig for heat treatment , characterized in that: 2. A single-crystal silicon single crystal silicon substrate.
Crystal silicon has a dislocation layer and dislocation density
The degree is 10 ³ to 10 ⁷ pieces / cm ² , and other parts
Is a heat treatment jig characterized by being a dislocation-free crystal . 3. The thickness of a dislocation layer is 20 to 200 μm.
The heat treatment jig according to claim 2 , wherein: 4. A reinforcing layer made of quartz glass or SiC.
That at least a part of the heat treatment jig surface
The heat treatment jig according to any one of claims 1 to 3, wherein 5. A dislocation density of 10 ⁵ to 10 ⁶ / cm ² .
The jig for heat treatment according to any one of claims 1 to 4, wherein the jig is provided.