JP3207075B2 - Package for storing semiconductor elements - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, a package for accommodating a semiconductor element, in particular, a glass-encapsulated semiconductor element accommodating package sealed by welding glass is made of an electrically insulating material such as an aluminum oxide sintered body. A base having a mounting portion on which the semiconductor element is mounted in the center, and a sealing glass layer adhered to the outer periphery of the upper surface, and an electric insulating material such as an aluminum oxide sintered body, It is composed of a lid having a sealing glass layer attached to the outer periphery of the lower surface, and external lead terminals for electrically connecting a semiconductor element housed therein to an external electric circuit. The external lead terminals are temporarily fixed on the base by mounting the external lead terminals on the base and melting the glass layer for sealing previously applied, and then the semiconductor element is mounted on the semiconductor element mounting portion of the base. The electrodes of the semiconductor element (signal electrode, power supply electrode, ground electrode) are connected to external lead terminals via bonding wires, and then fixed to the substrate using an adhesive such as glass, resin, or brazing material. A glass layer for sealing in which a main body and a lid are adhered to each of the main surfaces opposed to each other is melted and integrated, and the container comprising the base and the lid is hermetically sealed to form a final product. As a semiconductor device.

Incidentally, such a conventional package for accommodating a semiconductor element is usually provided with a capacitance element in order to prevent the semiconductor element accommodated therein from being affected by fluctuations in the power supply voltage. In general, a capacitive element is added to a package for use by placing a multi-layered electrode inside a base made of an aluminum oxide sintered body or the like constituting a container, and providing a certain capacitance between the multi-layered electrodes by using an insulating base material as a dielectric. It is performed by forming or attaching a capacitive element made of barium titanate porcelain to the semiconductor element mounting portion of the base.

[0004]

However, in this conventional package for housing a semiconductor element, when the addition of a capacitive element is performed by arranging a multilayer electrode inside the base constituting the container, the base is not formed. Generally, it is made of an aluminum oxide sintered body, and the aluminum oxide sintered body has a low relative dielectric constant (relative dielectric constant 9 to 10: room temperature 1 MH).
z) Therefore, the capacitance formed between the multilayer electrodes is extremely small, and there is a disadvantage that a malfunction caused by a fluctuation in the power supply voltage to the semiconductor element cannot be completely prevented.

In order to solve this drawback, it is conceivable to increase the number of layers of the multilayer electrode and the area facing the electrodes to increase the capacitance formed between the multilayer electrodes. When the size of the semiconductor device is increased, the shape of the package itself becomes large, and when a semiconductor device is housed therein to form a semiconductor device, a disadvantage that the semiconductor device becomes extremely large is induced.

Further, when a capacitance element made of barium titanate porcelain is attached to the semiconductor element mounting portion of the base to add the capacitance element to the semiconductor element storage package,
Since barium titanate porcelain has a low thermal conductivity of 0.3 W / m · k, when a semiconductor element emits a large amount of heat during operation, the transfer of the heat to the outside is hindered by the barium titanate porcelain. In addition, the semiconductor element has a disadvantage that the semiconductor element is heated to a high temperature by the heat generated by the semiconductor element, and the semiconductor element is thermally destroyed or a characteristic change occurs, thereby causing the semiconductor element to malfunction.

[0007]

SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to provide a semiconductor device housing package which can stably operate a semiconductor device housed therein for a long time without malfunction. Is to do.

[0008]

SUMMARY OF THE INVENTION The present invention has a thermal conductivity of 55 nm.
From electric insulating material or metal material of up to 400W / m · K
Made, the semiconductor element is fixed via a direct mounted is a mounting portion, and a plurality of external lead terminals first glass layer each electrode is connected to the semiconductor element around the mounting portion on the upper surface A base and a lid having a second glass layer adhered to the outer peripheral portion of the lower surface, by heating and melting at least the second glass layer adhered to the lid, and joining the substrate and the lid. What is claimed is: 1. A package for housing a glass-sealed semiconductor device in which a semiconductor device is hermetically sealed therein, wherein said first and second glass layers are 50 to 60 layers of lead oxide.
%, Silicon oxide 1 to 5% by weight, boron oxide 3 to 13 times
%, Bismuth oxide 3 to 8% by weight as filler
10-20% by weight of cordierite, tin titanate compound
And a dielectric material having a relative dielectric constant of 1,000 to 20,000 between the upper surface of the base and the first glass layer for fixing the external lead terminals.
Capacitors formed by alternately laminating dielectric layers made of a material having a thickness of 20 to 100 μm are provided, and external leads connected to the power supply electrode and the ground electrode of the semiconductor element are provided on the electrode layers of the capacitor. The terminal is connected.

[0009]

According to the semiconductor device housing package of the present invention, an electric insulating material having a thermal conductivity of 55 to 400 W / m · K is also used.
Properly it consists of metallic material, having a mounting portion on which a semiconductor element is mounted directly on the upper surface, and a plurality of external lead terminals each electrode of the semiconductor element around the mounting portion is connected, via a first glass layer And a second base on the outer periphery of the lower surface.
A lid having a glass layer attached thereto, at least a second glass layer attached to the lid is heated and melted, and the base and the lid are joined to hermetically seal the semiconductor element therein. A glass-encapsulated semiconductor element housing package as described above , wherein the first and second glass layers are
50-60% by weight of lead oxide, 1-5% by weight of silicon oxide, oxidation
3 to 13% by weight of boron, 3 to 8% by weight of bismuth oxide
In addition, 10 to 20% by weight of cordierite as a filler,
Glass containing 10 to 20% by weight of tin titanate compound
And an electrode layer and a relative dielectric constant of 1,000 between the upper surface of the base and the first glass layer for fixing the external lead terminals.
20 to 100 μm thick made of ~ 20,000 dielectric material
A capacitor element formed by alternately laminating the dielectric layers of the semiconductor element and the external lead terminals connected to the power electrode and the ground electrode of the semiconductor element are connected to the electrode layer of the capacitor element. A capacitance element having a large capacitance is connected between the power supply electrode and the ground electrode of the element, and as a result, the capacitance of the capacitance element adversely affects the semiconductor element due to the fluctuation of the supply power supply voltage. Is effectively prevented, and the semiconductor element can be normally and stably operated for a long period of time.

Further, according to the package for accommodating a semiconductor element of the present invention, the semiconductor element is directly adhered and fixed to the semiconductor element mounting portion of the base, so that even if the semiconductor element generates a large amount of heat during operation, the heat is reduced. The semiconductor element is satisfactorily transmitted and radiated to the outside through the base. As a result, the semiconductor element does not become high in temperature due to the heat generated by the semiconductor element. Can operate normally and stably over a long period of time.

[0011]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 shows an embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is a base, and 2 is a lid. The base 1 and the lid 2 constitute a container 4 for housing the semiconductor element 3.

The substrate 1 is made of an aluminum oxide sintered body,
It is made of an electrical insulating material such as a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, or a metal material such as copper, copper-kovar metal (iron-nickel-cobalt alloy) -copper, and has a top center. The portion is provided with a concave mounting portion 1a on which the semiconductor element 3 is mounted, and the semiconductor element 3 is bonded and fixed to the concave mounting portion 1a via an adhesive such as glass, resin, or brazing material.

Since the semiconductor element 3 is directly adhered and fixed to the semiconductor element mounting portion 1a of the base 1, the semiconductor element 3
Generates a large amount of heat during operation, the heat is satisfactorily transmitted and radiated to the outside through the base. As a result, the semiconductor element 3 does not become high in temperature due to the heat generated by the semiconductor element 3, and the semiconductor element 3 does not become hot. The semiconductor element 3 can be normally and stably operated for a long period of time by effectively preventing thermal destruction and thermal change of characteristics of the semiconductor element 3.

In particular, the substrate 1 has a thermal conductivity of 55 to 250 W / m.
K sintered aluminum nitride, 200 to 400 W / m · K copper, copper-kovar metal (iron-nickel-cobalt alloy)
When the substrate 1 is formed of copper or the like, the base 1 can dissipate the heat generated by the semiconductor element 3 to the outside very efficiently, and the semiconductor element 3 can always be kept at a low temperature.

When the substrate 1 is made of, for example, an aluminum oxide sintered body, a raw material powder such as aluminum oxide, silicon oxide, magnesium oxide, or calcium oxide is pressed into a press mold corresponding to the shape of the substrate 1 shown in FIG. It is manufactured by filling the inside and molding by applying a constant pressure, and then firing the molded article at a temperature of about 1500 ° C.

An external lead terminal 5 is fixed to the outer peripheral portion of the upper surface of the base 1 via a first glass layer 6. The external lead terminal 5 is connected to each electrode (power supply electrode,
The ground electrode and the signal electrode are connected to an external electric circuit, and one end of each electrode of the semiconductor element 3 is connected via a bonding wire 9 and the other end is connected to an external electric circuit. .

The external lead terminal 5 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy.
For example, ingots of iron-nickel-cobalt alloys (
The lump is formed into a predetermined plate shape by applying a conventionally known metal working method such as a rolling method or a punching method.

The external lead terminals 5 are fixed to the outer peripheral portion of the upper surface of the base 1 via a first glass layer 6. The first glass layer 6 fixes the external lead terminals 5 on the base 1 and a container. 4 acts as a sealing material for hermetically sealing 4.

The first glass layer 6 comprises, for example, 50 to 60% by weight of lead oxide, 1 to 5% by weight of silicon oxide, 3 to 13% by weight of boron oxide, 3 to 8% by weight of bismuth oxide, and cordierite as a filler. A glass paste obtained by adding a suitable organic solvent and a solvent to the glass powder and mixing the glass powder with 10 to 20% by weight of tin and 10 to 20% by weight of a tin titanate compound. Is applied to the outer peripheral portion of the upper surface of the base 1 by a predetermined thickness by a screen printing method or the like, and is baked at a temperature of about 400 ° C. to be applied to the outer peripheral portion of the upper surface of the base 1, The external lead terminals 5 are fixed on the base 1 by mounting the external lead terminals 5 and re-melting the first glass layer 6.

The external lead terminal 5 fixed on the base 1 via the first glass layer 6 has nickel or nickel on its surface.
If a metal having good conductivity and excellent corrosion resistance made of gold or the like is layered to a thickness of 1 to 20 μm by a plating method, oxidative corrosion of the external lead terminals 5 can be effectively prevented, and the external lead terminals 5 Good electrical connection with an external electric circuit can be achieved. Therefore, the external lead terminal 5 has a surface of 1 to 20 μm by plating nickel, gold or the like on its surface.
It is preferable that the layer is layered to a thickness of.

Further, between the upper surface of the base 1 and the first glass layer 6, there is provided a capacitive element 7 formed by alternately laminating electrode layers 7a and dielectric layers 7b. Element 7
Is connected between the power supply electrode and the ground electrode of the semiconductor element 3 and acts so that the semiconductor element 3 is not adversely affected by fluctuations in the supply power supply voltage.

The electrode layer 7a constituting the capacitive element 7 is made of A
u, Ag, Ag-Pt, Ag-Pd and other metal materials, and the dielectric layer 7b is made of SrTiO ₃ , BaTiO ₃ , Pb (Mg _1/3 Nb _2/3 ) O ₃ , Pb
_{(Fe 1/2 Nb 1/2)} O 3 -Pb (Fe 2/3 W 1/3) being formed of a dielectric material O ₃ or the like, conventionally known vapor deposition method each material on the upper surface of the base body 1, It is formed by alternately applying layers by a thin film forming technique such as a sputtering method or an ion plating method or a thick film forming technique such as a screen printing method.

The capacitance element 7 forms a dielectric layer 7b.
SrTiO ₃ , BaTiO ₃ , Pb (Mg _1/3 Nb _2/3 ) O ₃ , Pb (Fe
_1/2 Nb _1/2 ) O ₃ -Pb (Fe _2/3 W _1/3 ) O ₃
Since it is as high as 000 to 20,000 (room temperature 1 MHz), the capacitance becomes a large value, which can effectively prevent the adverse effect on the semiconductor element 3 due to the fluctuation of the power supply voltage. For normal and stable operation.

The capacitance element 7 formed by alternately laminating the electrode layers 7a and the dielectric layers 7b has an electrode layer 7a for the base 1 and the dielectric layer 7b when the thickness of the electrode layer 7a is less than 2 μm. It is preferable that the thickness be 2 μm or more because the bonding strength of the electrode layer 7a decreases and the electrode layer 7a tends to peel off from the substrate 1 and the dielectric layer 7b. When the thickness of the dielectric layer 7b is less than 20 μm, It becomes difficult to maintain electrical insulation between the upper and lower electrode layers 7a,
If the thickness exceeds 100 μm, the capacitance value of the capacitance element 7 tends to decrease, so the thickness of the dielectric layer 7b is preferably set in the range of 20 to 100 μm.

Further, the external lead terminal 5 and the capacitive element 7
Is provided on the upper surface of the substrate 1, and the second glass layer 8 adhered to the lower surface of the lid 2 is optionally covered with the substrate 1.
The first glass layer 6 adhered to the upper surface of the semiconductor device 3 is joined by heating and melting, whereby the semiconductor element 3 is hermetically sealed inside the container 4 composed of the base 1 and the lid 2.

The lid 2 is made of the same material as the base 1, specifically, an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, or a silicon carbide sintered body. And a metal material such as copper, copper-kovar metal (iron-nickel-cobalt alloy) -copper, and is manufactured by the same method as the method of manufacturing the base 1.

The second glass layer 8 adhered to the lower surface of the lid 2 is made of, for example, the same low melting point glass material as the first glass layer 6 adhered to the upper surface of the base 1. It is attached to the lower surface of the lid 2 to a predetermined thickness by the same method as the glass layer 6.

Thus, according to the semiconductor element housing package of the present invention, the semiconductor element 3 is bonded and fixed to the concave semiconductor element mounting portion 1a of the base 1 via an adhesive such as glass, resin, brazing material or the like. Each electrode of the element 3 is connected to the external lead terminal 5 by a bonding wire 9. Thereafter, the base 1 and the lid 2 are covered with the second glass layer 8, which has been attached to the lid 2, if necessary. The semiconductor element 3 is hermetically sealed inside a container 4 composed of the base 1 and the lid 2 by heating and melting the first glass layer 6 adhered to the base 1 by bonding. Is completed.

[0029]

According to the package for housing a semiconductor element of the present invention, an electrical insulating material having a thermal conductivity of 55 to 400 W / m · K.
A semiconductor device is directly mounted on the upper surface, and a plurality of external lead terminals around which the respective electrodes of the semiconductor element are connected are provided on the upper surface.
A base body fixed via a glass layer, and a lid having a second glass layer adhered to the outer periphery of the lower surface, wherein at least the second glass layer adhered to the lid is heated and melted, A glass-sealed semiconductor element housing package in which a semiconductor element is hermetically sealed therein by bonding the first and second glasses to each other.
The layer is 50-60% lead oxide, 1-5% silicon oxide,
3 to 13% by weight of boron oxide, 3 to 8% by weight of bismuth oxide
% To 10 to 20% by weight of cordierite as filler
%, A tin titanate compound containing 10 to 20% by weight.
An electrode layer and a relative dielectric constant of 1,
000 to 20,000 dielectric material with thickness of 20 to 100μ
Since the capacitor element formed by alternately laminating the dielectric layers of m and m is provided, and the external lead terminals connected to the power electrode and the ground electrode of the semiconductor element are connected to the electrode layer of the capacitor element. A capacitance element having a large capacitance is connected between the power supply electrode and the ground electrode of the semiconductor element. As a result, the capacitance to the semiconductor element due to the fluctuation of the supply power supply voltage due to the capacitance of the capacitance element is increased. The adverse effects are effectively prevented, and the semiconductor element can be normally and stably operated for a long period of time.

Further, according to the package for accommodating a semiconductor element of the present invention, the semiconductor element is directly adhered and fixed to the semiconductor element mounting portion of the base. Therefore, even if the semiconductor element generates a large amount of heat during operation, the heat is reduced. The semiconductor element is satisfactorily transmitted and radiated to the outside through the base. As a result, the semiconductor element does not become high in temperature due to the heat generated by the semiconductor element. Can operate normally and stably over a long period of time.

It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. An external lead terminal 5 is formed on the first glass layer 6
However, an overcoat layer may be applied to the surface of the capacitor 7 in advance. In this case, since the capacitor 7 is protected by the overcoat layer, migration occurs in the electrode layer 7a of the capacitor 7,
The absorption of the electrode layer 7a by the first glass layer 6 is effectively prevented, and the capacitor 7 having a predetermined capacitance value can always be connected between the power supply electrode and the ground electrode of the semiconductor element 3. .

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Base 2 ... Lid 3 ... Semiconductor element 4 ... Container 5 ... External lead terminal 6 ... · First glass layer 7 ···· Capacitance element 7a ···· Electrode layer 7b ···· Dielectric layer 8 ······ Second glass layer

Claims (1)

(57) [Claims] An electric power having a thermal conductivity of 55 to 400 W / m · K.
A plurality of external lead terminals formed of a gas-insulating material or a metal material and having a mounting portion on the top surface on which the semiconductor element is directly mounted, and a plurality of external lead terminals connected to each electrode of the semiconductor element around the mounting portion; And a lid having a second glass layer adhered to the outer peripheral portion of the lower surface. At least the second glass layer adhered to the lid is heated and melted, and the substrate and the lid are a glass-sealed semiconductor device package for housing without to enclose the semiconductor element hermetically in the interior by bonding the body, the first and
The second glass layer is composed of 50 to 60% by weight of lead oxide and silicon oxide 1
To 5% by weight, 3 to 13% by weight of boron oxide, bis oxide
3 to 8% by weight of cordierite as filler
From 10 to 20% by weight, and the tin titanate compound from 10 to 20% by weight.
An electrode layer and a dielectric constant of 1,000 to 20,000 are provided between the upper surface of the base and the first glass layer to which the external lead terminals are fixed , made of glass containing 20% by weight.
A capacitance element formed by alternately laminating dielectric layers made of an electric material and having a thickness of 20 to 100 μm is provided, and the electrode layer of the capacitance element is connected to a power electrode and a ground electrode of a semiconductor element. A package for housing a semiconductor element, wherein an external lead terminal is connected.