JP3207978B2 - Capacitor and method of forming the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a capacitor used for a memory, a thin film capacitor, and the like, and a method of forming the same.

[0002]

2. Description of the Related Art A dielectric film having a higher dielectric constant than currently used SiO ₂ or Si ₃ N ₄ is to be introduced as a capacitor insulating film of a next-generation ultra-high-integration DRAM (ad hoc writing / reading memory) device. The movement is booming in industry. For example, a tantalum pentoxide (Ta ₂ O ₅ ) film having a relative dielectric constant ε = 20 to 28 has a long track record as a discrete capacitor (for example, an anodized tantalum oxide thin film capacitor). The characteristics of the Si
It is considered to be the first candidate to replace the system insulating film first, and is being actively developed. Various methods such as anodic oxidation, thermal oxidation, and reactive sputter deposition have been studied in the past as a method for forming this film, but complicated methods such as a stack type (laminated type) and a trench type (groove type) have been studied. Because it is necessary to adapt to the capacitor structure, it is considered that a CVD (chemical vapor deposition) method which is superior in covering property is suitable for DRAM applications. However, the dielectric film tends to increase the leakage current as the dielectric constant increases.
The case of a tantalum pentoxide film is not limited to this example, and this point is a difficulty in practical use. The present inventors, who were searching for a method for overcoming this problem, found in the 34th Joint Lecture on Applied Physics, 1987 (Preliminary Proceedings, p. 527) that a Ta ₂ film formed on a silicon substrate by photo-CVD was used. When the O ₅ film (as-grown) is heat-treated (hereinafter referred to as active oxygen annealing) in an oxygen atmosphere irradiated with strong ultraviolet light (UV), the leak current becomes 1/10 ^{4 of the} conventional (as-grown). In addition to disclosing the experimental facts that are reduced to １ ／ 1/10 ⁵ , such a sudden decrease in leak current includes ozone O ₃ generated by UV irradiation and O ( ¹ D) generated by photodecomposition of ozone during annealing. ) And Si atoms that diffuse from the silicon substrate toward the film surface during annealing play an important role. At this time, the raw materials used for the film formation were tantalum pentachloride TaCl ₅ and O ₂ . Thereafter, the phenomenon of a sharp drop in the leak current due to the active oxygen annealing is caused by Ta (OC ₂ H ₅ ) ₅ + O ₂
Raw material system and other C using Ta (N (CH ₃ ) ₂ ) ₅ + O ₂ raw material system
It has been reported by other research institutes that this phenomenon also occurs in VD tantalum oxide films (eg, H. Shinriki et al., Digesto).
f technical papers, 1989, Symposium on VLSI Technol
ogy Kyoto, p.25, 1989. C. Isobe and M. Saitoh, App
lied Physics Letters, 56, p. 907, 1990.T. Tabuc
hi et al., Japan Jounal of Applied Physics, 30, p.L197
4,1991.). Thus, the applicability of the leak current reduction technology proposed by the inventors was shown.

[0003]

However, in the above-mentioned method proposed by the inventor, the lower electrode (or substrate) needs to be made of a material containing Si in order to induce a decrease in leakage current. . When considering application to DRAMs and other future semiconductor device technologies, such restrictions on the lower electrode material have been a factor that reduces the attractiveness of the leak reduction technology. In view of this point, the present inventors have made two inventions and have already filed applications for a novel method of forming a low-leakage current CVD film in which the lower electrode is not limited to a Si-based material (Japanese Patent Application No. 62-206973).
issue). In the first method described in the above-mentioned prior application, Si ₂ Cl ₆ or Si (O (O)
In this method, a silicon raw material vapor such as CH ₃ ) _{4 is} mixed in an amount of 0.01 to 20 atomic% and supplied into the reactor for CVD deposition.
Further, such a film forming method and the above-described active oxygen annealing may be combined. In the above method, the electric field strength is 1 MV /
It has been confirmed that a low leakage current of about 10 to ⁸ A / cm ² can be realized relatively stably in cm. By the way, the present inventors have recently conducted a detailed study (the 52nd JSAP meeting proceedings, p.122, 1992).
Si necessary to repair defects that cause leakage current
The optimum concentration in the film is less than 0.1 atomic%, indicating that the leak can be suppressed to 10 to ¹¹ A / cm ² (at an electric field of 1 MV / cm) or less near the optimum concentration, and an excessive Si concentration is given. And that the leakage current may be increased (compared to the optimal concentration of leakage current).
In order to realize an extremely low leakage current film over the entire area of a large substrate such as a wafer having a diameter of 8 inches, the first method requires that the Si / Ta raw material vapor mixture ratio be 1%.
Both raw material vapors must be supplied precisely to the optimum value of 0 to ³ or less and so that the concentration and the concentration ratio do not vary throughout the substrate surface. However, CVD which provides a mixing ratio of up to three orders in a plane uniformly has not yet been reported even today, and the reality is that the road to practical use is still far away. On the other hand, a second method for solving the problem that the lower electrode is limited to the Si-based material is to use Ta ₂ O ₅ to be formed.
A method of forming at least one silicon oxide layer having a thickness of 1/100 to 1/10 of the total thickness between oxide thin films such as This is a method of annealing with active oxygen. When this method is applied, about 10 to ⁸ A / at an electric field strength of 1 MV / cm.
The leak current can be reduced to about cm ² . The drawback of this method is the thickness limitation. In future DRAM capacitors, it is necessary to realize an oxide thin film having a thickness of 15 nm or less. However, in order to conform to such an oxide thin film, the thickness of the silicon oxide layer is only 1.
It is 5 nm to 0.15 nm, and it is not easy to form such a thin film uniformly and stably in a plane by the current CVD technique. In addition, since a monolayer of a silicon oxide film is about 0.4 nm, there is also a fundamental problem that a 0.15 nm film cannot exist at all.

In addition, as a problem common to the first and second methods, there is a problem that the effect of reducing the leak current by active oxygen annealing is reduced.
This is due to the following reasons. Recently, the findings obtained by the inventors (38th Lecture Meeting on Applied Physics,
p. 596, 1991), the decrease in the leak current due to the active oxygen annealing is caused by the elemental S introduced in the vicinity of the interface between Ta ₂ O ₅ and the underlying Si electrode (substrate).
It occurs in the process of i (Si not bonded to oxygen) diffusing toward the Ta ₂ O ₅ film surface. That is, Ta ₂ O ₅
Defects inside the film are extrinsic elemental Si
And active oxygen, thereby reducing the leakage current. However, the Si atom in the aforementioned Japanese Patent Application No. 62-206973 is Ta
_Since it is a Si atom as an oxide (SiO ₂ ) taken in as a part of the ₂ O ₅ film, it is strongly bound to surrounding atoms through a chemical bond, so that it is directed toward the surface even when exposed to an active oxygen atmosphere. It is very difficult to spread. Further, even if the diffusion is forcibly caused by, for example, excessive annealing, the defect inside the Ta ₂ O ₅ film may certainly be repaired, but the vacancy from which Si has escaped may be regarded as another type of defect. Will be left behind. And this Si
The vacancies (ie, defects) become a new leak current source. After all, in the above-mentioned prior application, Ta ₂
Since a new defect is generated while an existing defect of the O ₅ film is repaired, the defect is not fundamentally reduced. As a result, even when active oxygen annealing is performed, the effect of reducing the leak current is not significantly observed.

The present invention has been made to solve the problems of the prior art as described above, and a capacitor structure and a method of forming the same capable of realizing a capacitor having extremely low leakage current regardless of the material of the lower electrode. The purpose is to provide.

[0006]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
The center point of the thickness of the dielectric thin film formed by VD and the lower electrode
So that the position where the dose concentration reaches the maximum value is
Or an appropriate amount ion implantation of Si atoms in the dielectric film, or After qs Ion implanting S i atom to the lower electrode, obtained by forming the dielectric thin film or dielectric thin film and the lower electrode to anneal with active oxygen atmosphere is there. Further, in the capacitor according to the second aspect, the active oxygen silicon oxide dispersed layer is provided inside the dielectric film near the lower electrode. The active oxygen silicon oxide layer corresponds to, for example, the active oxygen silicon oxide layer 5 in the embodiment of FIG. 7 described later. For example, as described in the following claim 3, an extremely thin elemental silicon layer is formed in an active oxygen atmosphere. It is formed by heat treatment. According to a third aspect of the present invention, there is provided a method of forming a capacitor according to the second aspect. In the third aspect, a dielectric film is formed on a lower electrode, and thereafter, an upper electrode is formed. Forming a transient thin elemental silicon layer in an interface between the lower electrode and the dielectric film or in a dielectric film near the interface before forming the upper electrode in the method of forming a capacitor; And, before forming the upper electrode, heat-treating the dielectric film containing the elemental silicon layer in an active oxygen atmosphere to convert the elemental silicon layer to an active oxygen silicon oxide dispersion layer. It is configured to be added. According to a fourth aspect of the present invention, in the formation method of the third aspect, the dielectric film and the elemental silicon layer are continuously grown by chemical vapor deposition in the same reactor. The above-mentioned elemental silicon layer may be formed by either a physical film forming means or a chemical film forming means. The physical film forming means is, for example, a sputtering method, an electron beam evaporation method, a molecular beam epitaxy method, etc., and the chemical film forming means is, for example, various CVD methods. Further, the above-mentioned elemental silicon layer means a layer of Si not bonded to oxygen.
The method of claim 1 corresponds to, for example, the embodiment shown in FIGS. 1 to 3 described below, and the capacitor described in claim 2 corresponds to, for example, the embodiment shown in FIG. 7 described later. The described forming method corresponds to, for example, an embodiment of FIGS. 8 to 10 described later, and a forming method of claim 4 corresponds to, for example, an embodiment of FIG. 9 described later.

[0007]

[Action] As described in the above prior art problems, reduction in the leakage current due to active oxygen annealing, Ta ₂ O5 ₅ and the underlying Si electrode Elemental of Si incorporated into the vicinity of the interface is Ta ₂ O with (substrate) ₅ process diffuses towards the membrane surface, it is presumed to arise by repairing defects present in the interior of the Ta ₂ O ₅ film jointly with active oxygen. However, the above-mentioned prior application / Japanese Patent Application No. 62-20697
In the method described in No. 3, the Si atoms incorporated into the Ta ₂ O ₅ film were endogenous Si existing as oxides. After this diffuses to the surface by active oxygen annealing, Si
Is left in the film as another kind of point defect. This Si vacancy becomes a new leak current generation source. Therefore, in the method described in the above-mentioned prior application, a new point defect is generated while the existing defect of the Ta ₂ O ₅ film is repaired by annealing, and as a result, the effect of the active oxygen annealing is reduced. On the other hand, in the present invention, the center point of the thickness of the dielectric film is
The position where the dose concentration reaches the maximum value is
Implantation of silicon atoms into the above dielectric film
Or or or ion implantation of silicon atoms in the lower electrode, or to the dielectric film or the lower electrode / dielectric layer interface in the vicinity of the lower electrode interposed Elemental silicon, such as amorphous Si or poly-Si. When a dielectric film is laminated on such an extremely thin Si film, a part of the amorphous Si film is turned into a thin oxide, while the rest is taken into nearby Ta ₂ O ₅ films as elemental Si atoms. It is clear from the results of a recent analysis. Thus, Si taken in the elemental state
Can be easily diffused outward toward the dielectric surface when annealed with active oxygen, so that the leakage current can be greatly reduced. Further, since they are taken in as elemental Si, they do not leave point defects (voids) at the points that originally existed after the diffusion. As described above, in the present invention, the effect of reducing the leak current by the active oxygen annealing appears very remarkably without decreasing.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to embodiments. Before that, the structure of a capacitor commonly used in the description of the present invention, photo-CVD and active oxygen annealing will be briefly described. FIG.
FIG. 3 is a conceptual cross-sectional view of a principal part of a capacitor used as a capacitance element of an SI. In FIG. 5, 1 is Si or S
The substrate 2 composed of iO ₂ or the like is a lower electrode of a thin film formed on the substrate 1 by sputtering deposition or CVD, and then processed into a predetermined shape by photolithography or the like. The material of the electrode does not need to be Si, and any material can be used as long as it can withstand a heat of about 400 ° C. at the maximum. For example, metals such as Mo, W, and Pt, or ITO
(A mixture of indium oxide and tin oxide) and a nonmetallic conductive film such as RuO ₂ . An oxide dielectric film 3 deposited by a CVD method is placed on the lower electrode 2. In the following examples, a Ta ₂ O ₅ film deposited by photo-CVD will be described as an example of the material of the dielectric film 3.
The present invention is not particularly limited thereto, and any transition metal oxide film (for example, HfO ₂ , TiO ₂ , Nb ₂ O ₅ , PbTiO _3, etc.) can provide the same desirable effects. As the CVD method, reduced pressure CVD, normal pressure CV
D, photo CVD, plasma CVD and the like are equally applicable. In addition to the CVD method, the present invention is equally applicable to a dielectric film formed by a vacuum evaporation method, a sputtering evaporation method, a sol-gel method, a molecular beam evaporation method, or the like. Also, the upper electrode 4
Is formed on the dielectric film 3 by sputtering evaporation or electron beam evaporation, and then formed into a predetermined pattern by photolithography or the like. Typical materials are Al, W, and poly-Si, but are not limited to actual types of materials.

Next, photo-CVD of a Ta ₂ O ₅ film deposited using oxygen O ₂ and tantalum chloride TaCl ₅ as raw materials will be briefly described. For details, see the Transactions of the Electrochemical Society of America (Jour
nal of the Electrochemical Society), Vol. 139, page 320. FIG. 6 is a cross-sectional view of a main part of an optical CVD apparatus provided with a low-pressure mercury lamp 10 as an excitation light source. In FIG. 6, reference numeral 11 denotes a reactor, 12 denotes a vacuum pump for exhausting exhaust gas from the reactor to reduce the pressure in the reactor, 13 denotes a substrate on which a Ta ₂ O ₅ film is to be deposited, and 14 denotes a substrate. A susceptor for supporting and maintaining a predetermined temperature,
Reference numeral 15 denotes a synthetic quartz window for irradiating ultraviolet excitation rays emitted from the low-pressure mercury lamp 10 to the surface of the substrate 13 without impairing the reduced pressure state of the reactor. At the time of deposition, TaCl ₅ vapor from the raw material line 16 and O ₂
N ₂ gas from the purge line 18 is supplied into the reactor together with the gas. TaCl ₅ vapor is vaporized in a sublimation device 19 filled with TaCl ₅ powder 20 having a purity of 99.9999%, and is transported to the reactor by a N ₂ carrier gas. Typical photo CVD in the above apparatus
Are as follows. Ta ₂ O ₅ deposition conditions formation pressure 7torr deposition temperature 300 ° C. excitation intensity ^{2.5mW / cm 2 (185nm) 63} mW / cm 2 (254nm) TaCl 5 sublimation temperature 56 ° C. Gas flow rate O ₂ 50 cc /
min TaCl ₅ carrier (N ₂ ) 10 cc / min N ₂ purge 100 cc / min Next, one method of active oxygen annealing will be described. Here, a method of diverting the optical CVD apparatus of FIG. 6 to an active oxygen annealing apparatus will be described. Of course, it goes without saying that a device dedicated to annealing may be manufactured and provided for this purpose. In FIG. 6, the substrate 13 on which the Ta ₂ O ₅ film is deposited is held on the susceptor 14, and the atmosphere in the reactor 11 is immediately evacuated. When the internal pressure reaches the level of 10 to ⁵ torr, the exhaust is stopped, and O ₂ gas is quickly introduced from the raw material line 17. When the internal pressure of the reactor reaches the atmospheric pressure, the normal pressure discharge valve 21 is opened, and excess O ₂ gas introduced thereafter is continuously discharged to the outside of the reactor. By doing so, the reactor 11 can be maintained in a pure oxygen atmosphere at atmospheric pressure. When the atmospheric pressure pure oxygen atmosphere is achieved, ultraviolet excitation rays are emitted from the low-pressure mercury lamp 10 toward the substrate 13 to start active oxygen annealing. Typical annealing conditions are shown below. When oxygen containing several% of O ₃ is used instead of pure oxygen, the time required for the heat treatment can be shortened. Active oxygen annealing conditions Vessel pressure Atmospheric pressure Processing temperature 400 ° C Excitation intensity 2.5 mW / cm ² (185 nm) 20.3 mW / cm ² (254 nm) O ₂ flow rate 50 cc / min Where
A specific example of the present invention will be described.

FIG. 1 is a process chart showing a first embodiment of the present invention. In FIG. 1, first, in a process, a lower electrode material Mo is formed to a thickness of about 200 nm by the sputtering method on a Si substrate on which a thermally oxidized SiO ₂ having a thickness of 600 nm is grown as a field oxide film as described above. It is processed into a predetermined shape by lithography. Next, in the step, the Si substrate on which the Mo lower electrode is formed is sufficiently cleaned using a high-purity organic solvent or a diluted hydrofluoric acid-based solution. next,
In the step, a Ta film having a thickness of about 40 nm is
Deposit a ₂ O ₅ film. Next, in the process, the formed Ta
Using a well-known ion implantation apparatus, a dose of about 10 ¹⁵ [atoms / cm ² ] of Si atoms is implanted into the ₂ O ₅ film. At this time, the ion acceleration voltage is adjusted so that the position (depth) at which the maximum value of the dose concentration is provided is at least between the center point of the film thickness and the interface between the Ta ₂ O ₅ film and the lower electrode. next,
In the step, active oxygen annealing is performed on the Ta ₂ O ₅ after the ion implantation for about 50 minutes. The annealing procedure and conditions are as described above. Next, in the process, dilute hydrofluoric acid immersion treatment and RCA cleaning (cleaning of a mixed solution of hydrochloric acid + hydrogen peroxide solution, ammonium hydroxide solution + peroxide) were performed to remove contaminants adhering to the Ta ₂ O ₅ film surface after annealing. Cleaning such as cleaning with a mixed solution of hydrogen oxide water). RCA
If a substrate that cannot withstand the cleaning agent is used,
Organic cleaning may be used instead of RCA cleaning. Next, in the step, an arbitrary electrode material, for example, Mo is formed on the Ta ₂ O ₅ film by a method such as a sputtering deposition method, and an upper electrode is formed by using photolithography. Complete.

Next, the operation will be described. FIG. 4 shows the first embodiment of the present invention.
FIG. 13 is a characteristic diagram showing leakage current characteristics of the capacitors manufactured in the third to third embodiments and the conventional capacitor.
In FIG. 4, (iii) shows the leakage current characteristics of the capacitor manufactured based on the first embodiment of the present invention.
(I) shows Ta ₂ O ₅ on the Mo lower electrode by photo CVD.
A capacitor fabricated by depositing a film and forming an Mo upper electrode without performing any additional processing (that is, excluding steps 1 to 3 of the first embodiment, hereinafter referred to as an as-grown film capacitor) ) And (ii) are the leakage current characteristics of a capacitor (hereinafter referred to as a prior art capacitor) manufactured based on the prior application and Japanese Patent Application No. 62-206973 of the present inventors. The vertical axis of FIG. 4 is a logarithmic scale of the leak current log (J), and the horizontal axis is the square root of the electric field intensity applied to the Ta ₂ O ₅ film of the capacitor.
It is arranged in. When the characteristics of FIG. 4 are compared near the electric field strength of 1 MV / cm ² , the first embodiment (iii)
It can be seen that the leakage current value of the capacitor of No. 6 shows a value 6 to 7 orders of magnitude lower than that of the as-grown film capacitor (i). As described above, in the present embodiment, the effect of reducing the leak current by the active oxygen annealing can be very efficiently exhibited. Further, the value of the present embodiment is the value of the capacitor (ii) of the prior application.
Is two to three orders of magnitude lower than the leakage current value of the present example, and the technical superiority of this embodiment is apparent from the comparison between the characteristics (ii) and (iii).

Next, a second embodiment of the present invention will be described. FIG. 2 is a process chart showing a second embodiment of the present invention. Steps "-" in FIG. 2 are the same as those described in "-" in the embodiment of FIG. 1, but there are differences in specific contents. In FIG.
The portions indicated by 'are the same as the steps 1 to 3 in FIG. Next, in step ', Si atoms are implanted into the surface layer of the Mo lower electrode through the Ta ₂ O ₅ film using a well-known ion implantation apparatus. The dose is about 10 ¹⁵ [pieces / cm ² ]. At this time, it is very important to adjust the ion acceleration voltage so that the position (depth) at which the maximum value of the dose concentration is provided falls within 10 nm, preferably 5 nm, from the interface between the Ta ₂ O ₅ film and the lower electrode. It is to be. That is, in the first embodiment, Si atoms are implanted into the Ta ₂ O ₅ film, but in this embodiment, Si atoms are implanted into the surface layer of the Mo lower electrode. Next, process
Then, active oxygen annealing is performed on the Ta ₂ O ₅ film and the Mo lower electrode after the ion implantation. The procedure and conditions for this annealing are almost the same as those in the step of FIG. 1, but the optimal annealing time varies depending on the type of the lower electrode, the Si dose, and the implantation depth. For example, when 10 ¹⁵ [pieces / cm ² ] of Si is implanted at a depth of 5 nm of the Mo lower electrode, the annealing is completed in about 90 minutes. The subsequent steps 'and' are the same as the steps and steps in FIG. In the characteristic diagram of FIG. 4, (iv) shows the leakage current characteristic of the capacitor manufactured according to the second embodiment. As shown in the figure, it can be seen that also in the present embodiment, the leakage current is reduced by about two digits compared to the capacitor (ii) of the prior application. As shown in the second embodiment, even if Si atoms are implanted not in the Ta ₂ O ₅ film but in the surface of the lower electrode located thereunder, the effect of reducing the leak current equivalent to that of the first embodiment is obtained. Is obtained.

Next, FIG. 3 is a process chart showing a third embodiment of the present invention. This embodiment is similar to the second embodiment in that Si atoms are ion-implanted into the Mo lower electrode.
The difference is that ion implantation is performed before depositing the Ta ₂ O ₅ film. In FIG. 3, the lower electrode formation in the step "
This is the same as the steps of the first and second embodiments. Next, in step "", Si atoms are immediately implanted into the surface layer of the Mo lower electrode. The dose is about 10 ¹⁶ [pieces / cm ² ], which is larger than that in the second embodiment. Similarly to the embodiment, the ion acceleration voltage is adjusted so that the position (depth) at which the maximum value of the dose concentration is provided falls within 10 nm, preferably 5 nm from the interface between the Ta ₂ O ₅ film and the lower electrode. Next, in the step ", the Si substrate including the Mo lower electrode after the ion implantation is sufficiently washed.
In this cleaning, first, the substrate is ultrasonically cleaned with a high-purity organic solvent, immersed in dilute hydrofluoric acid having a concentration of about 5% for about 10 seconds, rinsed with ultrapure water, and dried. The immersion in the diluted hydrofluoric acid is to remove the Si native oxide film formed on the surface of the Mo lower electrode after the ion implantation. Next, in the step ", a Ta ₂ O ₅ film having a thickness of about 40 nm is deposited on the entire surface of the substrate by photo-CVD. The deposition conditions and the operation procedure of the apparatus are the same as those in the step of FIG. Then, active oxygen annealing is performed on the formed Ta ₂ O ₅ film and the Mo lower electrode. The annealing procedure and conditions are the same as those in the step of FIG. 1, but also in the case of the third embodiment, the optimal annealing time varies depending on the type of the lower electrode, the Si dose, and the implantation depth. For example, when 10 ¹⁵ [pieces / cm ² ] of Si is implanted at a depth of 5 nm of the Mo lower electrode, the annealing is completed in about 90 minutes. The subsequent steps “and steps” are the same as the steps and steps in FIG. In the characteristic diagram of FIG.
(V) is a leakage current characteristic of the capacitor manufactured according to the third embodiment. The effect of reducing the leak current by the active oxygen annealing of this embodiment is almost the same as that of the second embodiment, and the leak current can be reduced by two digits or more compared to the capacitor (ii) of the prior application. As mentioned above,
In the case where the dielectric film of the capacitor was a Ta ₂ O ₅ film and the lower electrode was Mo, as shown in FIG. 4, the first to third embodiments provided substantially the same leak current reducing effect. But,
Generally, in the case of another dielectric film or another lower electrode,
Usually, the effect of the third embodiment is superior or inferior. In that case, it goes without saying that the most effective embodiment should be adopted. When selecting an embodiment, the following points should be noted. In other words, if the ion implantation into the dielectric film or the ion implantation into the lower electrode through the dielectric film causes damage that cannot be completely recovered by the subsequent active oxygen annealing, the third embodiment Examples are most appropriate. Further, in the case where the lower electrode material easily forms a eutectic with the implanted Si even at about the substrate temperature at the time of the active oxygen annealing, making out-diffusion of Si difficult, the first embodiment Gives the most favorable results.

FIG. 7 is a sectional view of an embodiment of the capacitor according to the present invention. In FIG. 7, the portions of the substrate 1, the lower electrode 2, the oxide dielectric film 3, and the upper electrode 4
This is the same as the conventional example shown in FIG. The feature of this embodiment is that an active oxygen silicon oxide dispersion layer 5 is provided inside the dielectric film 3 near the lower electrode 2. This active oxygen silicon oxide layer 5 is formed, for example, by referring to FIGS.
About 1.2 nm in mass film thickness as described in
It is formed by heat treating an extremely thin amorphous Si or poly Si layer in an active oxygen atmosphere.

Next, FIG. 8 is a process chart showing a first embodiment of a method of forming the capacitor of FIG. The steps will be described below in order. First, in step 11, a thermally oxidized SiO ₂ having a thickness of 600 nm was grown as a field oxide film.
On the i-substrate, the lower electrode material Mo is formed to a thickness of about 200 nm by the sputtering method as described above, and is processed into a predetermined shape by photolithography.

Next, in step 12, the Si substrate on which the lower electrode of Mo is formed is sufficiently cleaned using a high-purity organic solvent or dilute hydrofluoric acid-based solution. Next, in step 13, a thin first Ta ₂ O ₅ film is deposited on the entire surface of the substrate including the washed and dried Mo lower electrode by the above-described photo-CVD method. When the film thickness reaches several nm to several tens nm, the deposition is interrupted, and the substrate is temporarily removed from the optical CVD apparatus. Next, in step 14, the substrate on which the thin Ta ₂ O ₅ film is formed is washed to remove particles attached to the surface when the substrate is taken out. Next, in Step 15, the mass film thickness is about 1.
2 nm ultra-thin amorphous Si or poly-Si is laminated by a physical film forming means such as a sputtering method, an electron beam evaporation method, a molecular beam epitaxy method, or a chemical film forming means such as a CVD method. Next, in step 16, the substrate is again organically cleaned. Next, in step 17, the substrate on which amorphous Si is deposited in the vicinity of the lower electrode as described above is mounted on the above-described photo-CVD apparatus, and the second Ta ₂ O ₅ film is added.
When the total thickness of the first and second Ta ₂ O ₅ films reaches a predetermined thickness, the deposition is stopped and the substrate is taken out. Next, in step 18, the substrate on which the Ta ₂ O ₅ film has been formed is subjected to active oxygen annealing for about 60 minutes. The procedure and conditions for annealing are as described above. Next, in step 19, dilute hydrofluoric acid immersion treatment and RCA cleaning (cleaning of a mixed solution of hydrochloric acid + hydrogen peroxide solution and ammonium hydroxide solution +) were performed to remove contaminants attached to the Ta ₂ O ₅ film surface after annealing. (A combination of cleaning with a mixed solution of hydrogen peroxide and water). If substrates that cannot withstand RCA cleaning agents are used, RCA
Instead of washing, an organic washing can be used. Next, in step 20, finally, an arbitrary electrode material, for example, Mo is formed on the Ta ₂ O ₅ film by a method such as a sputtering deposition method, and an upper electrode is formed by using photolithography. The capacitor structure is completed.

Before explaining the operation of the embodiment of FIG.
A second embodiment for realizing the capacitor structure of FIG. 7 will be described. In this embodiment, the ultra-thin amorphous S
i (or poly Si) is formed by the same photo CVD as Ta ₂ O ₅
The feature is that the process is simplified by using an apparatus. Therefore, a simple improvement is added to the Ta ₂ O ₅ photo-CVD apparatus shown in FIG. FIG. 12 is a diagram showing an embodiment of a photo-assisted CVD apparatus in which the above-described improvement is made. The apparatus shown in FIG. 12 is the same as the apparatus shown in FIG. 6 except that an Si ₂ H ₆ raw material line 22 is added. The Si ₂ H ₆ raw material line 22 is for introducing disilane Si ₂ H ₆ diluted with He to a concentration of 1% into the reactor 11 at a predetermined flow rate. In order to deposit amorphous Si using the apparatus of FIG. 12, Si ₂ H ₆ and N ₂ are supplied to the reactor 11 at a predetermined flow rate from the Si ₂ H ₆ raw material line 22 and the N ₂ purge line 18,
With implementing the excitation by the low-pressure mercury lamp 10, to close the normally shut-off valve 21, to completely stop the supply of O ₂ and TaCl ₅ from O ₂ feed line 17 and TaCl ₅ feed line 16. An example of the film forming conditions is as follows. When Si is formed under these conditions, a deposition rate of about 0.1 nm / min can be obtained. Amorphous Si film forming conditions Film forming pressure 10 torr Film forming temperature 300 ° C. Excitation intensity 2.5 mW / cm ² (185 nm) Si ₂ H ₆ concentration 1% (He = 99% dilution) Gas flow Si ₂ H ₆ (He dilution) 200 cc / Min N ₂ purge 100 cc / min The process of the second embodiment for realizing the capacitor structure of FIG. 7 will be described below with reference to the process diagram of FIG. Step 1
Steps 1 to 13 are the same as those in FIG. Next, step 2
In FIG. 1, the first Ta ₂ O ₅ contained in the photo-CVD apparatus
An amorphous Si film having a thickness of about 1.2 nm is immediately formed on the substrate on which the film is formed under the above-described CVD conditions. This step 21
After the amorphous Si was deposited on the first Ta ₂ O ₅ film, the film forming conditions were switched.
The Ta ₂ O ₅ film was laminated, to stop the deposition upon reaching a predetermined thickness of. Subsequent steps are the same as in the embodiment of FIG. That is, in this embodiment, step 13,
Steps 21 and 17 are performed continuously as a series of CVD steps without removing the substrate from the optical CVD apparatus of FIG. As described above, both the embodiment of FIG. 8 and the embodiment of FIG. 9 can realize the same capacitor structure as a result.
In the embodiment of FIG. 9, contamination caused when the substrate is moved from the Ta ₂ O ₅ film forming apparatus to the amorphous Si film forming apparatus and vice versa is not generated in principle. Can be omitted. This results in savings in raw material costs as well as in processing time or in increased yield, with the positive result of lower production costs.

Next, FIG. 10 is a process chart of a third embodiment for realizing the capacitor of FIG. In FIG. 10, first, in step 31, similarly to FIG.
_A 200 nm-thick Mo lower electrode is formed on the substrate on which the _two films have been grown. Next, in step 32, the surface is sufficiently cleaned. Next, in step 33, the substrate is moved to the light CV shown in FIG.
D device, and the light C
An ultra-thin amorphous Si film having a thickness of about 1.2 nm is deposited by the VD method under the above-described conditions. Next, in step 34, a Ta ₂ O ₅ film is immediately deposited on the substrate on which the amorphous Si has been deposited until a predetermined thickness is obtained by the same apparatus. Ta ₂
The conditions for forming O ₅ are as described above. Next, step 35
Then, active oxygen annealing is performed on Ta ₂ O ₅ for about 60 minutes. The annealing procedure and conditions are as described above. The subsequent steps 36 and 37 correspond to steps 19 and 2 in FIG.
Same as 0. As described above, this embodiment differs from FIGS. 8 and 9 in that amorphous Si is directly deposited on the substrate on which the lower electrode is formed. In this embodiment, the method of forming the ultra-thin amorphous Si film and the Ta ₂ O ₅ film by the same CVD apparatus is used. However, this film is formed by other physical or chemical film forming means. Is also good. In this case, however, it is necessary to perform cleaning using an organic solvent before and after the formation of the amorphous Si film as in FIG.

Next, the operation will be described. First, the operation of the embodiment of FIG. 8 and the embodiment of FIG. 9 will be described. As described above, since the two embodiments form a capacitor having exactly the same structure, the functions and effects appearing on the leakage current characteristics are almost the same. Therefore, the description will be made using the results of the embodiment in FIG. FIG. 11 is a characteristic diagram showing leakage current characteristics of the capacitors manufactured in the examples of FIGS. 9 and 10 and the conventional capacitor. In FIG. 11, (iii) shows a leakage current characteristic of the capacitor manufactured based on the embodiment of FIG. (I) shows a capacitor (hereinafter referred to as-grown) formed by depositing a Ta ₂ O ₅ film on the Mo lower electrode by photo-CVD and forming the Mo upper electrode without performing additional processing. (Ii) Leakage current characteristics of a capacitor (hereinafter, referred to as a prior application capacitor) manufactured based on the inventors' prior application and Japanese Patent Application No. 62-206973. It is. The vertical axis in FIG. 11 is a logarithmic scale of the leak current value log (J), and the horizontal axis is the electric field intensity applied to the Ta ₂ O ₅ film of the capacitor, arranged by the square root ΔE. Comparing near the electric field strength of 1 MV / cm ² , the leakage current value of the capacitor (iii) of the embodiment of FIG.
It can be seen that the value is 6 to 7 orders of magnitude lower than that of the n-film capacitor (i). As described above, according to the present embodiment, the effect of reducing the leak current by the active oxygen annealing can be exhibited very efficiently. Further, this value is two to three orders of magnitude lower than the leakage current value of the capacitor (ii) of the prior application. Thus, from the comparison between (ii) and (iii), the technical advantage of this embodiment is clear.

Next, the operation of the embodiment shown in FIG. 10 will be described. FIG. 11 (iv) shows the leakage current characteristics of the capacitor manufactured according to the embodiment of FIG. This embodiment is also different from the prior application embodiment (ii) by about 2 hours after the active oxygen annealing.
It can be seen that the digit leakage current is reduced. Thus, as shown in the embodiment of FIGS.
Even if it is not sandwiched between _two Ta ₂ O ₅ films but is placed between the lower electrode and the Ta ₂ O ₅ film as shown in FIG. 10, almost the same effect of reducing the leak current can be obtained.

As described above, the dielectric film of the capacitor is
When the a ₂ O ₅ film and the lower electrode were made of Mo, as shown in FIG. 11, the examples of FIGS. 8 to 10 gave substantially the same leakage current reduction effect. However, in general, in the case of other dielectric films and other lower electrode materials, the effects of the respective embodiments are generally superior or inferior. In that case, it goes without saying that the most effective embodiment should be adopted. When selecting an embodiment, the following points should be noted. That is, when there is an undesired interaction between the dielectric film and the lower electrode during the film formation or when there is a difficulty in the adhesive force, the amorphous silicon is placed between the dielectric film and the lower electrode. The embodiment of FIG. 10 with a membrane is suitable. vice versa,
If there is an unfavorable relationship between the amorphous Si and the lower electrode, it is better to adopt the embodiment of FIGS. In the case where the step of forming the amorphous Si film damages the underlying dielectric film, the embodiment of FIG. 10 in which the dielectric film is formed later gives the best result.

The gist of the present invention is that transient elemental silicon is dispersed in the dielectric film in the vicinity of the dielectric / substrate interface, and the elemental silicon is converted into oxide by the subsequent active oxygen annealing. At the same time, there is a mechanism for moving a part of it to the dielectric film surface. Therefore, FIGS.
Instead of the method in which elemental silicon is added and active oxygen annealing is performed before or during the formation of the dielectric film as shown in the embodiment of FIG. 0, as shown in the embodiment of FIGS. After the film is formed, a method may be used in which elemental silicon is added to the inside of the dielectric film by physical means such as ion implantation, and thereafter, active oxygen annealing is performed.

[0023]

As it has been described above, according to the present invention, in the method for forming a capacitor according to claim 1, film of the dielectric thin film
The maximum dose concentration between the center point of the thickness and the lower electrode
Silicon atoms on the dielectric film so that
Implant or use elemental Si
Is added, and then a step of annealing the dielectric thin film and the lower electrode structure in an active oxygen atmosphere is added, so that a capacitor with extremely low leakage current can be realized regardless of the lower electrode material. The capacitor formed according to the present invention has a leakage current characteristic at least two orders of magnitude lower than that of the capacitor described in Japanese Patent Application No. 62-206973 filed by the present inventors. Further, in the structure and the method of forming a capacitor according to the second to fourth aspects, when forming the dielectric film on the lower electrode, before or during the film formation, or after the film formation, the ultra-thin silicon layer Is inserted into the dielectric film to be formed as elemental Si, and the dielectric film incorporating elemental Si is annealed in an active oxygen atmosphere, so that the dielectric thin film has extremely low leakage current. Can be realized. The capacitor according to the present invention can obtain a leakage current characteristic at least three orders of magnitude lower than that of a capacitor formed based on the prior application No. 62-206973. According to the fourth aspect of the present invention, since the dielectric film and the amorphous Si film are formed by the same film forming apparatus, the raw material cost is reduced, the process time is reduced, and the yield is improved as compared with other methods. Is also obtained.

[Brief description of the drawings]

FIG. 1 is a process chart of a first embodiment of the present invention.

FIG. 2 is a process chart of a second embodiment of the present invention.

FIG. 3 is a process chart according to a third embodiment of the present invention.

FIG. 4 is a characteristic diagram showing leakage current characteristics of the capacitors manufactured in the first to third embodiments of the present invention and a conventional capacitor.

FIG. 5 is a sectional view of a main part of a structure of a capacitor used in an LSI or the like;

FIG. 6 is a cross-sectional view of a main part of an optical CVD apparatus.

FIG. 7 is a sectional view of an embodiment of a capacitor according to the present invention.

FIG. 8 is a process chart of a forming method for realizing the capacitor of FIG. 7;

9 is another process chart of the forming method for realizing the capacitor of FIG. 7;

FIG. 10 is still another process chart of the formation method for realizing the capacitor of FIG. 7;

FIG. 11 is a characteristic diagram showing leak current characteristics of the capacitors manufactured in the examples of FIGS. 8 to 10 and a conventional capacitor.

FIG. 12 is a sectional view of a main part of an optical CVD apparatus used in the step of FIG. 9;

[Explanation of symbols]

1 ... deposited substrate 2 ... oxide dielectric film 4 ... upper electrode 10 ... a low-pressure mercury lamp 11 ... CVD reactor 12 ... vacuum pump 13 ... Ta ₂ O ₅ film produced in the lower electrode 3 ... CVD to form a dielectric film Substrate to be supported 14: Susceptor that supports substrate 13 and maintains it at a predetermined temperature 15: Synthetic quartz window 16: TaC
l ₅ steam supply line 17 ... O ₂ gas supply line 18 ... N ₂ gas purge line 19 ... TaCl ₅ sublimator 20 ... atmospheric O
₂ discharge valve 22 ... Si ₂ H ₆ raw material line

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-64-71166 (JP, A) JP-A-5-243489 (JP, A) JP-A-4-229615 (JP, A) 23328 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 27/04 H01L 21/822 H01L 21/8242 H01L 27/108

Claims (4)

(57) [Claims] By 1. A chemical vapor deposition on the lower electrode (CVD) method to form a dielectric film, then, in the method for forming a capacitor for forming the upper electrode, the center point of the thickness of the dielectric film and the Between the lower electrode
Dielectric film so that the position where the
A step of the silicon atoms are ion-implanted silicon atoms or ion implantation, or to the lower electrode, after that,
A method of performing annealing in an active oxygen atmosphere. 2. A capacitor having a dielectric film sandwiched between a lower electrode mounted on a substrate and an upper electrode mounted thereon in parallel with the lower electrode, wherein the capacitor has a dielectric film in the vicinity of the lower electrode. A capacitor comprising an active oxygen silicon oxide dispersion layer provided inside a body film. 3. A dielectric film is formed on the lower electrode, and thereafter,
In the method of forming a capacitor for forming an upper electrode, before forming the upper electrode, a transient thin elemental silicon is formed in an interface between the lower electrode and the dielectric film or in a dielectric film near the interface. Forming a layer, and before forming the upper electrode, heat treating the dielectric film containing the elemental silicon layer in an active oxygen atmosphere to convert the elemental silicon layer into an active oxygen silicon oxide dispersion layer. The method for forming a capacitor according to claim 2, further comprising the steps of: 4. The method according to claim 3, wherein the dielectric film and the elemental silicon layer are continuously grown in the same reactor by chemical vapor deposition.