JP3208012B2 - Filter circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter circuit constituted by an integrated circuit without an external capacitor, and more particularly, to a filter having a time constant which enables an equivalently large capacitance value to be electronically realized in an integrated circuit. The present invention relates to a filter circuit having a large time constant, for example, 0.1 msec or more.

[0002]

2. Description of the Related Art A first prior art filter circuit constituted by an integrated circuit will be described with reference to FIG. FIG.
FIG. 1 shows a circuit diagram of a first conventional filter circuit (first-order low-pass filter). In FIG. 3, V _i is the filter input voltage, and V _o is the filter output voltage. 3 is an input terminal and 4 is an output terminal. Reference numeral 5 denotes a resistor having a resistance value R. Reference numeral 6 denotes a capacitor having a capacitance value C. In the filter circuit of FIG. 3, the cutoff frequency f ₀ is

[0003]

F ₀ = 1 / (2πRC) The resistance value R of the resistor 5 that can be realized by an integrated circuit
The upper limit is about several hundred kΩ, and the capacitance C of the capacitor 6 is also up to about 100 pF. Therefore, when you take a low cut-off frequency f _0, without requiring us to increase the capacitance C of the capacitor 6, it was not possible to built a capacitor 6 to the integrated circuit. Therefore, generally, the capacitance value C of the capacitor 6 is 100 pF
The above is realized by an external capacitor.

Referring to FIG. 4, a second conventional filter circuit constituted by an integrated circuit will be described. FIG. 4 shows a circuit diagram of a second conventional filter circuit (primary low-pass filter). In FIG. 4, V _i is the filter input voltage, and V _o is the filter output voltage. 1 is a power supply terminal ( _Vcc ), 2 is a ground terminal, 3 is an input terminal, and 4 is an output terminal. 11 is a differential amplifier which filters the input voltage V _i is applied to the non-inverting input terminal have a predetermined conductance 1 / R. Reference numeral 12 denotes an attenuator that attenuates the output current of the differential amplifier 11 at a predetermined attenuation ratio (current ratio) 1 / A. Reference numeral 6 denotes a capacitor to which the output current of the attenuator 12 is supplied, and has a capacitance value C. 14 is a condenser 6
A voltage follower which receives the voltage generated between both terminals of, is composed of a bipolar transistor Q ₁₂ and the constant current source I _4, the output voltage of the voltage follower 14 to the inverting input terminal of the differential amplifier 11 is the filter output voltage V _o with the feedback.

In the filter circuit of FIG. 4, the filter input voltage is V _i , the filter output voltage is V _o , the conductance of the differential amplifier 11 is 1 / R, the attenuation of the attenuator 12 is 1 / A, Since the capacitance value is C,

[0006]

## EQU2 ## The relational expression of (V _i -V _o ) / (jωC · A · R) = V _o holds. Here, the filter output voltage V _o
And the filter input voltage V _i ,

[0007]

V _o / V _i = 1 / (1 + jωC · A · R), and the time constant of the low-pass filter is A · C · R
Becomes However, increasing the value A in an attempt to increase the time constant in order to lower the cutoff frequency indicates that the charging current and discharging current of the capacitor 6 also become very small.

For example, R = 10 kΩ, A = 1000
(Times), since the value A is generally determined by the current ratio, the output current of the differential amplifier 11 in the input stage is 1 m
A, the current flowing through the capacitor 6 is 1 mA of 1 mA.
One thousandth, that is, 1 μA, which is a very small value. Therefore, can not be ignored a base current flows into the bipolar transistor Q ₁₂ constituting a voltage follower (emitter follower) 14 of the output stage from the attenuator 12, the conductance of the differential amplifier 1 / R, the attenuator 12
, And the time constant A, R, and C determined by the capacitance C of the capacitor. That is,
So that the error occurs in the time constant by the base current amount flowing bipolar transistor Q ₁₂ f.

Even if a base current compensating circuit or the like is added by circuit contrivance, the attenuator 12
It is extremely difficult to zero the base current flowing into the bipolar transistor Q ₁₂ from. There is also a leakage current in the bipolar transistor Q ₁₂ of the voltage follower (emitter follower) 14 of the output stage. For example, in a process of manufacturing an integrated circuit, surface leakage occurs at an unspecified location at an unspecified probability due to dirt or dust on the surface of the semiconductor substrate, and flows due to the leakage current.

Further, as the value A increases, the leakage current cannot be ignored. That is, when the transfer coefficient (attenuation ratio) 1 / A of the attenuator decreases, the difference between the value of the current transmitted to the capacitance 6 and the value of the leak current becomes a current value substantially transmitted, and the cutoff frequency f _An error occurs in ₀ .

[0011]

In a filter circuit such as that shown in FIG. 3, in order to lower the cut-off frequency f ₀ , CR
If a very large time constant is desired, the capacitance that can be built into the integrated circuit is up to about 100 pF. Therefore, the resistance value must be very large. However, creating a resistance of several hundred kΩ or more requires a large chip area. This causes an increase in cost and accuracy.

In the filter circuit shown in FIG. 4, even if the capacitance C is not so large, the attenuator 1
By increasing the second damping ratio, it is possible to the time constant is increased to reduce the cut-off frequency f _0. However, when the time constant is large, when the value A is set large,
Can not be ignored a base current flowing in the bipolar transistor Q ₁₂ of the voltage follower 14 of the output stage, the constant has a problem that it is impossible to accurately set the time. Also, did not negligible impact of the leakage current flowing through the bipolar transistor Q _12. That is, if h _{FE of} the transistor is small or a leak current occurs,
Deviated from the desired the cut-off frequency f _0, there is a drawback that can not be system may set.

An object of the present invention is to provide a filter circuit which can set a large time constant with high accuracy and can reduce the influence of leak current.

[0014]

According to the present invention, there is provided a filter circuit comprising: a differential amplifier having a predetermined conductance and a filter input voltage applied to a non-inverting input terminal; An attenuator that attenuates at an attenuation ratio,
A capacitor to which the output current of the attenuator is supplied;
A buffer operational amplifier for inputting a voltage generated between both terminals of the capacitor with the gate of the S transistor as an input terminal, and a voltage follower receiving the output voltage of the operational amplifier as an input; Is fed back to the inverting input terminal of the differential amplifier and is used as the filter output voltage.

[0015]

According to the structure of the present invention, since the output current of the differential amplifier is attenuated by the attenuator and then supplied to the capacitor, the resistance value of the reciprocal of the conductance formed by the differential amplifier is reduced by the attenuation of the attenuator. Can be multiplied by the reciprocal of the ratio,
A large time constant can be created without increasing the resistance value of the resistor and the capacitance value of the capacitor.

Further, a voltage generated between both terminals of the capacitor is input to a voltage follower via a buffer operational amplifier having a gate of the MOS transistor as an input terminal, and a gate current of the MOS transistor is almost zero. Therefore, the entire output current of the attenuator can be supplied to the capacitor, and a large time constant can be accurately set.

Further, since the buffer operational amplifier having the gate of the MOS transistor as an input terminal is interposed between the capacitor and the voltage follower, the influence of the leak current can be reduced. That is, the voltage follower are often driven by amplified output by operational amplifier 13, if the base and the leakage current between the substrate of the transistor Q ₁₂ or if there is a leakage current between the collector and the base of the transistor Q _12, However, the cutoff frequency f _{0 of the} filter circuit does not change due to the leak current.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a circuit diagram of a filter circuit (primary low-pass filter) according to an embodiment of the present invention, which is constituted by an integrated circuit. 1, a V _i filter input voltage, V _o is the filter output voltage. 3 is an input terminal and 4 is an output terminal. Reference numeral 11 denotes a filter input voltage V _i having a predetermined conductance 1 / R and a non-inverting input terminal.
Is applied to the differential amplifier. 12 is a differential amplifier 11
Is an attenuator that attenuates the output current at a predetermined attenuation ratio 1 / A. Reference numeral 6 denotes a capacitor to which the output current of the attenuator 12 is supplied, and has a capacitance value C. Reference numeral 13 denotes a buffer operational amplifier to which a voltage generated between both terminals of the capacitor 6 is inputted with the gate of the MOS transistor as an input terminal. Reference numeral 14 denotes a voltage follower that receives the output voltage of the operational amplifier 13 as an input. The voltage follower 14 includes a bipolar transistor and a constant current source as in the conventional example of FIG. It is the filter output voltage V _o as well as fed back to the inverting input terminal.

[0019] In the configuration of the filter circuit as described above, the filter input voltage V _i is applied to the non-inverting input terminal of the differential amplifier 11, the filter output voltage to the inverting side input V
Although _o is fed back, when the conductance of the differential amplifier 11 and the 1 / R (reciprocal of the resistance R), the output current I _o of the differential amplifier 11

[0020]

[Number 4] I _o = a _{(V i -V o) / R} . The current I _o is electronically attenuated, when the attenuation amount of 1 / A, are the same voltage value as voltage V _o (the filter output voltage V ₀ generated in the capacitor 6 is the load capacitance, for convenience the same reference numerals To use)

[0021]

V _o = (V _i -V _o ) / (jωC · A · R) Therefore,

[0022]

V _o = V _i / (1 + jωC · A · R), and the time constant of the filter circuit of FIG. 1 is A · C · R. Therefore, if the value A is increased, the time constant can be increased arbitrarily. At this time, the voltage generated between both terminals of the capacitor 6 is input to the voltage follower 14 via the buffer operational amplifier 13 having the gate of the MOS transistor as an input terminal.
All the output current of 2 will flow through the capacitor 6,
Since the current does not flow from the attenuator 12 to the operational amplifier 13, the time constant is accurately set. Further, the influence of the leak current can be reduced by interposing the operational amplifier 13.

FIG. 2 shows a specific circuit diagram of the filter circuit shown in FIG. In FIG. 2, the differential amplifier 11 has N
PN bipolar transistor Q ₁ ~Q _4, resistors R _1, R
₂ and constant current sources I ₁ and I ₁ . Attenuator 12
Are PNP bipolar transistors Q ₅ , Q ₆ , NPN
Bipolar transistor Q ₇ to Q _9, and a constant current source I _2. The operational amplifier 13 includes PNP bipolar transistors Q ₁₀ and Q ₁₁ , N-channel MOS transistors C _N1 and C _N2 , and a constant current source I ₃ . The voltage follower 13 includes an NPN bipolar transistor Q ₁₂ and a constant current source I ₄ . 1 is a power supply terminal (V _CC ),
2 is a ground.

In the filter circuit having the above configuration,
And the NPN bipolar transistor Q ₁To the base of
Luter input voltage V_iIs applied and the NPN bipolar transistor
Jista Q_TwoFilter output voltage V_oIs returned
In this case, NPN bipolar
La transistor Q₁Collector current I_C1Is

[0025]

[Equation 7] _{I C1 = I 1 + (V} i -V o) / R , and the collector current I _C2 of the NPN bipolar transistor Q ₂ is,

[0026]

## _EQU8 ## I _C2 = I _1- (V _i -V _o ) / R. At this time, the NPN bipolar transistor Q ₃
The base-emitter voltage V _BE3 of

[0027]

V _BE3 = (KT / q) ln (I _C1 / I _S ), and the base of the NPN bipolar transistor Q ₄
The emitter-to-emitter voltage V _BE4 is

[0028]

V _BE4 = (KT / q) ln (I _C2 / I _S ) However, I _S is the saturation current of the NPN bipolar transistor Q _3, Q _4. K is Boltzmann's constant, T
Is the absolute temperature, and q is the electron charge. If the base-emitter voltages of the PNP bipolar transistors Q ₅ and Q ₆ are V _BE5 and V _BE6 respectively, these are also expressed by the same equations as (Equation 9) and (Equation 10).

[0029]

## _EQU11 ## There is a relationship such as V _BE3 −V _BE4 = V _BE6 −V _BE5 ,

[0030]

(KT / q) ln (I _C1 / I _C2 ) = (KT /
q) ln (I _C6 / I _C5 ), and

[0031]

## EQU13 ## I _C1 / I _C2 = I _C6 / I _C5 . Also,

[0032]

## _EQU14 ## There is a relationship of I _C6 = I ₂ −I _C5 . From the above,

[0033]

Equation 15] _{I C5 = (I 2/2} ) · {1- (V i -V o) / RI 1}

[0034]

Equation 16] _{I C6 = (I 2/2} ) · {1+ (V i -V o) / RI 1}

[0035]

V _o = (I _C6 −I _C5 ) · (1 / jωC) = I ₂ · (V _i −V _o ) / (jωCRI ₁ )

[0036]

V _o / V _i = 1 / {1 + jωCR (I ₁ / I ₂ )} where I ₁ / I ₂ = A,

[0037]

V _o / V _i = 1 / (1 + jωCR · A) Therefore, a large time constant can be realized by selecting the value of I ₁ / I ₂ = A. However, when the value of A is made very large, I ₂ becomes a very small current, and the leakage current of the bipolar transistor may influence. Therefore, the gate current of the MOS transistor is almost zero. By providing the buffer circuit between the capacitor and the output, the influence of the leak current is reduced.

As a specific example, R = 10 kΩ, A = 100
0 times, I ₁ = 1 mA, I ₂ = 1 μA, C = 50 pF
Then, the time constant is 10 kΩ × 10 ³ × 50 × 10 ^-12
= 500 × 10 ⁻⁶ = 500 μsec. At this time,
Since the current of I ₂ = 1 μA is very small, the influence of the base current and the leakage current of the bipolar transistor cannot be ignored, and in order to reduce the influence, I ₂ =
Assuming 10 μA, when A = 1000, I ₁ = 10 mA
And the power consumption increases (in the case of the conventional example).

On the other hand, when the operational amplifier 13 having the gates of the N-channel MOS transistors C _N1 and C _N2 as a signal input is provided as in the embodiment, the gates of the N-channel MOS transistors C _N1 and C _N2 are provided. Current is 10pA
Since the level is the upper limit, the gate current can be ignored if I ₂ is a value up to about 0.1 μA. For this reason, in consideration of the error, in the conventional example, it was possible to perform only up to about A = 100 times.
The time constant can be set to about 00 to 10000, and the time constant can be set to be 10 to 100 times larger than the conventional example.

As described above, according to this embodiment, the voltage generated between both terminals of the capacitor 6 is applied to the buffer operational amplifier 13 having the gates of the N-channel MOS transistors C _N1 and C _N2 as input terminals. Since the voltage is input to the voltage follower 14 and the gate currents of the MOS transistors C _N1 and C _N2 are almost zero, the entire output current of the attenuator 12 can be supplied to the capacitor 6 and a large time constant can be obtained. It can be set with high accuracy.

The capacitor 6 and the voltage follower 4
, A buffer operational amplifier 13 having the gates of the N-channel MOS transistors C _N1 and C _N2 as input terminals is interposed therebetween, so that the leakage current can be reduced and the influence of the leakage current can be reduced. . In recent years, as the integration of integrated circuits has become higher, the integration of external components, particularly the incorporation of large-capacity capacitors, has been demanded. However, since the relative accuracy of resistors and transistors is generally good in integrated circuits, the attenuator 12 The attenuation ratio, that is, the current ratio, can be made with high accuracy. In addition to taking advantage of this fact, N-channel MOS transistors C _N1 ,
By cascade-connecting the operational amplifier 13 having the gate of C _{N2 as} an input to the capacitor 6, it is possible to incorporate a large time constant which has been impossible in the past.

[0042]

According to the filter circuit of the present invention, the voltage generated between both terminals of the capacitor is input to the voltage follower via the buffer operational amplifier having the gate of the MOS transistor as an input terminal. Since the gate current of the transistor is zero, the entire output current of the attenuator can be supplied to the capacitor, and a large time constant can be set accurately.

Since the buffer operational amplifier having the gate of the MOS transistor as an input terminal is interposed between the capacitor and the voltage follower, the leakage current can be reduced, and the influence of the leakage current can be reduced. Can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a filter circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific configuration of the filter circuit of FIG.

FIG. 3 is a circuit diagram showing a configuration of a first conventional example of a filter circuit.

FIG. 4 is a circuit diagram showing a configuration of a second conventional example of a filter circuit.

[Explanation of symbols]

First power supply terminal 2 Ground 3 input terminal 4 the output terminal 6 capacitor 11 differential amplifier 12 attenuator 13 operational amplifier 14 voltage follower _{Q 1, Q 2, Q 3} , Q 4 NPN bipolar transistor _{Q 7, Q 8, Q 9} , Q ₁₂ NPN bipolar transistor Q ₅ , Q ₆ , Q ₁₀ , Q ₁₁ PNP bipolar transistor C _N1 , C _N2 N-channel MOS transistor R ₁ , R ₂ Resistance I ₁ , I ₂ , I ₃ , I ₄ Constant current source

Claims (1)

(57) [Claims] A differential amplifier having a predetermined conductance and a filter input voltage applied to a non-inverting input terminal;
An attenuator that attenuates the output current of the differential amplifier at a predetermined attenuation ratio, a capacitor to which the output current of the attenuator is supplied, and a voltage generated between both terminals of the capacitor using the gate of the MOS transistor as an input terminal. An operational amplifier for a buffer to be inputted, and a voltage follower receiving an output voltage of the operational amplifier as an input, wherein an output voltage of the voltage follower is fed back to an inverting input terminal of the differential amplifier and a filter output is provided. Filter circuit with voltage.