JP3215750B2 - Multi memory capture method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reproducing apparatus of an electronic still camera system having a multi-screen display function, and more particularly, to a multi-memory fetching method in the reproducing apparatus in consideration of the improvement of image quality of a multi-display screen. .

[0002]

2. Description of the Related Art A reproducing apparatus of an electronic still system includes a plurality of images (4 screens, 9 screens, 25 screens) on one screen so that the user can confirm at a glance which frame the desired image is recorded on.
Screen, etc.) at the same time. FIG. 2 is a block diagram showing an example of a conventional player of an electronic still system having a multi-screen display function. In this example, when a floppy disk is set in a reproducing apparatus, a seek operation is automatically started to display multiple images of all tracks in a multi-display mode. . Floppy disk 4 for drive
Is mounted, the CPU 1 activates the motor driver 2, whereby the motor 3 drives the floppy disk 4 at a predetermined rotational speed. The head 5 starts seeking from the outermost track (track 0) and sequentially reads out the FM modulated video signals recorded on each of the tracks 1 to 50.

The read FM-modulated video signal is demodulated by a reproduction processing circuit 6 and reproduced into a predetermined video signal.
A part of the video signal is sent to the synchronization separation circuit 7, where the vertical synchronization signal and the horizontal synchronization signal are separated and output. The CPU 1 instructs the memory controller 8 constituting the multi-circuit block to capture a video signal to be read and reproduced from each track, and the memory controller 8 writes the video signal of each track to the memory 10. That is, the video signal output from the reproduction processing circuit 6 is converted into a digital signal by the A / D converter 9 and then written into the address space corresponding to the track indicated by the CPU 1.

When writing is completed, the memory controller 8 sends a signal to that effect to the CPU 1. The CPU 1 controls the switch 20 to switch to the output of the multi-circuit block, and instructs the memory controller 8 to read the data so that the number of multi-screens becomes a predetermined number. For example, 50
If it is a frame, 25 frames can be read at a time and all the frames can be displayed on two screens. The predetermined multi-screen is read from the memory 10 and converted into an analog signal by the D / A converter 11, and then subjected to field interpolation processing by a circuit (not shown) and reproduced on a display.

[0005]

Generally, when writing an image, a multi-circuit block is thinned out in accordance with the number of multi-images, and therefore, there is a problem that a diagonal portion of the multi-image is jagged. SUMMARY OF THE INVENTION It is an object of the present invention to provide a multi-memory fetching method which can smooth an oblique portion of a multi-screen and improve the S / N of the multi-screen in a multi-screen display function.

[0006]

According to the present invention, there is provided a multi-memory fetching system according to the present invention, comprising: a reproducing apparatus of an electronic still camera system having a multi-screen display function; A reproduction processing circuit for demodulating and reproducing the FM-modulated video signal, and a 1H delay circuit output for delaying the output of the reproduction processing circuit by 1H
And an arithmetic averaging circuit for performing arithmetic averaging by adding the outputs of the reproduction processing circuit, and an input connected to the output of the arithmetic averaging circuit to A / D convert video signals of a plurality of frames and writing them to the memory A multi-circuit block for creating a multi-image by reading the video signals of a plurality of frames written in the memory so as to be multi-divided and displayed on one screen, and switching between the output of the multi-circuit block and the output of the arithmetic averaging circuit And a switching unit for selection.

[0007]

According to the above construction, since the multi-screen is created by taking the video signal after the arithmetic averaging as the multi-screen signal, the S / N of the image is improved and the jagged portions in the oblique lines become less noticeable.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in more detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a reproducing apparatus employing a multi-memory fetch method according to the present invention. In FIG. 1, portions denoted by the same reference numerals as those in FIG. 2 are portions performing the same function. The 1H delay circuit 12 is connected to the output of the reproduction processing circuit 6, and the output of the 1H delay circuit 12 and the output of the reproduction processing circuit 6 are arithmetically averaged by an adder 13. The output of the adder 13 is connected to the input of the A / D converter 9 of the multi-circuit block. The output of the D / A converter 11 and the output of the adder 13 of the multi-circuit block are switched by the switch 1
4 to be switched and output.

Further, the output of the 1H delay circuit 12 and the switch 1
The output terminal 4 is switched by the switch 15 and output. The output terminal of the switch 15 is set to 0.
The 5H delay circuit 16 is connected, and the output of the 0.5H delay circuit 16 and the output terminal of the switch 15 are switched by the switch 17 and output. The output terminal of the switch 17 is connected to the video output terminal. It is connected.

When the floppy disk 4 is mounted on the drive unit, the multi-screen display function is automatically started, or when a desired multi-screen display operation is performed by selecting a desired number of multi-screens during screen reproduction, a seek operation is performed. The FM-modulated video signal is read from the track thus obtained, and the reproduction processing circuit 6 performs demodulation and reproduction processing. The field recording video signal output from the reproduction processing circuit 6 is a 1H delay circuit 1
2, an adder 13, a 0.5H delay circuit 16, and an arithmetic averaging circuit including a switch. 1H in the adder 13
The delayed video signal and the currently output video signal are added to output an arithmetic average value.

The arithmetic averaged video signal is converted into a digital signal by an A / D converter 9 and then written into an address space of a memory 10 by a memory controller 8.
When writing is completed for a predetermined number of multi-pictures (all tracks in the case of automatic start-up), the CPU 1 controls the switches 14, 15, and 17 so that the output of the multi-circuit block is connected to the video output terminal ( Switch each switch to the side indicated by the dotted line). Then, it instructs the memory controller 8 to read the data so that the number of multi-screens becomes a predetermined number. A multi-screen with a good S / N is displayed on a display (not shown) connected to the video output terminal.

[0012]

As described above, according to the present invention,
In a playback device having a multi-screen display function, the video signal after arithmetic averaging is taken in as a multi-screen signal,
Since the multi-screen is created, the S / N of the multi-screen is improved. In addition, the smoothness of the oblique portion is improved accordingly.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a multi-memory fetch method according to the present invention.

FIG. 2 is a block diagram showing an example of a conventional multi-memory fetching method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... CPU 2 ... Motor driver 3 ... Motor 4 ... Floppy disk 5 ... Head 6 ... Reproduction processing circuit 7 ... Synchronous separation circuit 8 ... Memory controller 9 ... A / D converter 10 ... Memory 11 ... D / A conversion Device 12 1H delay circuit 13 Adder 14, 15, 17 Switcher 16 0.5H delay circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-273677 (JP, A) JP-A-63-131670 (JP, A) JP-A-1-177290 (JP, A) JP-A 64-64 44686 (JP, A) JP-A-63-179682 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5/781 H04N 5/91-5/956

Claims (1)

(57) [Claims] 1. A reproducing apparatus of an electronic still camera system having a multi-screen display function, a reproduction processing circuit for field demodulating reproduced FM modulated video signal recording format read from the recording medium, the output of the reproduction processing circuit 1H 1H delay circuit for delay
And an arithmetic averaging circuit for performing arithmetic averaging by adding the output of the reproduction processing circuit, and an input connected to the output of the arithmetic averaging circuit, performing A / D conversion of a plurality of frames of video signals and storing them in a memory. A multi-circuit block for creating a multi-image by writing and reading the video signals of a plurality of frames written in the memory so as to be displayed on the screen in a multi-divided manner; and an output of the multi-circuit block and an output of the arithmetic mean circuit. A multi-memory fetching method, comprising: a switching unit for performing switching selection.