JP3223227B2 - AGC circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AGC circuit of a receiver used in a communication system using a correlation detector, such as digital mobile communication.

[0002]

2. Description of the Related Art FIG. 3 shows an example of the configuration of a conventional AGC circuit, wherein 1 is an input terminal, 2 is an output terminal, 3 is a variable gain control amplifier that varies the gain by a control voltage, and 4 is the variable gain control amplifier 3. 5 is a low-pass filter that filters the output voltage of the detector 4, 8 is a detection voltage 6 that is the output voltage of the low-pass filter 5, and a reference voltage 7. Is a level comparator that compares

Next, the operation will be described. First, when the level of the signal input from the input terminal 1 changes, the detection voltage 6 changes accordingly, and the difference between this voltage and the reference voltage 7 is output from the level comparator 8 as the control voltage 9, and the output The gain of the variable gain control amplifier 3 is controlled so that the output level of the terminal 2 becomes constant.

[0004]

However, in a communication system using a correlation detector, a correlation value in one symbol section is detected and decoded. Therefore, when a change in gain occurs in one symbol section, the correlation value is degraded. However, the decoding characteristics deteriorate.
In this conventional circuit, there is a problem that a change in gain within one symbol interval is unavoidable, and therefore, the decoding characteristics as a receiver deteriorate.

The present invention solves such a conventional problem, and does not degrade the decoding characteristics of the correlation detector.
An object is to provide a GC circuit.

[0006]

According to the present invention, an AGC circuit synchronized with a symbol section (symbol clock) is constructed based on a sample and hold circuit, or an AGC circuit synchronized with a symbol section (symbol clock) based on a digital circuit.
A circuit for controlling the gain of a GC loop is configured to solve the above-described conventional problem.

[0007]

With the above arrangement, an AGC loop synchronized with a symbol section (symbol clock) is formed, so that it is possible to provide an AGC circuit which does not deteriorate the decoding characteristics of the correlation detector.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a first embodiment of an AGC circuit according to the present invention. In FIG. 1, reference numeral 10 denotes an input terminal, 11 denotes a gain control amplifier, and 12 denotes a detector for detecting an output signal level of the gain control amplifier 11. , 13 is a low-pass filter that filters the detection output voltage of the detector 12, 16 is a level comparator that compares the detection voltage 14, which is the output voltage of the low-pass filter 13, with a reference voltage 15, 17 is a sample and hold circuit for sampling or holding the output signal of the level comparator 16, 19 is a quadrature demodulator for performing quadrature demodulation on the output signal of the gain control amplifier 11, and 20 is an analog-digital output of the I signal of the quadrature demodulator 19. A / D converter for performing conversion, 21 is an A / D converter for performing analog-digital conversion of the Q signal output of the quadrature demodulator 19, and 22 is an A / D converter.
This is a correlation detector for detecting the correlation between the converted I signal and Q signal and reproducing the symbol clock.

Next, the operation will be described. First, the input terminal
When the level of the signal input from 10 changes, the detection voltage 14 changes accordingly, and the difference between this voltage and the reference voltage 15 is output as the control voltage 18 from the level comparator 16 and sent to the sample and hold circuit 17. Is entered. On the other hand, the output signal of the gain control amplifier 11 is input to the quadrature demodulator 19, and the I signal 24
And a Q signal 25, which are converted into digital signals by A / D converters 20 and 21, respectively, and input to a correlation detector 22, where a correlation value is detected in one symbol time and a symbol clock 23 is reproduced. Will be The control voltage 18 output from the level comparator 16 is sampled / held in synchronization with the symbol clock 23 generated in this manner, and the gain control amplifier 11 is controlled based on the sample / hold. In other words, in one symbol period, the control voltage 18 is held at the sampled value, and the gain of the gain control amplifier 11 is kept constant.

Therefore, since the gain of the circuit does not change within one symbol period, it is possible to provide an AGC circuit that does not deteriorate the decoding characteristics of the correlation detector 22.

Next, a second embodiment of the present invention will be described with reference to FIG. In the figure, the same parts as those in the first embodiment are denoted by the same reference numerals. FIG. 2 is a circuit diagram showing a second embodiment of the AGC circuit of the present invention. In the figure, reference numeral 10 denotes an input terminal, 26 denotes a digitally controlled variable attenuator, 27 denotes a fixed gain amplifier, and 12 denotes the fixed gain amplifier 27. A detector for detecting the output signal level; 28, an A / D converter for converting the detection output voltage of the detector 12 into a digital signal; 29, an adder for adding the converted digital signal; A divider 31 that divides the digital signal added in step (1), a ROM 31 that generates control data for variably controlling the digitally controlled variable attenuator 26 from the added digital signal and the digital signal divided by the divider 30 , 19 is a quadrature demodulator that performs quadrature demodulation on the output signal of the fixed gain amplifier 27, 20 is an A / D converter that performs analog-to-digital conversion of the I signal output of the quadrature demodulator 19, and 21 is the Q Signal output analyzer Grayed - performing digital conversion A / D converter, 22,
This is a correlation detector that detects the correlation between the A / D converted I and Q signals and reproduces the symbol clock.

Next, the operation will be described. First, the input terminal
A change in the level of the signal input from 10 is detected by the detector 12, a detection voltage is output, and the A / D converter 28 converts the voltage into a digital signal. The converted digital signal is averaged by an adder 29 and a divider 30 for n samples (n is a positive integer). The averaged digital signal of n samples is converted into a control digital signal for variably controlling the digitally controlled variable attenuator 26 by the ROM 31, and the digitally controlled variable attenuator is controlled so that the output of the fixed gain amplifier 27 becomes constant. The amount of attenuation is controlled to control the gain of this loop.

On the other hand, the output signal of the fixed gain amplifier 27 is input to the quadrature demodulator 19 and demodulated into an I signal 24 and a Q signal 25.
The signals are converted into digital signals by the A / D converters 20 and 21, respectively, and input to the correlation detector 22, where the detection of the correlation value in one symbol section and the reproduction of the symbol clock 23 are performed. In synchronization with the symbol clock 23 generated in this manner, the averaged digital signal of n samples is converted to R
By converting the data into control data for the digitally controlled variable attenuator 26 by the OM 31, the digitally controlled variable attenuator 26 is controlled in synchronization with the symbol clock 23.

This embodiment employs a digitally controlled variable attenuator 2
6, an AGC loop is configured by the fixed gain amplifier 27, the detector 12, the A / D converter 28, the adder 29, the divider 30, and the ROM 31, and the AGC operation by the ROM 31 is performed in synchronization with the symbol clock 23. Therefore, within one symbol period, the gain of the input circuit of the quadrature demodulator 19 is kept constant,
An AGC circuit that does not deteriorate the decoding characteristics of the correlation detector 22 can be provided.

[0015]

As is apparent from the above embodiment, the present invention operates the AGC loop in synchronization with the symbol clock obtained from the correlation detector, thereby enabling quadrature demodulation from the input terminal within one symbol period. It is possible to provide an AGC circuit in which the gain up to the input of the detector is kept constant and the decoding characteristic of the correlation detector is not deteriorated.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an AGC circuit according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the AGC circuit according to the present invention.

FIG. 3 is a circuit configuration diagram showing an example of a conventional AGC circuit.

[Explanation of symbols]

10 ... input terminal, 11 ... gain control amplifier, 12 ... detector,
13: low-pass filter, 16: level comparator, 17: sample and hold circuit, 19: quadrature demodulator, 20, 21, 28
... A / D converter, 22 ... Correlation detector, 26 ... Digital control variable attenuator, 27 ... Fixed gain amplifier, 29 ... Adder, 30 ... Divider, 31 ... ROM.

Claims (2)

(57) [Claims] 1. A gain control amplifier, a detector for detecting an output signal of the gain control amplifier, a low-pass filter for filtering an output voltage of the detector, and an output voltage of the low-pass filter A level comparator for comparing an output signal of the gain control amplifier with a reference voltage, a quadrature demodulator for quadrature demodulating an output signal of the gain control amplifier, an A / D converter for analog-to-digital conversion of output I and Q signals of the quadrature demodulator, this converted the I, sample sample / hold in synchronism with the correlation detector, the output of the level comparator at symbol time reproduced by the correlation detector for performing correlation <br/> discovery of the Q signal An AGC circuit comprising a hold circuit, wherein the gain of the gain control amplifier is controlled by an output signal of the sample hold circuit. 2. A digitally controlled variable attenuator, a fixed gain amplifier for amplifying a signal passing through the digitally controlled variable attenuator, a detector for detecting an output signal of the fixed gain amplifier, and an output voltage of the detector. An A / D converter for performing analog-to-digital conversion, an adder for adding the output data of the A / D converter, a divider for dividing the output data of the adder, and an output signal of the fixed gain amplifier for orthogonalizing a quadrature demodulator for demodulating the output I, analog Q signals of the quadrature demodulator - an a / D converter for digitally converting, the converted the I, and the correlation detector for performing correlation discovery of the Q signal, The correlation detection is performed from the output data of the adder and the divider.
A ROM for generating control data for variably controlling the digitally controlled variable attenuator in synchronization with the symbol time reproduced by the output device; and variably controlling the digitally controlled variable attenuator by an output signal of the ROM. Characteristic AGC circuit.