JP3223673B2 - Three-phase full-wave rectifier for automotive alternator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-phase full-wave rectifier for an automotive alternator using MOS power transistors. INDUSTRIAL APPLICABILITY The three-phase full-wave rectifier of the automotive alternator according to the present invention can be applied to a so-called alternator driven by an engine, an alternator capable of generating electric power for regenerating kinetic energy during vehicle braking as electric power, and a traveling motor for electric vehicles.

[0002]

2. Description of the Related Art A three-phase device having a high-side semiconductor power element and a low-side semiconductor power element for individually connecting each end of a three-phase armature winding of an automotive alternator with a high-order end and a low-order end of a battery, respectively. A three-phase full-wave rectifier, comprising: a full-wave rectifier; and a controller for synchronously connecting and disconnecting each semiconductor power element. For example, Japanese Patent Application Laid-Open No. 4-138030 discloses that a MOS power transistor is used as the semiconductor power element.

That is, an N-channel MOS power transistor type three-phase full-wave rectifier shown in the above-mentioned publication discloses a three-phase armature winding of an automotive alternator and three ends connecting a high end of a battery. It has a high-side MOS power transistor and three low-side MOS power transistors connecting each end of the three-phase armature winding and the lower end of the battery.

In this type of MOS power transistor, an N-type silicon substrate is used as one main electrode of the MOS power transistor in order to secure a withstand voltage and reduce on-resistance, and a surface of a P-type well region formed on a surface of a chip is formed. Vertical MO that forms an N ⁺ type region forming the other main electrode
Usually, an S power transistor structure is adopted.

[0005]

The three-phase full-wave rectifier using the MOS power transistor has a structure in which a parasitic diode serving as a PN junction diode of a conventional three-phase full-wave rectifier and a MOS power transistor are connected in parallel. Therefore, there is a possibility that the power loss can be reduced by the absence of the forward voltage drop of the junction diode as compared with a conventional three-phase full-wave rectifier using a silicon diode.

However, according to the analysis of the present inventors,
It has been found that the MOS power transistor type three-phase full-wave rectifier has the following problems. In vehicle alternators, as a measure against accidents in which voltage is instantaneously released when the output terminal of the generator comes off due to the large amount of magnetic energy stored in the three-phase armature winding or field coil, etc. The withstand voltage of each semiconductor power element of the three-phase full-wave rectifier needs to be set to be at least 20 times the battery voltage, that is, about 300 V, for example, the output rectified voltage of the three-phase full-wave rectifier.

In the enhancement type MOS power transistor, in principle, a parasitic diode Ds on the source connection side is generated between the well region and the source region, and a parasitic diode Dd on the drain connection side is formed between the well region and the drain electrode. Occurs. Here, taking an N-channel MOS power transistor as an example, connection of the P-type well region to either the source electrode or the drain electrode is usually performed because a potential needs to be applied to the P-type well region. In the three-phase full-wave rectifier of the AC generator, it is necessary to connect the P-type well region to the drain electrode (that is, short-circuit the parasitic diode Dd on the drain connection side).

That is, in the three-phase full-wave rectifier of the automotive alternator, when the P-type well region and the source electrode are connected to short-circuit the parasitic diode Ds on the source connection side, the drain electrode of the high-side MOS power transistor is turned off. When the power generation voltage connected to is lower than the battery voltage, a reverse current (diode forward current) flows through the parasitic diode Dd on the drain connection side. Similarly, if the generated voltage connected to the source electrode of the low-side MOS power transistor rises above the voltage (ground potential) at the lower end of the battery, a reverse current (diode forward current) flows through the parasitic diode Dd on the drain connection side. I will. Therefore, in order to prevent the backflow of the current through the parasitic diode Dd, it is necessary to connect the P-type well region to the drain electrode and prevent the backflow by the parasitic diode Ds on the source connection side. This is the same for a P-channel MOS power transistor.

However, in the conventional MOS power transistor structure, as shown in FIG. 14 or FIG. 15, the P-type well region 103 and the N ⁺ type region 104 on the surface thereof are short-circuited, and the P-type well region The depletion layer 107 of the PN junction between the N-type epitaxial breakdown voltage layer 105 and the N-type epitaxial breakdown voltage layer 105 has to be extended toward the N-type epitaxial breakdown voltage layer to increase the off-state breakdown voltage.

That is, when the three-phase full-wave rectifier of the automotive alternator is constituted by the MOS power transistor structure, the N ⁺ type substrate 106 must be a source region and the N ⁺ type region 104 must be a drain region. Absent. However, in this case, the large source parasitic resistance Rs of the N-type breakdown voltage layer 105 is connected in series between the substantial source end S ′ and the source electrode.

The drain saturation current I of the MOS transistor
dsat ignores the threshold voltage Vt for simplicity, K is a proportional constant, ΔVgs is a gate-source voltage (Vg−Vs), Vg is a gate voltage, and Vs ′ = Vs + I
Assuming that dsat · Rs is substantially the potential of the source terminal S ′, Idsat = K (Vg−Vs ′) ² = K (ΔVgs−Idsat · Rs) ^2, that is, the drain saturation current (the maximum when a predetermined gate voltage is applied) The current Idsat is equivalent to the fact that the gate voltage Vg has decreased by the amount of Idsat · Rs. Note that changes in the threshold voltage Vt due to the substrate effect are also ignored.

For example, if the gate voltage is +20 V, the source (battery) potential is +12 V, the current is 100 A, and the source parasitic resistance Rs is 0.05 ohm, the actual source potential Vs' is 17 V and the channel current is Rs 0 Is reduced to 9/64 as compared with the case of. That is, it can be understood that the channel current is extremely reduced by a slight increase in the source parasitic resistance Rs. Hereinafter, this current decreasing effect, in other words, the channel resistance increasing effect is referred to as a source resistance feedback effect.

The above equation is for the drain current saturation region. Similarly, in the non-saturation region, the drain non-saturation current similarly decreases with an increase in Rs. Such a decrease in drain current means an increase in channel resistance,
It can be seen that an increase in the source parasitic resistance Rs causes a power loss due to an increase in channel resistance in addition to a power loss due to the source itself, resulting in a large power loss and heat generation as a whole.

Of course, the source parasitic resistance Rs can be reduced.
Although it is possible to make the N-type breakdown voltage layer 105 thinner,
As mentioned above, 300V is used for the vehicle alternator.
Since a high breakdown voltage is required, the N-type breakdown voltage layer 105 is thinned.
It is difficult. That is, a normal silicon MOS
In a power transistor, the breakdown field strength of silicon is
Approximately 30 V / μm.
If it is to be earned only by the layer 105, the voltage in the N-type
Even if the field strength is assumed to be constant, a thickness of 10 μm is required.
You. Actually, the electric field strength is concentrated near the PN junction.
The electric field strength near the PN junction is set to about 30 V / μm,
In order for the mold breakdown voltage layer 105 to bear 300 V,
About 20 μm or more is required, and the impurity concentration is about 1 × 1
0 ^FifteenAtom / cm^ThreeIt must be: To ensure pressure resistance
The N-type breakdown voltage layer 1 having such thickness and impurity concentration
05 is equivalent to the source parasitic resistance Rs described above.
Drain as described above with increase and therefore resistive loss
This leads to a decrease in current (a large increase in channel resistance),
As a result, the MOS power transistor type
Three-phase full-wave rectifiers are used in automotive alternator applications (ie, rear
In the field of inductance load), PN junction diode type
It is theoretically impossible to surpass a phase full-wave rectifier,
Since only the disadvantages of complex manufacturing and control remain,
There was no lit.

On the other hand, the MOS shown in FIG.
In the power transistor structure, the N ⁺ type region 104 is used as a source electrode, the N ⁺ type substrate 106 is used as a drain electrode,
It is conceivable to short-circuit the type well region 103 and the N ⁺ type drain region 106. However, in this method, the withstand voltage of 300 V described above is secured between the N ⁺ type region 104 and the P type well region 103 constituting the source electrode,
Gate electrode, P-type well region 107 and N ⁺ type region 10
It is extremely difficult to secure a withstand voltage between the first and second embodiments.

The present invention has been made in view of the above-mentioned drawbacks of the MOS power transistor type three-phase full-wave rectifier (for high withstand voltage use) for a vehicle AC generator, and has a low loss and a simple cooling. It is an object of the present invention to provide a MOS power transistor type three-phase full-wave rectifier for an AC generator. A second object of the present invention is to provide a vehicle alternator M having a simple structure.
An OS power transistor type three-phase full-wave rectifier is provided.

[0017]

The three-phase full-wave rectifier of the automotive alternator according to the first invention connects each end of the three-phase armature winding of the automotive alternator to a higher end of the battery. High-side NMOS power transistor and battery voltage
Having a parasitic diode to stop the vehicle alternator.
A low- side NMOS power transistor or diode that connects each end of the three-phase armature winding to the lower end of the battery.
And a three-phase full-wave rectifier of an automotive alternator for converting a generated voltage of the three-phase armature winding into a DC voltage and supplying power to the battery .
The P-well region of the NMOS power transistor is
The high side NMO is formed separately from the well region.
Parasitic die on battery blocking side of S power transistor
The battery through a high-resistance element connected in parallel with the
It is characterized in that a potential is applied from the high end of the rib .

In the first aspect, the high-side NM
The OS power transistor has a drain electrode
Connected to one of the AC output terminals of each phase of the vehicle alternator.
A high-concentration N-type substrate, and a low-concentration N-type substrate formed on the substrate.
A N-type breakdown voltage layer and a P formed on the surface of the breakdown voltage layer.
Formed in the surface of the P-type well region and the P-type well region.
To form a source electrode connected to the high end of the battery.
Forming a high-concentration N-type source region and the P-type well region;
On the surface of the region through an insulating film, and
N-type channel for conducting between the source region and the withstand voltage layer
And a gate electrode to be formed . In the second aspect, the well region is formed using single crystal SiC as a material, and the high-resistance body is formed of an alloy layer of a metal electrode provided on a surface of the well region and SiC forming the well region. .

A three-phase full-wave rectifier for a vehicle alternator according to a second invention has a parasitic diode for blocking a battery voltage.
Each end of the three-phase armature winding of the vehicle alternator and the battery
High-side NMOS power transformer connecting
And a three-phase armature winding of the vehicle alternator.
Low-side NM connecting each end to the lower end of the battery
An OS power transistor;
The generated voltage of the armature winding is converted into a DC voltage to
The three-phase full-wave rectifier of a vehicle alternator that feeds power
The P of the low-side NMOS power transistor
The well region is formed separately from the P-well region and
Low side NMOS power transistor battery
High resistance connected in parallel with the voltage blocking parasitic diode
The three-phase armature winding of the vehicle alternator through the body
, And is supplied with a potential from

[0020]

[0021]

[0022]

In the three-phase full-wave rectifier of the automotive alternator according to the present invention , a high-side NMOS power supply is provided.
The p-well region of the transistor is the high-side NMO
The parasitic diode on the battery side of the S power transistor
The high level of the battery through a high resistance connected in parallel
The potential is applied from the end, and the low-side rectifier
MOS transistor having a parasitic diode for preventing re-voltage
It is composed of a resistor or a diode.

That is, in the MOS power transistor having the high-resistance element (hereinafter, referred to as a high-resistance built-in MOS power transistor), a potential is applied to the well region through the high-resistance element. This high resistance built-in M
When the OS power transistor is used on the high side of the three-phase full-wave rectifier of the automotive alternator, the potential of the drain connected to any one of the output terminals of each phase of the three-phase armature winding is changed to the high terminal potential of the battery. When the current further decreases, the current flowing backward through the series circuit of the parasitic diode Dd (on the drain connection side) between the well region and the drain region and the high-resistance element becomes very small due to the resistance of the high-resistance element. There is no practical problem.

Similarly, when this high-resistance built-in MOS power transistor is used on the low side of a three-phase full-wave rectifier of an automotive alternator, it is connected to one of the output terminals of each phase of a three-phase armature winding. When the drain potential rises above the low-potential of the battery, the current flowing backward through the series circuit of the parasitic diode Dd (on the drain connection side) between the well region and the drain region and the high-resistance element has a high resistance. Since it is very small due to body resistance, there is no practical problem.

Therefore, in this MOS power transistor with a built-in high resistance element, it is not necessary to short-circuit the well region and the drain region in order to apply a potential to the well region. This has the following effects. First, a breakdown voltage layer can be provided between the well region and the drain region.
This means that there is no need to provide a breakdown voltage layer between the source electrode and the beginning of the channel, so that large power loss and heat generation based on the source parasitic resistance Rs can be significantly reduced as described above.

[0026] Particularly, in the NMOS power transistor of the high side, source over the ground potential so is substantially fixed to the high end potential of the battery, it can be significantly reduced its power loss and heat generation on the basis of the reduction of the source resistance feedback effect , Cooling and arrangement are also simplified. In addition, the NMOS transistor on the high side
P-well region of power transistor is equal to source region potential
Fixed to a substantially constant battery potential.
However, when the potential of the P-well region fluctuates, the P-well area is changed.
Potential difference between the region potential and the source region potential,
The potential difference between the ground potential and the gate electrode potential fluctuates,
Characteristics of high-side NMOS power transistor
Can be prevented from fluctuating, and each high side
Gate control voltage of the NMOS power transistor
Constant battery voltage as a reference,
The port control voltage forming circuit is simplified. Also high side
High-resistance body built in MOS power transistor
Current flowing back through the low-side diode or
Parasitic diode of low side MOS power transistor
Of the DC power loss
Loss can also be prevented.

According to the second embodiment, a high-resistance element can be easily formed, and the resistance loss due to the drain-side breakdown voltage layer can be reduced. Note that conductive ions can be implanted into the junction interface between the source region and the well region as a high-resistance body, and the well region and the source electrode can be connected by a polysilicon layer having a predetermined resistivity. .

[0028] The high-side element referred to here is a three-phase
Refers to the semiconductor power element on the high side of the
The side element is the semiconductor power supply on the low side of the three-phase full-wave rectifier.
Refers to a force element.

[0029] In addition, the MOS power transistor
The N + type substrate constituting the in-electrode and the N-type
The source parasitic resistance Rs
The pressure resistance can be earned without the need.

[0030] The withstand voltage of SiC is 10 times that of Si.
As described above, the drain withstand voltage layer is thin and has high impurity
Concentration, that is, the resistance of the breakdown voltage layer can be significantly reduced.
it can. Construct a three-phase full-wave rectifier for automotive alternators
MOS power transistor is 100V or less as described above.
It requires high withstand voltage such as above, but nevertheless
The power loss of the SiC breakdown voltage layer can be reduced.

[0031]

(Embodiment 1) The overall structure of a so-called alternator for a vehicle AC generator of this embodiment driven by a vehicle engine will be described with reference to FIG. The generator outer shell is composed of a pair of drive frame 1 and rear frame 2,
They are directly connected by a plurality of stud bolts 15 or the like.

A stator core 3 is fixed to the inner periphery of the frames 1 and 2, and a three-phase armature winding 5 is wound around the stator core 3. The bearings 13 and 14 fixed to the frames 1 and 2 rotatably support the shaft 9, and the rotor core 6 is fixed to the shaft 9 at the inner periphery of the stator core 3. A field coil 10 is wound around the rotor core 6, and cooling fans 11 and 12 are disposed on both end surfaces of the pole cores 7 and 8. Outside the rear frame 2, a voltage regulator 18 with a built-in three-phase full-wave rectifier 19 is attached.

Next, the circuit configuration of the automotive alternator of this embodiment will be described with reference to FIG. Voltage regulator 18
Is composed of a three-phase full-wave rectifier 19 and a voltage regulator 20. The three-phase full-wave rectifier 19 is a three-phase full-wave rectifier including N-channel enhancement type MOS power transistors 19a to 19f made of single crystal SiC, and the high-side transistors 19a to 19c are three-phase armature windings. Each phase output terminal of the line 5 is connected to the high-order terminal of the battery 21, and the low-side transistors 19d to 19d
9f connects the output terminal of each phase of the three-phase armature winding 5 to the lower end of the battery 21.

The voltage adjusting section 20 is connected to the field winding 10 via the brush 16 and the slip ring 17 and is mounted on the same substrate (not shown) as the three-phase full-wave rectifier 19. Such a three-phase full-wave rectifier 19 and the voltage regulator 2
Mounting 0 on the same substrate enables wiring to be shortened. Further, the voltage adjusting unit 20 receives the generated voltages of the respective phases from the output terminals of the respective phases of the three-phase armature winding 5, and based on these input signals, the MOS power transistors 19a to 19f.
The gate voltage applied to each gate electrode is controlled.

The operation of the above device will be described below. The rotor core 6 is rotated by an engine (not shown), and the voltage adjuster 20 of the voltage adjuster 18 reads the voltage of the battery 21 and turns on the field coil 10 so that the voltage becomes constant.
When the FF control is performed, a three-phase AC voltage is induced in the three-phase armature winding 5, whereby the DC current that is full-wave rectified by the three-phase full-wave rectifier 19 charges the battery 21, and is generated by the vehicle electronic load or the like. Consumed. The cooling fans 11, 12 rotate to cool the field coil 10, the three-phase armature winding 5, the voltage regulator 18, and the like.

Next, the opening / closing control of the MOS power transistors 19a to 19f of the three-phase full-wave rectifier 19 by the voltage adjusting unit 20 will be described. The voltage adjustment unit 20 outputs the generated voltage V of each phase, which is the potential of the output terminal of the three-phase armature winding 5 of each phase.
u, Vv, and Vw are read, and the interphase power generation voltage Vu−V
v, Vu-Vw, Vv-Vu, Vv-Vw, Vw-V
u, Vw-Vv, the interphase power generation voltage having the largest positive value and greater than the terminal voltage of the battery 21 is selected, and the high-side MOS power is selected so that the selected interphase power generation voltage is applied to the battery 21. Transistors 19a-
One of the MOS power transistors 19c and one of the low-side MOS power transistors 19d to 19f are turned on. Thereby, the battery 21 is transferred from the selected three-phase armature winding.
Is supplied with a charging current.

A reverse current flows through the parasitic diode Dd of the off-operation MOS power transistor and the high-resistance element 120 connected thereto among the high-side MOS power transistors 19a to 19c. For example, if each phase power generation voltage Vv is lower than the battery voltage, the above-mentioned reverse current flows. However, this backflow current is limited by the high-resistance body 120 (preferably 150 ohms or more), so that there is no problem in practical use.

The voltage regulator 20 detects the terminal voltage of the battery 21 in the same manner as a normal regulator, compares the detected voltage with a preset reference voltage, and intermittently switches the exciting current based on the magnitude of the detected voltage. Controlling to maintain the terminal voltage of the battery 21 at the target level is the same as before. The details of the MOS power transistor type three-phase full-wave rectifier 19 using SiC will be described below with reference to FIGS. 3, 4 and 5. However, FIG. 3 shows the MOS of this embodiment.
FIG. 7A is an inverter circuit showing one phase portion of a power transistor type three-phase full-wave rectifier, where FIG. 7A shows an N-channel MOS power transistor and FIG. 4 and 5 show a part of the cross-sectional structure of the MOS power transistors 19a to 19f.

In the inverter circuit of the N-channel MOS power transistor shown in FIG. 3A, the three-phase armature winding 5 has the drain electrode D of the high-side MOS power transistor 101 and the source electrode S of the low-side MOS power transistor 102. , The drain electrode D of the low-side MOS power transistor 102 is connected to the lower end of the battery 21, and the high-side MOS power transistor 102 is connected to the low-side MOS power transistor 102.
The source electrode S of the power transistor 101 is the battery 2
1 high end. Note that the direction of the charge current and the direction of electron movement during battery charging are opposite, and the source electrode refers to an electrode on the side that injects carrier charge into the channel during charging.

MOS power transistors 101 and 102
In this case, a P-type well region 103 described later, that is, a gate electrode 1
A parasitic diode Ds on the source connection side and a parasitic diode Dd on the drain connection side are generated between the region immediately below P.01 and the source electrode S or the drain electrode D as shown in FIG.
The P-type well region 103 of the high-side MOS power transistor 101 is connected to the source electrode S through the high-resistance element 120 because of the need to apply a potential to the type well region 103. On the other hand, also in the low-side MOS power transistor, the P-type well region 103 and the drain electrode D are short-circuited because a potential needs to be applied to the P-type well region 103. The reason is as described above.
Thereby, the low-side MOS power transistor 1
The parasitic diode Ds on the source connection side at 02 prevents the backflow from the battery 21.

On the other hand, the high-resistance element 120 having a high resistance value of, for example, 150 ohms or more is used when the generated voltage, that is, the drain potential of the high-side MOS power transistor 101 is lower than the battery potential, or when another MOS power transistor (not shown) is used. Is turned on,
The current compresses the backflow of the current through the parasitic diode Dd on the drain connection side to an allowable range.

Next, a part of the sectional structure of the high-side MOS power transistor 101 of the three-phase full-wave rectifier 19 shown in FIG. 3A will be described with reference to FIG. An N-type breakdown voltage layer 105 is formed on a SiC N ⁺ -type substrate 106 by epitaxial growth, a P-type well region 103 is formed on the surface of the N-type breakdown voltage layer 105 by ion implantation of aluminum, and a P-type well region is further formed. An N ⁺ -type region 104 is formed on the surface of 103 by ion-implanting nitrogen. Then, only a region where a trench is to be formed on the surface of the wafer is opened and masked with a resist or an insulating film while a well-known R.S.
i. A trench 108 is recessed by E dry etching. Thereafter, a gate insulating film 109 made of a silicon oxide film is formed on the surface of the trench 108 by a thermal oxidation method. Thereafter, a gate electrode 110 made of doped polysilicon is formed in the trench 108. Form. Thereafter, a field insulating film (not shown) is opened by photolithography, the nickel electrode 111 is brought into contact with the N ⁺ type region (source electrode) 104 and the P type well region 103, and the gold electrode 112 is connected to the N ⁺ type substrate (drain). The device is completed by contacting the electrode 106.

The nickel electrode 111 is formed by sputtering or vacuum evaporation, and
A high resistance layer (not shown) of nickel and SiC is formed between the mold well region 103 and the high resistance layer 1.
20. . Further, the high-side MOS power transistor 101 of FIG.
Since the N ⁺ -type region 104 forms the source electrode S, the N ⁺ -type substrate 106 forms the drain electrode D, and the N-type breakdown voltage layer 105 is disposed on the drain side, the source parasitic resistance Rs is ensured while ensuring a high breakdown voltage. Can be remarkably reduced, and as a result, both high breakdown voltage and low resistance can be achieved.

Further, the resistance of the N-type breakdown voltage layer 105 can be significantly reduced by employing SiC, and the power loss can be remarkably improved. FIG. 4 is another example of FIG. Next, FIG.
A part of the cross-sectional structure of the low-side MOS power transistor 102 of the three-phase full-wave rectifier 19 will be described with reference to FIG. N-type withstand voltage layer 10 on SiC N ⁺ -type substrate 106
5 is formed by epitaxial growth, and N-type breakdown voltage layer 1 is formed.
A P-type well region 103 is formed by ion-implanting aluminum into the surface portion of the substrate 05, and an N ⁺ -type region 104 is formed by ion-implanting nitrogen into the surface portion of the P-type well region 103. Then, only a region where a trench is to be formed on the surface of the wafer is opened and masked with a resist or an insulating film while a well-known R.S. i. A trench 108 is recessed by E dry etching. Thereafter, a gate insulating film 109 made of a silicon oxide film is formed on the surface of the trench 108 by a thermal oxidation method. Thereafter, a gate electrode 110 made of doped polysilicon is formed in the trench 108. Form.
After that, the metal electrode 111 is connected to an N ⁺ type region (drain electrode).
The device is completed by contacting the metal electrode 112 with the N ⁺ -type substrate (source electrode) 106. FIG. 14 is another example of FIG.

Therefore, in this embodiment, when the MOS power transistor is off, a high voltage (for example, +3
When (00V) is applied between the source electrode 106 and the drain electrode 111, a depletion layer mainly extends to the N-type breakdown voltage layer 105 to withstand this high voltage. As a result, the N-type breakdown voltage layer 105 becomes the source feedback resistance Rs, and generates power loss due to its own resistance and the effect of increasing the channel resistance as described above. However, in this embodiment, since single crystal SiC is used as a material, the thickness and impurity concentration of the N-type breakdown voltage layer 105 can be significantly improved as compared with conventional Si.

Hereinafter, the breakdown voltage of the N-type breakdown voltage layer 105 is set to 300V.
In this case, the design conditions of the N-type breakdown voltage layer 105 are considered. S
For i, the breakdown field strength is about 30 V / μm;
Assuming that the withstand voltage of 300 V is easily borne by the N-type withstand voltage layer 105, the required thickness of the withstand voltage layer is about 20 μm, the impurity concentration thereof is 1 × 10 ¹⁵ atoms / cm ³ , and the resistivity is about 5Ω · c.
m.

On the other hand, the breakdown electric field strength of SiC is set to 400 V /
cm, the required thickness of the N-type breakdown voltage layer 105 is about 4 μm.
m, the impurity concentration is 2 × 10 ¹⁶ atoms / cm ³ , and the resistivity is about 1.25 Ω · cm. Therefore, M of SiC
The resistance of the N-type breakdown voltage layer 105 of the OS power transistor is S
This means that the resistance can be reduced to 1/20 of the resistance of the N-type breakdown voltage layer 105 of the i-th MOS power transistor.

After all, the source parasitic resistance Rs in the low-side SiC MOS power transistor is S
i can be reduced to 1/20 compared to i, and the channel resistance can be greatly reduced accordingly as described above. Of the three-phase full-wave rectifier 19 can be realized.

That is, NC due to the use of SiC
By improving the breakdown electric field strength of the mold breakdown voltage layer 105,
It has been found that a three-phase full-wave rectifier 19 having excellent efficiency which cannot be predicted from the conventional one can be realized. Naturally, the above relationship is the same when a high voltage other than 300 V is applied to the N-type breakdown voltage layer 105. Next, the Si diode manufactured with the same chip size and the same design rule and the Si M
6 to 8 show voltage-current characteristics of the OS power transistor and the SiC MOS power transistor. However, their withstand voltage is set to 250V. 6 shows the characteristics of the Si diode, FIG. 7 shows the characteristics of the Si MOS power transistor, and FIG. 8 shows the test characteristics of the SiC MOS power transistor. As can be seen from FIGS.
Under the condition of an output current of 75 A, the three-phase full-wave rectifier 19 of the present embodiment has a power loss of 9 times as compared with the conventional three-phase full-wave rectifier.
It became possible to reduce it by 0% or more.

FIG. 9 shows an example of a calculation result of the on-resistance when the required breakdown voltage of the MOS power transistor is changed. Note that this on-resistance is determined by the channel resistance and N
The sum of the resistance of the N-type breakdown voltage layer 105 and the resistance of the N-type breakdown voltage layer 105 is dominant in the high breakdown voltage region as shown in FIG.

That is, although the channel resistance itself hardly changes even when the withstand voltage increases (when the increase in the channel resistance due to the feedback effect due to the increase in the source parasitic resistance Rs is ignored), the resistance of the N-type withstand voltage layer 105 is equal to the withstand voltage. While maintaining a positive correlation. Accordingly, although the on-resistance increases in proportion to the breakdown voltage in the vicinity of 25 V in the case of Si, the increase in the resistance of the N-type breakdown voltage layer 105 is almost negligible in the case of SiC up to the breakdown voltage of 250 V.
It can be seen that the ON resistivity slowly increases only after exceeding 0V. (Embodiment 2) Another embodiment of the present invention will be described with reference to FIG.

In this embodiment, contrary to the first embodiment, the high-resistance element 120 is incorporated in the low-side MOS power transistors 19d to 19f, and the same effects as in the first embodiment can be obtained. (Embodiment 3) Another embodiment of the present invention will be described with reference to FIG.

In this embodiment, the low-side MOS power transistors 19d to 19f of the first embodiment are
This is replaced with an N-junction diode, and similar effects can be obtained although not as much as in the first embodiment. Of course, Example 2
, The high-side MOS power transistor 19
a to 19c may be replaced with PN junction diodes. (Embodiment 4) Another embodiment of the present invention will be described with reference to FIG.

In this embodiment, the second embodiment (see FIG. 10)
High-side MOS power transistors 19a-19
c are integrated on one chip, and the N ⁺ type substrate 10
6 is a high-side MOS power transistor 19a-
19c, a common source electrode S is formed, and P-type well regions 103a to 103c of respective phases are individually formed on the substrate 106 sufficiently apart from each other by a distance that cannot be punched through.
N ⁺ -type drain regions 104a to 104c are individually formed on the surface of each of the P-type well regions 103a to 103c, and a gate electrode is formed on the surface of each of the P-type well regions 103a to 103c via an insulating film 109. 110a-11
0c is provided, and the drain regions 104a to 104c are individually connected to the breakdown voltage layer 105 by the gate electrodes 110a to 110c.

In this way, there is an excellent effect that a half bridge composed of three high-side MOS power transistors 19a to 19c can be integrated on one chip without increasing the number of steps. In addition, each MOS
Since the power loss of the power transistors 19a to 19c is small, it is also possible to prevent each element from becoming hot due to the integration. (Embodiment 5) Another embodiment of the present invention will be described with reference to FIG.

In this embodiment, the second embodiment (see FIG. 10)
The N ⁺ type substrate 106 constitutes a common drain electrode D of the low-side MOS power transistors 19d to 19f, and the P type well regions 103d to
103f are individually formed sufficiently apart from each other by a distance that cannot be punched through, and each P-type well region 103d to 103d is formed.
On the surface portion of f, N ⁺ -type source regions 104 d to
104f are individually formed, and each P-type well region 103d is formed.
Gate electrodes 110d to 110f are provided on the surface portions of to 103f through an insulating film 109.
4d to 104f are individually conducted to the breakdown voltage layer 105 by the gate electrodes 110d to 110f.

In this manner, there is an excellent effect that a half bridge composed of three high-side MOS power transistors 19d to 19f can be integrated on one chip without increasing the number of steps. In addition, each MOS
Since the power loss of the power transistors 19d to 19f is small, it is also possible to prevent each element from becoming hot due to the integration.

In the above description, the three-phase full-wave rectifier 19 of the automotive alternator has been described. However, since the three-phase full-wave rectifier 19 of the present embodiment can be switched, the switching for generating the three-phase AC voltage is performed. Obviously, it can be adopted or shared as an inverter circuit .

( Analysis of Relationship Between Breakdown Voltage and Resistance Value of Si-MOS Power Transistor and SiC-MOS Power Transistor) The MOS power transistor 1 of each of the above-described embodiments is analyzed.
9a to 19f are made of 6H-SiC and have a withstand voltage of 250V.
The three-phase full-wave rectifier 19 for a vehicle AC generator using the 6H-SiC MOS power transistors 19a to 19f, and the vehicle AC generator using a Si MOS power transistor. The analysis result of the resistance value with the three-phase full-wave rectifier 19 (see FIG. 9) will be theoretically described below. However, here, the effect of increasing the channel resistance due to the feedback effect of the source parasitic resistance Rs is neglected.
The circuit structure is the vertical structure shown in FIG. 5, and the chip area is equal.

The resistance R of the transistor is the sum of the channel resistance rc and the resistance rb of the N ⁺ -type breakdown voltage layer 105, and rc = L / W · (1 / μs · εs · εo) ⁻¹ · (Tox / ( Vg−Vt)) If rb = 4Vb ² · (1 / μ · εs · εo · Ec · A), the SiC MOS power transistor has a resistance value of about 1/15 compared to the Si MOS power transistor. Was.

However, the breakdown electric field strength Ec is 3 × 1 for Si.
0^Five, SiC is 3 × 10⁶V / cm, the relative permittivity εs is S
i is 11.8, SiC is 10.0, and area A is 1 for both.
mm ^Two, Vb are breakdown voltages (breakdown voltage). Change
Μ is the bulk mobility of electrons, and Si is 110
0, SiC is 370cm^Two/ (VS), channel length
L is 1 μm for both, and channel width W is 222 for both.
μm and μs are electron channel mobilities, and Si is
500, 100 cm for SiC^Two/ (VS).

From the above equation, it was found that the resistance value of SiC was smaller at a breakdown voltage of 50 V or more. In the above calculation, since the substrate is used as the drain, when the substrate is used as the source, the resistance of Si should increase significantly due to the increase in the channel resistance due to the feedback effect of the source parasitic resistance Rs described above. Therefore, even if the design rule slightly changes, it can be presumed that the SiC MOS power transistor has a low resistance when the breakdown voltage is 100 V or more.

Although the P-type well regions 103a to 103f are formed by ion implantation in FIGS. 12 and 13, they may be formed by epitaxial growth.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an automotive alternator according to an embodiment.

FIG. 2 is a sectional view of the vehicle alternator of FIG. 1;

FIG. 3 is an equivalent circuit diagram of an inverter circuit showing one phase of the three-phase full-wave rectifier of FIG. 1;

FIG. 4 is a partially enlarged sectional view showing an example of a MOS power transistor constituting the three-phase full-wave rectifier of FIG.

FIG. 5 is a partially enlarged cross-sectional view showing an example of a MOS power transistor constituting the three-phase full-wave rectifier of FIG.

FIG. 6 is a voltage-current characteristic diagram of a conventional PN diode made of Si.

FIG. 7 is a voltage-current characteristic diagram of a conventional MOS power transistor made of Si.

FIG. 8 is a voltage-current characteristic diagram of a MOS power transistor using SiC as a material according to the present embodiment.

FIG. 9 is a diagram showing a relationship between a withstand voltage and a channel resistance of the MOS power transistors of FIGS. 7 and 8;

FIG. 10 is an equivalent circuit diagram showing a second embodiment.

FIG. 11 is an equivalent circuit diagram showing a third embodiment.

FIG. 12 is a sectional view showing a fourth embodiment.

FIG. 13 is a sectional view showing a fifth embodiment.

FIG. 14 is a partially enlarged sectional view showing an example of a MOS power transistor constituting the three-phase full-wave rectifier of FIG. 1 or a conventional three-phase full-wave rectifier.

FIG. 15 is a partially enlarged cross-sectional view showing an example of a MOS power transistor constituting the three-phase full-wave rectifier of FIG. 1 or a conventional three-phase full-wave rectifier.

[Explanation of symbols]

5 is a three-phase armature winding, 21 is a battery, 19a to 19c
Is the high-side MOS power transistor, 19d-1
9f is a low-side MOS power transistor, 19 is a three-phase full-wave rectifier, 20 is a voltage regulator, 18 is a voltage regulator, and 120 is a high-resistance element.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-138030 (JP, A) JP-A-5-90927 (JP, A) JP-A-5-114606 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H02M 7/219

Claims (4)

(57) [Claims] 1. Each end of a three-phase armature winding of an automotive alternator
High-side NMOS connecting the high end of the battery
Power transistor and, The vehicle having a parasitic diode for blocking battery voltage
Each end of the three-phase armature winding of the dual-use alternator and the low battery
To connect Low-side NMOS power transition
StarOr a diode,  And the generated voltage of the three-phase armature winding is directly controlled.
AC power supply for vehicles that converts the
In electric three-phase full-wave rectifiers,The P-well of the high-side NMOS power transistor
Area is The high side of the high side is formed separately from the P well region.
Near the battery voltage blocking side of the NMOS power transistor
Through a high-resistance element connected in parallel with the raw diode
Potential is applied from the high end of the battery It is characterized by
Three-phase full-wave rectifier for automotive alternators. 2. The high-side NMOS power transistor
The star constitutes a drain electrode to form each of the alternating
A high-concentration N-type substrate connected to one of the flow output terminals, a low-concentration N-type breakdown voltage layer formed on the substrate, and a P-type well region formed on the surface of the breakdown voltage layer; The battery formed on the surface of the P-type well region;
High concentration N forming a source electrode connected to the high-order terminal of
A source region of the P type and a surface portion of the P type well region via an insulating film.
And makes the source region and the breakdown voltage layer conductive.
2. A vehicle communication system according to claim 1 , further comprising a gate electrode forming an N-type channel.
Three-phase full-wave rectifier for flow generators. 3. The well region is formed using single-crystal SiC as a material, and the high-resistance body includes a metal electrode disposed on a surface of the well region and SiC forming the well region.
The three-phase full-wave rectifier for an automotive alternator according to claim 1 or 2, comprising an alloy layer of: 4. A parasitic diode for blocking a battery voltage.
And each end of the three-phase armature winding of the vehicle alternator and the battery
High-side NMOS power connecting high end of battery
Transistors and Each end of the three-phase armature winding of the vehicle alternator and the battery
Low-side NMOS power to connect to the lower end of the
With a transistor, And the generated voltage of the three-phase armature winding is directly controlled.
AC power supply for vehicles that converts the
In electric three-phase full-wave rectifiers, P-well of the low-side NMOS power transistor
Area is The low side of the low side is formed separately from the P well region.
Near the battery voltage blocking side of the NMOS power transistor
Through a high-resistance element connected in parallel with the raw diode
Potential is applied from the three-phase armature winding of the vehicle alternator.
Three-phase full-wave vehicle alternator characterized by
rectifier.