JP3230182B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device. More specifically, the present invention relates to a technique for forming a contact hole in a semiconductor device having two or more layers of metal wiring and using a silicon oxide film formed by ECR plasma CVD as an insulating film between metal wirings.

[0002]

2. Description of the Related Art When an upper metal wiring and a lower metal wiring are electrically connected via a contact hole provided in the interlayer insulating film, moisture contained in the interlayer insulating film corrodes the metal wiring and increases its resistance. Therefore, reduction is desired. As a method of reduction, after processing metal wiring,
There is known a method of forming an oxide film and performing a water-resistant treatment on its surface. However, moisture may be absorbed before the treatment. Chemical mechanical polishing (C
When using the MP) technique, surface treatment alone is not sufficient, and it is necessary to provide water resistance throughout the inside. Here, generally, an ECR plasma CVD oxide film (hereinafter, ECR)
—SiO ₂ film) is more effective as a moisture diffusion barrier because it has more Si—H bonds than an oxide film formed by other methods. Therefore, an ECR-SiO ₂ film is excellent as an interlayer insulating film between metal wirings.

[0003] insulating film between metal wires using ECR-SiO ₂ film, after planarizing by CMP technique, the connection between the upper and lower metal wiring hole (hereinafter, referred to as a contact hole)
FIG. 2 shows a schematic process cross section in the case of forming. In FIG.
11 denotes a semiconductor substrate, 12 denotes a silicon oxide film, 13 denotes a lower metal wiring, 14 denotes an ECR-SiO ₂ film, 15 denotes a photoresist, 16 denotes a contact hole, and 18 denotes an upper metal wiring.

As shown in the process sectional views of FIGS. 2A to 2C, after patterning using a photoresist 15 in FIG. 2C, a contact hole is formed by using a dry etching technique. Thereafter, the photoresist 15 is subjected to ashing (ashing) treatment with oxygen plasma or ozone, and subsequently, sputtering of an aluminum alloy (sputtering or CVD if a barrier metal is present).
A barrier metal is formed under an aluminum alloy by a method) to form metal wiring.

However, in the steps shown in FIGS. 2C and 2D, the ECR-
Si— on the surface of the SiO ₂ film and the side wall of the contact hole
The H group is oxidized and converted into a Si—OH group, and moisture adsorption increases. As a result, the moisture barrier capability of the ECR-SiO ₂ film deteriorates. This moisture corrodes the metal wiring and increases the resistance at that portion. Here, in particular, when the diameter of the contact hole is reduced, there is a problem that the resistance of the contact hole increases so as not to be ignored. Therefore, some improvement measures were desired.

As a technique for solving the above problem, Japanese Patent Laid-Open Publication No.
The technology described in JP-A-124048 is exemplified. In this publication, SOG is used as an interlayer insulating film. More specifically, a contact hole is formed in an interlayer insulating film using SOG, and a silylation process is performed to make the exposed SOG surface of the side wall of the contact hole hydrophobic, thereby releasing the SOG from the SOG. This suppresses the increase in the resistance of the contact hole due to the excessive moisture.

[0007]

SUMMARY OF THE INVENTION However, SOG
Originally, the film originally contains moisture caused by the material or by-produced by the firing reaction, and the moisture oxidizes the metal surface on the bottom surface of the contact hole, thereby increasing the contact hole resistance. Therefore, the effect of silylation according to this publication is that it acts as a diffusion barrier for the moisture inside the SOG to the outside. In other words, when the moisture contained in the SOG reaches the transistor region, various problems such as deterioration of hot carrier resistance of the transistor occur. Therefore, it is indispensable to separately introduce a moisture barrier such as a SiN film. Further, since a silyl group that increases the resistance remains on the surface of the aluminum alloy-based metal (contact hole surface), an improvement for reducing the resistance is required.

Further, BP is formed by a CVD method other than the ECR method.
When SG or PSG is used as an interlayer insulating film, it is possible to perform hexamethyldisilazane (HMDS) treatment so as not to absorb moisture, as disclosed in Japanese Patent Application Laid-Open Nos. 4-79353 and 6-169.
No. 021. However, in these publications, moisture is absorbed by the interlayer insulating film in any of the steps, and deterioration of hot carrier resistance due to moisture absorption is not improved.

[0009] In particular, in Japanese Patent Application Laid-Open No. 4-79353,
HMDS is applied. Therefore, it is necessary to perform this coating step and the processing step of forming contact holes and the like using different apparatuses. Therefore, in the production process, the interlayer insulating film may absorb moisture during the waiting time between the processes. Also,
The interlayer insulating film formed by the CVD method described in this publication adsorbs molecules of water, so it is difficult to prevent oxidation of the lower metal wiring in the contact hole.

[0010]

In the above prior art, the EC
In the R-SiO ₂ film, in a resist removing step after etching of the contact hole, Si—H groups in the film are oxidized by oxygen plasma or ozone used for ashing and converted to Si—OH groups. This means a decrease in the moisture barrier capability, and there is a concern that the adsorption of moisture in the air may cause a decrease in device characteristics. On the other hand, the inventor of the present invention has performed the ECR by the ashing process.
Even if the Si-H group -SiO ₂ film surface has been converted to Si-OH group to prevent adsorption of moisture to the ECR-SiO ₂ film, finally the semiconductor device of the hot carrier resistance deterioration such as The present inventors have found a manufacturing method capable of preventing the deterioration of the device characteristics of the present invention, and have reached the present invention.

Thus, according to the present invention, there is provided a method of manufacturing a semiconductor device having at least a lower metal wiring, an interlayer insulating film, an upper metal wiring, and a contact hole for connecting the lower metal wiring and the upper metal wiring, ECR plasma CVD method to form an interlayer insulating film made of a silicon oxide film on the lower metal interconnect, a contact hole is formed by etching using a photoresist as a mask, is removed by treating the photoresist with oxygen plasma or ozone,
Treating with a silylating agent to form a silylated layer on the surface of the lower metal wiring in the contact hole and the surface of the interlayer insulating film, and then treating the silylated layer on the surface of the lower metal wiring in the contact hole with hydrogen gas under heating Or by hydrogen plasma treatment
And forming an upper metal wiring on the interlayer insulating film after removal.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a semiconductor device of the present invention is usually formed on a semiconductor substrate. The semiconductor substrate that can be used in the present invention includes not only silicon but also a compound semiconductor such as AsGa. An element isolation region, a source / drain region, a gate electrode, and the like may be formed in advance on the semiconductor substrate.

Next, materials that can be used for the lower metal wiring are as follows:
There is no particular limitation, and metals commonly used in the art can be used. Specific examples include aluminum and aluminum alloy. The method for forming the lower metal wiring is not particularly limited, and examples thereof include a sputtering method and a CVD method. Further, the lower metal wiring may be patterned into a desired shape. Patterning can be performed by using a known photolithography technique and a dry etching technique. It should be noted that the present invention can reduce the corrosion of the aluminum alloy caused by the etching species Cl attached or introduced to the surface of the aluminum alloy when etching is performed using a chlorine-based gas using an aluminum alloy for the lower metal wiring. Has an effect.

Next, an ECR plug is placed on the lower metal wiring.
Silicon oxide film (ECR-SiO) by plasma CVD_Two
) Is formed. This ECR-S
iO _TwoAlthough the membrane may be used as it is,
Flattening to improve step coverage
Is preferred. As a method of flattening, for example, a chemical
Mechanical polishing (CMP) technology may be used.
In addition, ECR-SiO _TwoAfter planarization, the film is
It preferably has a thickness of 1 to 0.6 μm.

The following conditions are required for forming an ECR-SiO ₂ film. First, the raw materials are SiH ₄ , Si
A combination of oxygen and a silicon compound containing hydrogen or halogen such as F ₄ , Si ₂ H ₆ , or Si ₂ F ₆ can be used. The ECR plasma CVD method has a microwave output of 1500 to 2500 watts and a bias output of 500 to 1500 watts.
W, gas pressure 0.5-5 mTorr, temperature 50-100 ° C
Can be done with

Next, a contact hole for connecting a lower metal wiring and an upper metal wiring formed later is formed in the interlayer insulating film. A known method can be used as a method for forming a contact hole. For example, a photoresist is coated on the interlayer insulating film, only the area where the contact hole is to be formed is exposed, further developed, and the area is removed to form a photoresist mask. Next, etching is performed using this photoresist mask to form a contact hole in the interlayer insulating film. Thereafter, if the photoresist is removed by ashing with oxygen plasma or ozone, the formation of the contact hole is completed.

Next, the lower metal wiring and the interlayer insulating film are treated with a silylating agent to form a silylation layer on the exposed surfaces of the lower metal wiring and the interlayer insulating film. As a silylating agent that can be used in the present invention, hexamethyldisilazane (HMD)
S), trimethylsilylamine (CH ₃ ) ₃ SiNH ₂ ,
Trimethylsilanol (CH ₃ ) ₃ SiOH and the like. In the treatment with the silylating agent, for example, it is preferable to connect the silylating agent supply means to the ashing apparatus and continuously expose the semiconductor substrate to the silylating agent atmosphere at 80 to 200 ° C. for 10 to 60 seconds without exposing the semiconductor substrate to the air.

The treatment with the silylating agent is performed as follows.
Has an action. That is, ECR-SiO_TwoThe film contains S in the film.
It has an iH group and becomes a moisture barrier by the following reaction.
Show their abilities. Si-H + H_TwoO → Si-OH + H_Two (1) Si-H + Si-OH → Si-O-Si + H_Two (2) However, after etching of the contact hole,
When removing the photoresist, use oxygen plasma or ozone
When singing treatment is performed, ECR-SiO_TwoSurface of membrane
Si-H group on the side wall of contact hole and contact hole
Is oxidized. Therefore, ECR-SiO_TwoIn the membrane, the table
(1) does not occur on the surface. Therefore, ECR-S
iO_TwoThe film absorbs atmospheric moisture and is ECR-SiO_Twofilm
Will deteriorate its ability as a moisture barrier. this
Therefore, in the present invention, the semiconductor substrate after removing the photoresist is
Treated with a silylating agent (for example, HMDS),
O _TwoSi-OH on the surface of the film and the side wall of the contact hole
A silylated layer in which the group is coated with a hydrophobic group as in the following formula:
Forming is one of the features.

[0019]

Embedded image

By this processing, the ECR-SiO ₂ film having the reduced moisture barrier ability recovers the ability. In addition, instead of the treatment with the silylating agent, it is conceivable to reduce the Si—OH groups to Si—H groups by heat treatment with hydrogen gas or hydrogen plasma treatment. However, in this treatment, the degree of hydrophobicity of the surface is not sufficient. is not. After the treatment with the silylating agent, the silylation layer formed on the lower metal wiring in the contact hole is further removed. Examples of the method for removing the silylated layer include a sputtering process, a heating process using a reducing gas such as a hydrogen gas, and a plasma process using a hydrogen plasma or the like.

The gas used for the sputtering process includes argon, hydrogen, He and the like. On the other hand, the heat treatment with the reducing gas is preferably performed at 400 to 800 ° C. for 30 to 90 minutes. In addition, the plasma processing is performed at 350 to 4
50 ° C., 5 to 15 Torr, 500 to 1000 W, 1 to
It is preferable to carry out for 30 minutes.

From the viewpoint of preventing a reduction in yield due to generation of dust in the above-described removal treatment, heat treatment with a reducing gas such as hydrogen gas and plasma treatment with hydrogen plasma or the like are preferable. In the present invention, since the treatment with the silylating agent can be performed in the gas phase, the silylated layer can be made thinner, and the two methods can be sufficiently removed.

The removal of the silylated layer has the following effects. That is, a silylation layer is formed on the surface of the lower metal wiring in the contact hole by the treatment with the silylating agent by the following reaction.

[0024]

Embedded image

(In the formula, M represents a metal element constituting the lower metal wiring.) The surface of the lower metal wiring of the contact hole silylated as described above is relatively affected when the diameter of the contact hole is large. Is small. However, when the diameter of the contact hole is 0.5 μm or less, the following problem occurs. First, the contact resistance between the lower metal wiring and the upper metal wiring increases. Further, the electromigration resistance deteriorates in the contact hole. According to the present invention, since the silylated layer on the surface of the lower metal wiring in the contact hole is removed and the adsorption of moisture from the atmosphere on the surface of the lower metal wiring is prevented, these disadvantages are solved.

Thereafter, an upper metal wiring is laminated on the entire surface of the semiconductor substrate. Since the contact holes are filled with the upper metal wiring by this lamination, conduction between the upper metal wiring and the lower metal wiring is obtained. The upper metal wiring is not particularly limited, and a metal usually used in the art can be used. Specifically, aluminum, an aluminum alloy, TiN and the like can be mentioned. It should be noted that the present invention can reduce the corrosion of the aluminum alloy caused by the etching species Cl attached to or introduced to the aluminum alloy surface when using an aluminum alloy for the upper metal wiring and etching with a chlorine-based gas. Has an effect.

Here, when the method of laminating the upper metal wiring is a sputtering method, the removal of the silylated layer is also performed by a sputtering process, and this sputtering process is performed in the same sputtering apparatus using an inert gas such as argon. Then, it is preferable to continuously stack the upper metal wiring. In addition, the upper metal wiring is formed by a T
In the case of iN (which also has a function as a barrier metal),
In the same CVD furnace, it is preferable to perform a heat treatment or a plasma treatment with a reducing gas such as hydrogen gas to reduce and decompose the silylated layer on the surface of the lower metal wiring in the contact hole, and to subsequently stack the upper metal wiring. .

By performing the processing continuously as described above (ie, in-situ processing), since the semiconductor substrate is not exposed to the air, a substance which increases the contact resistance between the upper metal wiring and the lower metal wiring is formed. This is more preferable because it can be prevented from being performed. The semiconductor device according to the present invention may have at least a unit including a lower metal wiring, an interlayer insulating film, an upper metal wiring, and a contact hole for connecting the lower metal wiring and the upper metal wiring.
Therefore, a plurality of these units may be formed. Also, when patterning the upper metal wiring, the treatment with the silylating agent of the present invention and the treatment for removing the silylated layer can be performed.

[0029]

【Example】

Example 1 After an element was formed on a semiconductor substrate 1 made of silicon, a silicon oxide film 2 was formed by a CVD method, and a lower metal wiring of an aluminum alloy having a thickness of 0.6 μm was formed thereon by a sputtering method. . Further, the lower metal wiring was processed to a width of 0.5 μm using a known photolithography technique and a dry etching technique. SiH ₄ + O
_An ECR-SiO ₂ film 4 was deposited to a thickness of 2 μm by a high-density plasma CVD method using the mixed gas of FIG.
(A)).

Next, ECR-SiO
_{2 The} film 4 was flattened to a thickness of 0.6 μm (FIG. 1B)
reference). Next, a photoresist 5 was applied to a thickness of 1.1 μm, and a portion for forming a contact hole was exposed and developed to form an etching mask. Using this mask, perform dry etching using fluorocarbon / fluorohydrocarbon-based gas,
A contact hole 6 was formed on the lower metal wiring (FIG. 1).
(C)).

The photoresist 5 was removed by ashing with oxygen plasma, ozone, or a mixed gas thereof with H ₂ O in the same chamber or another chamber without exposing the semiconductor substrate 1 to the atmosphere from within the etching apparatus. . Subsequently, the surface was silylated by exposing the semiconductor substrate 1 to HDMS vapor for 30 seconds while the semiconductor substrate 1 was heated to about 80 to 100 ° C. (see FIG. 1D). In FIG. 1 (d), 7
Represents a silylated layer.

Next, the semiconductor substrate 1 is placed in a sputtering apparatus, and is sputtered using an Ar gas in a vacuum chamber.
The silylated layer 7 on the surface of the R-SiO ₂ film 4 (excluding the side wall surface of the contact hole) was removed. Thereafter, an upper metal wiring 8 made of an aluminum alloy was formed with a thickness of 0.8 μm by a sputtering method (see FIG. 1E).

Thereafter, the upper metal wiring 8 is formed by a known method.
To obtain a semiconductor device (see FIG. 1F). The photoresist mask (not shown) used for this processing was removed by an ashing apparatus, and after the ashing, the wafer was again processed by HMDS for 30 seconds without exposing the wafer from the inside to the atmosphere. By this processing, the surface of the upper metal wiring 8 and the EC
Since the silylated layer 7 was formed on the exposed surface of the R-SiO ₂ film 4, the surface became hydrophobic, and the moisture barrier ability of the ECR-SiO ₂ film 4 was restored.

According to the above embodiment, the ECR-SiO ₂ film 4
The deterioration of the moisture barrier ability of the semiconductor device was suppressed, and the deterioration of characteristics such as hot carrier resistance of the semiconductor device could be prevented. Example 2 The same procedure as in Example 1 was performed up to FIG. continue,
In order to form TiN as a barrier metal, a semiconductor substrate was introduced into a CVD apparatus and heated at 450 ° C. for 30 minutes. Thereafter, the silylated layer present on the surface of the lower metal wiring in the contact hole was reduced and removed by a treatment with hydrogen gas at atmospheric pressure.

Next, under reduced pressure, a 0.1 μm thick TiN
Was deposited. Subsequently, a tungsten plug was formed by a known method. Next, an upper metal wiring made of an aluminum alloy was formed by a sputtering method. Thereafter, the semiconductor device was obtained through the same steps as in Example 1. According to the above embodiment, deterioration of the electrical characteristics of the device due to moisture could be suppressed.

Example 3 The removal of the silylated layer was carried out at 390 to 400 ° C. and 9 to 10 To.
A semiconductor device was manufactured in the same manner as in Example 2, except that hydrogen plasma treatment was performed at rr and 450 to 500 W for 10 to 30 minutes. According to this embodiment, ECR-S
Since the Si—OH of the iO ₂ film 4 returns to Si—H, the ECR
-The original properties of the SiO ₂ film 4 were restored.

[0037]

According to the method of manufacturing a semiconductor device of the present invention, the following effects can be obtained. 1. The moisture barrier ability of the ECR-SiO ₂ film whose moisture barrier ability has been deteriorated by oxygen plasma when ashing the photoresist can be recovered. Therefore, deterioration of element characteristics due to moisture can be prevented. 2. Since the treatment is performed with the silylating agent immediately after ashing, there is no need to restrict the management of the time during which the semiconductor substrate is left from ashing to the next step. 3. For example, when an aluminum alloy is used for the lower metal wiring or the upper metal wiring and etching is performed with a chlorine-based gas, corrosion of the aluminum alloy caused by the etching species Cl attached or introduced to the aluminum alloy surface can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a process in a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a schematic cross-sectional view of a process in a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1,11 semiconductor substrate 2, 12 silicon oxide film 3, 13 lower metal interconnect 4,14 ECR-SiO ₂ film 5,15 photoresist 6,16 contact hole 7 silylated layer 8 and 18 an upper metal wiring

──────────────────────────────────────────────────の Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/3205-21/3213 H01L 21/768

Claims (3)

(57) [Claims] At least a lower metal wiring, an interlayer insulating film,
A method of manufacturing a semiconductor device having an upper metal wiring and a contact hole for connecting the lower metal wiring to the upper metal wiring, wherein an interlayer insulating film made of a silicon oxide film is formed on the lower metal wiring by ECR plasma CVD. A contact hole is formed by etching using a photoresist as a mask, the photoresist is removed by treatment with oxygen plasma or ozone , and a treatment with a silylation agent is performed, and the surface of the lower metal wiring and the interlayer insulating film in the contact hole is formed. the silylated layer is formed, and then the hydrogen gas treatment or hydrogen plug under heating silylated layer on the surface of the lower metal wiring in the contact hole
A method for manufacturing a semiconductor device, comprising: forming an upper metal wiring on an interlayer insulating film after removing by a plasma treatment . Wherein the silylating agent is hexamethyldisilazane, the manufacturing method of the upper layer metal wiring semiconductor device according to claim 1, wherein laminated by CVD. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the removal of the photoresist and the treatment with the silylating agent are performed continuously in the same apparatus.