JP3230870B2 - Circuit design support equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit design support apparatus for supporting a logic circuit design apparatus.

[0002]

2. Description of the Related Art An automatic circuit designing apparatus designs a circuit by performing an essential design process for converting from an upper level to a lower level and a selectable design process for optimizing the circuit as necessary after the conversion. At the end of a certain design process, the designer calculates the deviation between the circuit performance of the design data and the design constraints, and changes the design process at the following design level or back to a higher design level. In many cases, re-execution is performed by, for example, changing a startup option for a design target of the design process itself.

If the know-how for selecting the optimum design process is not specified, the designer selects a default process and takes a long time to perform the design. That is, unnecessary design processes were performed, and valuable design resources were wasted.

Further, even if the knowledge of the design process selection is specified, the design constraints may not be satisfied due to an error in the design process selection. If the cause of the dissatisfaction was the selection of the process, the designer had to select the design process by trial and error and re-execute from the first process.

[0005] Therefore, in order to use the automatic design apparatus, the designer needs to conduct preliminary experiments and investigate know-how for selecting a design process. In particular, the selection of different design processes with the same function requires many preliminary experiments,
It was very difficult to obtain the know-how of the selection.

Therefore, it is not always possible to automatically change the design process or automatically change the start option of the design process based on the deviation between the performance of the circuit calculated from the design data and the design constraint. I wasn't.

When the design process is interrupted and re-executed, the designer assigns an extension to the design data name so that the design data can be easily identified when re-executing the design data, ie, saves the design data with a unique name. I was

[0008] In this method, for example, to determine which design input data was taken and after which process the processing was interrupted, module. in1_in2
_In3_procA_opta_procB_opt
An identifier such as a_procC_optb was given.

Furthermore, when re-executing using the design data, the designer must input data input1, input1.
2. It was necessary to set input3 again, and to execute again after process C. From these facts, it is necessary for the designer to manage the design data and the design process by himself in order to design in the best process, which is a very complicated operation.

[0010]

As described above, conventionally,
The designer has to manage the design data and the design process, and cannot automatically change the design process or the start option of the design process.

The present invention facilitates management of design data and a design process in an automatic circuit design apparatus, furthermore, selects a design process, sets an activation option of the design process, and reuses design data that has been executed halfway. The purpose of the present invention is to provide a design support device for supporting the design.

[0012]

SUMMARY OF THE INVENTION The present invention relates to an identification data storage unit for storing data including data relating to design constraints and circuit performance in association with each other, a selectable design process sequence storage unit, and a circuit performance. A rule storage for determining the order of the design process and the start option of the design process from the data, and the order and the start option of the design process using the data stored in the identification data storage, the order storage, and the rule storage. A design process determining unit for determining the order of the design processes and the boot options stored by the design process determining unit, the design process sequence and the boot option storage unit, and the design process sequence and the boot option storage unit for the design process. Control unit that reads out the order and start-up options of the design device, sets this in the design device, and controls the design device. Et at least composed of the circuit design support apparatus.

The identification data storage unit includes an input design data identification name, an output design data identification name, a design process control data identification name, a design process name to be processed and its start option name, a processed design process name for the design apparatus. It is characterized by further storing a name and its start option name.

Further, the data relating to the performance of the circuit stored in the identification data storage unit is characterized in that it includes data relating to the area, which is the characteristic of the circuit, and the difference between the longest delay time and the design constraint.

[0015] Alternatively, the design process deciding unit may execute the design process from the rule storage based on the difference between the re-executable design process name stored in the identification data storage, the data relating to the circuit performance, and the design constraint. It is characterized by extracting the process order and startup options.

[0016]

According to the present invention, the identification data storage unit for storing the identification data of various data to be input to the circuit designing apparatus is:
Identification data of design data and design constraint data, control data of the design process consisting of a sequence of design process names, data for identifying design data output by the circuit design device executing a plurality of design processes, and processed This is a storage device that uses a data for identifying a design process, performs what kind of processing is performed under what kind of constraints, and what kind of characteristics the design data has, and stores them in association with each other.

A design process determining section for selecting a design process to be performed later and determining a start condition of the design process based on data for identifying the processed design process and data relating to the performance of the circuit includes a selectable design process prepared in advance. Based on the knowledge of the order and the stored data relating to the performance of the circuit, a design process to be performed thereafter is selected, and a start option of the selected design process (for example, the number of times of processing or the processing method of the design data) is determined.

The control unit that causes the design apparatus to execute the design process determined for the design data transmits the determined design process sequence and the startup option to the design apparatus, and causes the design data to be processed.

Alternatively, the control unit may be configured to process design data that can be input to the circuit design apparatus, a design process order that can be processed, and selectable design process candidates obtained by the design process determination unit. A start option in the design process is presented to the designer to prompt a selection request, and the design process and the start option selected by the designer are transmitted to the design device to process the design data.

[0020]

FIG. 1 is a block diagram showing the configuration of an embodiment of a circuit design support apparatus according to the present invention.

The present apparatus has an identification data storage unit 1 for storing identification data of various data inputted to a circuit design apparatus in association with each other, a selectable design process order storage unit 2, and a design process based on data relating to circuit performance. Storage unit that determines the order of the design processes and the startup options of each design process 3, the design process determination unit 4, and the storage of the design process order and startup options that can be processed for the design data that is input to the circuit design device 5, a control unit 6, and a display unit 7 for displaying the design process and a start-up option of the design process to the designer and prompting the selection. The display unit 7 is for displaying data relating to the design support apparatus of the present invention or setting a request for the design apparatus. Other parts operate even if they do not exist.

The identification data storage unit 1 stores input design data identification names and output design data identification names for design devices, identification names of design constraints and design process control data, and data relating to circuit performance. The difference between a certain area or the longest delay time and the design constraint is stored. Further, it stores the name of the design process to be processed and its start option name, the name of the processed design process and its start option name.

The design process determining section 4 includes an identification name of design input data, an identification name of design constraint data, a list of design process control data, ie, a list of design process names required for each design stage, an identification name of output design data, A function for capturing the design process name, the difference between the circuit performance of the design data and the design constraint from the identification data storage unit 1, a function for capturing the order of the selectable design processes from the order storage unit 2, and a function for capturing the design process order from the rule storage unit 3. A function that captures the order of the design process based on the differences between circuit performance and constraints, and the data that determines the startup options for each design process, and a function that determines the order and the startup options of the design process that is to perform processing from these data And a function of storing the determined information in the order of the design process and the activation option storage unit 5.

The control unit 6 controls the transfer of data between the parts, and also stores the data stored in the identification data storage unit 1, ie, the design data name, the design constraint name, the order of the design process, and the start option storage unit 5. The stored design process order and start-up options are read out, and these are set in the design apparatus to perform the design.

Alternatively, the control unit 6 presents the order of the design process and the process starting option to the designer by using the display unit 7 to prompt the designer to make a selection. It has a function of taking out information from the storage unit 5 and presenting the order of the design process that can be processed to the designer on the window for the design data to be input to the circuit design device, and selecting the order on the window. .

If the designer selects something other than the design process name and the activation option presented by the designer, the order of the design process and the data in the activation option storage unit 5 are replaced with the data selected by the designer. Further, the design apparatus is operated using the replaced design process order and the data in the boot option storage unit 5.

Hereinafter, logic synthesis will be described as an example of a circuit design apparatus. The present invention is applicable not only to logic synthesis but also to circuit design and layout design. Here, optimization refers to processing design data so as to satisfy certain constraints.

The circuit design data includes network information between elements constituting the circuit. The circuit design constraint data includes the number of elements (or area), speed (longest delay time), power consumption, and the like.

In general, a logic synthesizer develops a register transfer description into a logic-level circuit, simplifies the logic-level description, and finally allocates cells in a library to generate a logic circuit.

The levels that can be optimized include a register transfer level, a logical expression level, and a cell level to which cells depending on a specific technology are allocated.

At the register transfer level, hardware that is advantageous in area or speed is allocated to functional blocks based on constraints. For example, since the adder / subtractor can be constituted by a ripple carry or look-ahead carry type circuit, an optimal logical expression level circuit is generated by selecting a configuration method based on the restrictions of the entire circuit.

At the logical expression level, there are optimization methods such as simplification of logical operators having constant inputs, conversion by De Morgan's formula, and factorization of multi-level logic.

At the cell level, cells for minimizing the area and delay are allocated, and the fan-out is adjusted in consideration of the drive capacity and load load of the cells.

The optimization described here is divided into a plurality of design processes and is performed at the option of the designer.
Start-up options can be specified for the design process. This launch option includes HIGH, MEDIUM, L0W
The higher the processing time, the higher the processing time, but the design data satisfies the design constraints.

The logic synthesis is performed by register transfer level circuit data (design data) and a circuit conversion instruction command, that is, data describing a circuit conversion process (control data A).
A module assignment command (control data B) and circuit design constraint data (control data C) are taken in, first optimized at a register transfer level (process P1), and developed into a circuit at a logical expression level (process P2), and a logical expression Optimization is performed at the level (process P3), cells in the library are allocated (process P4), and optimization is performed at the cell level (process 5) to generate a logic circuit. Design process P
It is assumed that only P1, P3, and P5 have the above-described design process activation option.

The design data MOD1. For in, the design processes P1 and P2 are performed under the control data A, B, and C, the subsequent processes are interrupted, and the design data is stored.
A processing flow when the design processes P3, P4, and P5 are selected at the time of re-execution will be described with reference to FIG.

The difference between the design data name, the processed design process name, the circuit characteristics, and the design constraints is fetched from the identification data storage unit 1 (11). Design data MOD1. The difference between the circuit characteristics obtained from out and the value of the design constraint is that the area difference is 3
0% and the difference between the longest delay data is 20%.

As shown in FIG. 3, the identification data storage unit 1 stores input design data names MOD1. in, output design data name MOD1. out, the control data names A, B, and C, the difference between the circuit characteristics and the design constraints, and the scheduled design process name P
1 to P5, processed design process names P1 and P2, and processed design activation options are stored in a relational database system.

Next, selectable process order storage unit 2
From the output design data MOD1. out takes in the reprocessable design process name (12). As shown in FIG. P2 has been processed (YES),
P3 to P5 are unprocessed. The re-executable design processes are P3, P4, and P5. Here, the design processes P3 and P5 may or may not be executed (Don't).
Care).

Based on the difference between the re-executable design process name, circuit performance (characteristics), and design constraints, the rule storage unit 3
Then, the order of the design process and the start option of the design process are extracted from (13). As for the difference between the circuit performance (characteristics) and the design constraint, the difference in area is 30% and the difference in longest delay data is 20%. Therefore, design processes P3, P4 and P5 are selected from the table of FIG. In the design process 3 from the table of FIG. 5B, a LOW level activation option is selected. Although not shown, the startup option of the process 5 selects MEDIUM.

The design support apparatus stores the information selected in the processing 13 in the order of the design process and the activation option storage section 5 (14). The order of the design process and the activation option storage unit 5 store the design data MOD1. out, control data A, B, C, processes P3, P4, P5 and a start option L0W of the design process P3, a start option M of the P5
EDIUM is stored.

The design process decision section 4 can cope with a case where there are a plurality of selectable process combinations and orders, and can store a plurality of candidates in the design process order and start-up option storage section 5.

The control unit 6 can pass the order of the design process and the data of the start-up option storage unit 5 to the logic synthesizing apparatus, input them, and execute them.

Alternatively, the control unit 6 opens a window on the display as shown in FIG. 6, displays the design data name, the design control data name, and the processed design process name in a table format, and furthermore, allows the design process to be re-executed. And the start-up option (effort) of the re-executable process can be displayed or selected based on the order of the design process and the information in the start-up option storage unit 5.

This eliminates the need for the user to store the design data name and the processed process name saved at the time of interruption. In addition, it is possible to select an input design data name and a design process name necessary for the re-execution, and an optimum process name that satisfies the design constraint.

In the above embodiment, the order is determined by five design processes. However, in the apparatus of the present invention, the number of design processes can correspond to an arbitrary number, and the combination and order of the design processes are as shown in FIG. Can be dealt with freely by setting in advance the order storage unit 2 and the rule storage unit 3. When there are a plurality of combinations of design process orders and activation options, the determination order can be changed with priority given to the satisfaction of the design constraints or the minimum processing time.

The area and the width of the difference between the longest delay time and the effort in the design process decision table of FIG. 5 and the start option decision table in the design process 3 can be arbitrarily set. Furthermore, in addition to area and longest delay time as circuit characteristics, a decision table using characteristics such as testability and power consumption is created,
You can select the order of the design process and startup options.

According to the present invention, design data can be stored in the middle of the design process, and the following design process can be selected and the start option can be selected based on the evaluation data. Therefore, it is necessary to start over from the first design process again. Absent. If the design constraints cannot be satisfied in the above example, the second activation option candidate is selected, the design process P3 is executed with the activation option MEDIUM, and the design process 5 is executed with the activation option HIGH. Design data can be obtained. Also, the third candidate design process P3 is executed at HIGH, and the design process P5 is changed to L.
It is also possible to execute at 0W.

As described above, the present design support apparatus can store and display under what control data and under what kind of design process the design data obtained by interrupting the design processing. . Therefore, the relationship between input / output data and the design process can be managed. In addition, since the order of the re-executable processing can be indicated, there is an effect that the re-execution can be easily performed.

[0050]

According to the present invention, a desired design process candidate can be determined and a design can be executed in consideration of the difference between the circuit performance calculated from the design data and the design constraint. In addition to presenting the information to the designer, the designer can select the information, so that the optimum design process that satisfies the design constraints can be selected. In addition, since the relationship between input / output data and the design process can be managed, data can be saved during design and design can be resumed using the data. Even for a circuit whose design constraints cannot be satisfied, it is not necessary to restart the design process from the beginning, so that the design time can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a circuit design support apparatus.

FIG. 2 is a processing flowchart of a design process determining unit.

FIG. 3 illustrates a method of storing an input design data name, an output design data name, a control data name, a difference between a circuit characteristic and a design constraint, a design process name to be executed, a processed design process name, and a processed design startup option. Figure to do.

FIG. 4 is a view for explaining the relationship between a processed design process and a reprocessable design process.

FIG. 5 is a view for explaining a table for selecting a design process and determining a start option of the design process.

FIG. 6 is a view for explaining display and selection of design data, design control data, processed design process names, and the order of re-executable design processes.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Identification data storage part of various design data 2 Selectable design process order storage part 3 Rule storage part for deciding the design process order and start option 4 Design process determination part 5 Design process order and start option storage part 6 Control part 7 Display part of design process sequence and startup options

────────────────────────────────────────────────── (5) References JP-A-1-286077 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 17/50

Claims (4)

(57) [Claims] An identification data storage unit for storing data including data relating to design constraints and circuit performance in association with each other; a selectable design process order storage unit; A rule storage unit for determining an order and an activation option of the design process; and using the identification data storage unit, the order storage unit, and data stored in the rule storage unit, the order of the design process and the activation option. A design process determining unit that determines the order of the design processes determined by the design process determining unit and a design process order and a boot option storage unit that store the startup options; and a design process order and a boot option storage. Read out the order of the design process and the startup options from the section and set them in the design equipment The circuit design support apparatus, characterized in that it is at least composed of a control unit for controlling the design apparatus. 2. The identification data storage section includes an input design data identification name, an output design data identification name, a design process control data identification name, a design process name to be processed and its startup option name, and a processed option name for the design device. 2. The circuit design support apparatus according to claim 1, further comprising a design process name and a start option name thereof. 3. The circuit according to claim 1, wherein the data relating to the performance of the circuit includes data relating to a difference between an area and a longest delay time, which are characteristics of the circuit, and a design constraint. Design support equipment. 4. The design process determining unit, based on a difference between a re-executable design process name stored in the identification data storage unit, data on the performance of the circuit, and the design constraint, The circuit design support device according to claim 1, wherein the order of the design process and the activation option are extracted from a rule storage unit.