JP3235403B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency semiconductor device, and more particularly to a microwave to millimeter-wave IC using flip chip bonding.

[0002]

2. Description of the Related Art In recent years, the field of information communication has been remarkably advanced, and the frequency band to be handled has been expanded from microwave bands to millimeter wave bands to higher frequencies. Accordingly, the speed of transistors used in these communication devices has been remarkably increased.
Devices with cut-off frequencies exceeding 0 GHz have been realized.

Further, by using these transistors,
Microwave with integrated passive circuits such as matching circuits
Research and development of millimeter-wave band MMICs are also being actively pursued.

[0004] However, in the field of application technology of these ultra-high frequency devices, there is a problem of characteristic deterioration due to mounting. For example, in wire bonding used for mounting ordinary transistors and ICs, the effect of parasitic inductance due to wires and parasitic capacitance due to bonding pads increases in proportion to the frequency. Buried under the influence of, the original characteristics cannot be exhibited. Furthermore, in the millimeter-wave region, the dimensions of wires, pads, and the like cannot be ignored compared to the wavelength, so that these cannot be treated as lumped constants, and the problem is complicated. Therefore, we have proposed a device disclosed in Japanese Patent Application No. 6-67127.

The same applies to the mounting of the MMIC. M
In the MIC, the wiring inside the IC is made of a microstrip type or coplanar type line having a certain characteristic impedance (usually 50Ω), and the line of the substrate on which the MMIC is mounted is also designed with the same characteristic impedance (usually the same 50Ω). It is common to have. However,
At the time of mounting, the characteristic impedance is disturbed at a portion of a wire connecting both signal lines, and an impedance mismatch occurs at a connection portion. For this reason, signal reflection and loss occur in this portion, and it is difficult to bring out the original characteristics of the IC.

The parasitic component caused by wire bonding alone has an adverse effect on the circuit, but it is also difficult to accurately grasp and reproduce the effect. is there. Therefore, in order to reduce the characteristic deterioration due to mounting,
It is important how to reduce the parasitic effect of this connection and maintain the characteristic impedance.

As a means for solving the problem of the parasitic effect due to such wire bonding, there is a conventional technique called flip-chip mounting. Among them, the document “National Technical Report Vol. 35, No. 3, paragraphs 95 to 102
Section) etc. (hereinafter referred to as
The technology called MBB) is to mount the chip surface to the substrate side and connect the lines on the substrate and the lines on the chip via very small bumps such as micro bumps. The parasitic effect of the connection portion is greatly reduced as compared with the flip chip bonding mounting method.

FIG. 4 is a cross-sectional view of a connection portion between a signal line on a chip and a signal line on a substrate in a semiconductor device mounted by MBB. 1 is a substrate, 11 is a line on the substrate,
21 is a bonding pad provided on a part (end) of the line, 2 is a chip, 12 is a line on the chip,
A bonding pad 22 is provided on a part (end) of the line. Both pads are electrically connected via the micro bumps 30, and the chip and the substrate are fixed by the contraction force of the photo-curable resin 40.

The diameter of the bump before mounting is usually 10-20 μm.
m, the height is about a few μm, but after mounting, it is deformed by pressure during mounting, the diameter is expanded to several tens of μm, and the height is about 1-2 μm except for a part that is partially recessed into the wiring pad Become. That is, since the line on the substrate and the line on the chip can be almost brought into contact with each other, the inductor component due to the bump can be suppressed to a considerably small value.

FIG. 5 is a perspective view of the periphery of the bump of FIG. 4 as viewed from above, and each number indicates the same part as in FIG. As can be seen from the figure, the width of the line is increased only at the pad portion, so this portion looks like a capacitor. However, since the dimensions are known in advance, it is possible to consider the influence of this portion at the design stage. Also, since it is easy to reduce the diameter of the bump in the MBB, the pad size is reduced,
It is also possible to make it about the same as the width of the track.

[0011]

However, the above-mentioned problems can be solved for some time by the prior art, but when the frequency becomes as high as the millimeter wave, the effect cannot be sufficiently satisfied. In the prior art, the width of the bonding pad is set to be substantially equal to the width of the line, so that the disturbance of the impedance due to the change in the width of the line can be eliminated. Therefore, there remains a problem that the thickness of the signal line changes.

This change in line thickness causes impedance disturbance as well as a change in width. In experiments conducted by the inventors, it depends on the size of the line. However, even when a line having a thickness of several μm is used, it is generally 30 to 40 GHz. The above has been found to have a non-negligible effect.

[0013] The present invention has a small disturbance of the impedance at the connecting portion, and an object thereof is to provide a semiconductor equipment which realizes chip mounting excellent millimeter wave band.

[0014]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a semiconductor device in which the line thickness of a portion (pad) to be connected to a bump is adjusted in advance, for example, and the MBB is mounted. It is.

[0015]

According to the present invention, the above structure makes it possible to make the thickness of the line on the substrate or the chip substantially equal to the line thickness of the connection portion even after mounting using the MBB. Becomes possible.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device and a mounting method according to an embodiment of the present invention will be described below with reference to the drawings.

Embodiment 1 FIG. 1 is a diagram showing a semiconductor device and a mounting method according to a first embodiment of the present invention. In the figure, (a) is a sectional view before mounting, and (b) is a sectional structural view after mounting.

In FIG. 1A, reference numeral 100 denotes a Si substrate (which may be a glass substrate), and 101 denotes a GND plane formed on one main surface of 100, for example, AlS.
About 1 μm of iCu or the like is deposited. Reference numeral 102 denotes a dielectric film, for example, formed by depositing SiO ₂ to a thickness of about 20 μm. Reference numerals 103 and 104 denote lines on the silicon substrate 100 side, and it is preferable to use, for example, Au as the material. The thickness is, for example, about 3-5 μm. Track 103,1
Reference numeral 04 has pad portions 131 and 132 for bonding, and the thickness of this portion is reduced to about half that of the other line portions.

Here, the lines 103 and 104 are the dielectric films 10
2 and the GND plane 101 constitute a microstrip line. In this example, the line width of the 50Ω line is about 40.
Since it is about μm, it is sufficiently possible to make the width of the pad portions 131 and 132 equal to the line width.

The pad portions 131 and 132 have micro bumps 15 for MBB (micro bump bonding) mounting.
1,152 are formed. This bump is formed later by a transfer pump or the like, but as another method,
When the line thickness of the pad portion is reduced, a bump may be left partially.

In FIG. 1, reference numeral 110 denotes an MMIC chip (may be a high-frequency transistor chip);
Reference numeral 13 denotes a line (wiring) on the chip 110;
Numeral 112 has bonding pad portions 141 and 142, and the thickness of this portion is reduced to about half that of the other portions like the pads on the substrate.

When this chip is connected to a substrate by MBB mounting technology, the pad portion is thinned in advance as shown in FIG. 1B, so that the pad portion has the original thickness after mounting. About the thickness of the track,
Disturbance in impedance due to a change in the thickness of the line, which has been a problem in the conventional example, can be drastically reduced. That is, in the related art, the thickness of the line is different at the connection portion of the line as shown in FIG. 1D, but in the present embodiment, the thickness of the line is almost equal to the line thickness at the connection portion as shown in FIG. Is the same as

In this example, the wirings on the chip (111, 11
In 2), since the microstrip is formed by the dielectric 102 on the substrate 100 and the GND plane 101, the same characteristic impedance can be obtained if the width is the same as the line of the substrate. If the width of the pad portion is set to be the same as the line width, ideal mounting without disturbance of characteristic impedance from the substrate to the inside of the chip can be realized.

Although FIG. 1 does not show a photocurable resin for simplicity, the resin is actually applied to a substrate before connecting the chip, and ultraviolet light is applied while the chip is pressed against the substrate. The resin is cured by irradiation, and the chip is fixed. Further, in this embodiment, the bumps are formed on the pads on the substrate side, but may be provided on the chip side.

Further, in this embodiment, the pad portions of the substrate / chip are adjusted to half the thickness of the line, respectively. However, after mounting, the sum of the pad thickness and the bump height is equal to the original line height. In this case, the thickness of each pad portion may be set in any manner. In this embodiment, the case where the microstrip line is used is shown, but the same applies to the case where the coplanar line is used.

(Embodiment 2) FIG. 2 is a view showing a semiconductor device and a mounting method according to a second embodiment of the present invention. Only a state immediately before mounting is shown in a sectional structural view. In FIG. 2, 2
00 is a Si substrate, 201 is a GND plane formed on one main surface of 200, 202 is a dielectric film, 203, 204
Are the lines on the substrate side and the pad portions 231 and 2 for bonding.
Reference numeral 210 denotes a transistor or an MMIC chip, 211 to 213 denote lines (wirings) on the chip,
211 and 212 are bonding pad portions 241 and 2
42.

The difference from the first embodiment is that the pad 23
1, 232, 241 and 242 are not uniformly thinned, but are gradually changed in thickness so as to have an obliquely cross-sectional structure as shown in FIG. With such a structure, the thickness of the pad portion can be made the same as the thickness of the line after mounting, as in the first embodiment.

Further, here, since the pads on the substrate side and the pads on the chip side are inclined obliquely so as to just fit, the positioning can be performed naturally, so that the positioning is easier than in the first embodiment. It has the characteristic. As described above, in this embodiment, it is possible to provide a semiconductor device which can simplify not only the width and thickness of the line but also the alignment.

(Embodiment 3) FIG. 3 is a view showing a semiconductor device and a mounting method according to a third embodiment of the present invention. Only a state immediately before mounting is shown in a sectional structural view. In FIG. 3, 3
00 is a substrate of Si or the like, 301 is a GND plane formed on one main surface of 300, 302 is a dielectric film, 303, 3
Reference numeral 04 denotes a line on the substrate side, which is a pad portion 33 for bonding.
1, 332, and 310 is a transistor or MMIC.
Chips, 311 to 313, lines (wirings) on the chip, and 311, 312 are bonding pad portions 34.
1, 342, and there are bumps 351 for MBB,
352 are formed.

The difference from the first embodiment is that the pad portion 34
The bumps 351 and 352 on the first and 342 are the pad portions 33.
1, 332, 341 and 342 are made of a harder metal. For example, a soft metal such as Au is used for the pad metal, and a hard metal such as Ti or W is used for the bump. Press the chip against the board in this state,
Let the bumps sink into the pads. If the height of the bump made of hard metal is appropriately adjusted, it can be stopped when the height of the bump portion becomes almost the same as the thickness of the wiring. However, in this method, more pressure is applied than in the normal MBB mounting, so that the area of the pad portion is increased due to deformation of the pad portion. Therefore, in order to make the width of the pad exactly equal to the width of the line after mounting, it is necessary to devise the pad width in advance to be smaller than the line width as shown in FIG. By doing so, mounting can be stopped at the same wiring width even if the line is widened by mounting.

[0031]

As described above, according to the present invention, since the thickness of the pad portion after mounting can be made the same as the thickness of the line, it is possible to realize good mounting with little disturbance of impedance at the junction. This makes it easy to design because there is no need to consider the disturbance of impedance when designing the semiconductor device. Furthermore, since the signal loss is reduced, the gain of the mounted semiconductor chip can be utilized as it is,
Since the signal reflection can be reduced, the influence on other circuits can be reduced.

[Brief description of the drawings]

FIG. 1 is a sectional structural view showing a semiconductor device and a mounting method according to a first embodiment of the present invention.

FIG. 2 is a sectional structural view showing a semiconductor device and a mounting method according to a second embodiment of the present invention;

FIG. 3 is a sectional structural view showing a semiconductor device and a mounting method according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view of a connection portion between a signal line on a chip and a signal line on a substrate in a semiconductor device mounted by MBB.

5 is a perspective view of the periphery of the bump in FIG. 4 as viewed from above.

[Explanation of symbols]

Reference Signs List 1 substrate 2 chip 11 line on substrate 12 line on chip 21 bonding pad provided on part (end) of line on substrate 22 bonding provided on part (end) of line on chip Pad 30 Micro-bump 40 Photo-curable resin 100, 200, 300 Substrate 101, 201, 301 GND plane 102, 202, 302 Dielectric film 103, 104, 203, 204, 302, 304 Substrate line 110 , 210, 310 Transistor or MMIC chips 111-113, 211-213, 311-313 are the lines (wirings) 131, 132, 231, 232, 331, 332 on the chip bonding pad portions 151, 152 on the substrate side. 351, 352 Micro bumps 141, 142, 241, 242, 341 , 342 pad part for bonding

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 23/12 301 H01L 21/60 311 H01P 3/08

Claims (5)

(57) [Claims] A microstrip wiring board including: a ground conductor formed on a main surface; a dielectric film formed on the ground conductor; and a metal wiring formed on the dielectric film. A semiconductor device comprising: a semiconductor chip connected to a substrate via a bump; and a thickness of a line on the substrate, and a thickness of a connection portion between the line on the substrate and the line on the semiconductor chip. A semiconductor device with almost the same height. 2. A substrate and a semiconductor chip having a microstrip line and a pad portion for bonding, and at least a part of the pad portion of the substrate or the semiconductor chip is thinner than a thickness of a line on the substrate. The semiconductor device according to claim 1. 3. The semiconductor device according to claim 2, wherein the pad portion on the substrate or the semiconductor chip has a connection bump, and the material forming the bump is harder than the material forming the pad portion. 4. The semiconductor device according to claim 1, wherein the semiconductor chip is mounted on the substrate by a micro-bump mounting method. 5. The semiconductor device according to claim 1, wherein the width of the pad portion is substantially equal to the width of the line portion.