JP3244040B2 - Optical information reader - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an optical information reading apparatus for reading a bar code or the like.

[0002]

2. Description of the Related Art Hereinafter, among optical information reading devices,
In particular, a two-dimensional code reader using a two-dimensional photosensor in the imaging unit will be described. It is needless to say that the present invention is not limited to a two-dimensional code reader, but can be applied to a portable information terminal capable of optically reading information such as a one-dimensional bar code reader and a handheld terminal.

FIG. 15 is a block diagram showing a circuit portion of a reading apparatus conventionally used for reading one-dimensional barcodes or two-dimensional codes. Reference numeral 1 denotes a photo sensor that photoelectrically converts incident light in an imaging unit. Reference numeral 2 denotes a shift register, and the accumulated charge of the imaging unit 1 is transferred to the shift register 2 by the shift pulse SP generated by the shift pulse generating means 4 and sequentially shifted by the transfer clock generated by the transfer clock generating means 3. It is output pixel by pixel. Reference numeral 5 denotes a decoding processing unit which converts an analog signal output from the shift register 2 into a digital signal.
A converter (or binarization circuit) 6, a memory 7 for storing the digital signal obtained by the AD converter 6, a CPU 8 for decoding the contents stored in the memory 7, and transmitting the decoding result to a POS or a host computer It comprises a communication interface 9 and the like. Although the illumination LED, the LED indicating the reading result, and the buzzer are not shown, they may or may not be provided.

Next, the configuration of a two-dimensional CCD image sensor will be described with reference to FIG. FIG. 16 shows a two-dimensional CCD.
1 schematically illustrates a configuration of an image sensor (a part is omitted for convenience of description). In the case of a two-dimensional CCD image sensor, pixels are arranged in a two-dimensional direction unlike a one-dimensional CCD image sensor, and thus the shift register 2 in FIG. 15 is composed of a vertical shift register 10 and a horizontal shift register 11. The imaging unit 1 in FIG. 15 includes a photo sensor 12, and a vertical shift register 10 is arranged next to the photo sensor 12. The electric charge accumulated in the photo sensor 12 is transferred to the vertical shift register 10 by a shift pulse SP (not shown). Thereafter, the charges are transferred in the vertical direction by the vertical transfer clock V, and the charges sent to the horizontal shift register 11 are transferred in the horizontal direction by the horizontal transfer clock H, and are output as analog signals through 13 output circuits.

The shift register 2 in FIG. 15 (or the vertical shift register 10 and the horizontal shift register 11 in FIG. 16) is a CCD (Charge Coupled).
The device including the photosensor 12 and the output circuit 13 is called a CCD image sensor.

[0006] In a so-called 250,000-pixel two-dimensional CCD image sensor, about 500 photosensors 12 are used in the horizontal direction and about 500 photosensors 12 are used in the vertical direction. In addition, about 500 vertical shift registers 10 are used, almost the same as the number of photosensors 12 arranged in the horizontal direction. Further, in practice, a four-phase drive is used for the vertical transfer clock V and a two-phase drive is used for the horizontal transfer clock H of the two-dimensional CCD image sensor, and four signals and two signals are required, respectively. In this case, one signal is used for each. Further, in the case of a two-dimensional CCD image sensor, the shift pulse SP is actually
It is common practice to transfer the charge from the photo sensor 12 to the vertical shift register 10 by inputting it once to an IC called a vertical driver and outputting the vertical transfer clock V in three values, without inputting it to the image sensor. However, the description will be made assuming that the shift pulse SP is directly input as in the case of the one-dimensional CCD image sensor because the description is complicated. A row of horizontal pixels arranged in the imaging unit 1 in the horizontal direction is called a line.

Further, according to the present invention, one screen (frame) called an interlace (interlaced scanning) system is composed of two fields called an odd field and an even field. Although a two-dimensional CCD image sensor that performs sequential output called a non-interlaced method may be used or a two-dimensional CCD image sensor that performs sequential output, a non-interlaced two-dimensional CCD image sensor will be described below.

In such a configuration, in order to reduce the power consumption, in a standby mode other than the reading mode, there is a control for cutting off the power of each unit including the CCD image sensor. Some of them are
To reduce the time required for reading from power-on, the transfer clock is set to a shorter cycle than during normal decoding when power is turned on, and unnecessary charges accumulated in the imaging unit and shift register when power is turned off are quickly discharged. After that, the transfer clock is returned to the transfer clock at the time of normal decoding processing.

[0009]

However, in the conventional optical information reading device, before the decoding process is performed, the charges of all the pixels of the imaging section 1 are transferred via the shift register 2 by the transfer clock having the same period. It was necessary to output to the decryption processing means 5 (write to the memory 7). For this reason, there is a problem in that it takes time to output all the pixels to the decryption processing means 5 (write to the memory 7), and it takes time to read a barcode or the like. The minimum period (highest frequency) of the transfer clock is determined by the AD converter (or binarization circuit) 6,
The performance of the memory 7 and, when a two-dimensional CCD image sensor is used, the period of the vertical synchronization signal and the horizontal synchronization signal and the vertical and horizontal pixels determined by standards such as the Japanese TV standard called NTSC. It was determined by number.

Particularly, a one-dimensional CCD image sensor for reading a bar code generally has a number of pixels of 1000 to 300.
Although the number of pixels is about 0 pixels, a two-dimensional CCD image sensor usually has about 250,000 pixels to about 400,000 pixels. If a signal conforms to the Japanese TV standard called NTSC, information of one screen is two-dimensional. It takes 33ms to output and take in (write to memory 7) from the CCD image sensor, and also high density (high pixels) for high-vision etc.
Since a two-dimensional CCD image sensor has about one million pixels or more, about 66 ms is required. Therefore, two-dimensional CC
When the D image sensor is used, the time to capture the output of the two-dimensional image sensor (write to the memory 7) may be longer than the time required for the decoding processing by the CPU 8. In particular, when a high-density (high-pixel) two-dimensional CCD image sensor is used, a large two-dimensional code, a small two-dimensional code, and a one-dimensional bar code are similarly 66 m long.
Since it is necessary to capture the output of about s (write it to the memory 7), even when reading a small two-dimensional code or one-dimensional bar code, or even when using a one-dimensional CCD image sensor, it has high performance as a decoding processing means. When a CPU is used, this phenomenon becomes conspicuous, and the ratio of the time for taking in the output from the CCD image sensor (writing to the memory 7) in the entire barcode reading time becomes large. There has been a problem that reading cannot be made faster only by improving the performance.

An object of the present invention is to solve such a problem, and an object of the present invention is to provide an optical information reading apparatus in which the reading time is shortened.

[0012]

In order to achieve the above object, a first optical information reading apparatus according to the present invention comprises: an image pickup section having a plurality of pixels arranged in a one-dimensional or two-dimensional direction; Shift pulse generating means for generating a shift pulse for transferring the electric charge stored in the section, a shift register for inputting the electric charge transferred by the shift pulse and sequentially outputting the electric charge in accordance with a transfer clock having a predetermined period, and generating the transfer clock. Transfer clock generating means, decoding processing means for performing a predetermined decoding process in response to an output from the shift register, decoding start position setting means for setting a pixel or line to start the decoding process, and decoding start position setting Means for setting the cycle of the transfer clock of the shift register up to the pixel or line set by the decoding means. Is obtained by a first transfer clock switching means for switching so that shorter than the period of the transfer clock of the shift register after having reached the set pixel or line by.

Further, in the second optical information reading apparatus of the present invention, the decoding start position setting means may include the number of pixels or the number of lines from a predetermined pixel or line of the imaging section to the pixel or line at which decoding is started. And first transfer clock switching means, counting means for counting the number of pixels or lines from the predetermined pixel or line to the pixel or line to start the decoding process, and the decoding start position And a comparing means for comparing the number of pixels or lines set by the setting means with the number of pixels or lines counted by the counting means.

Further, the third optical information reading apparatus of the present invention is provided with a decoding end position setting means for setting a pixel or a line at which decoding processing is ended.

Also, in the fourth optical information reading apparatus of the present invention, the cycle of the transfer clock of the shift register after reaching the pixel or the line set by the decoding end position setting means is set by the decoding end position setting means. And a second transfer clock switching means for switching so as to be shorter than the cycle of the transfer clock of the shift register up to the selected pixel or line.

In a fifth optical information reading apparatus according to the present invention, the decoding end position setting means may include a number of pixels or a number of lines from a predetermined pixel or line of the imaging section to a pixel or line to end decoding. And a second transfer clock switching means, counting means for counting the number of pixels or lines from the predetermined pixel or line to the pixel or line for which the decoding process ends, and the decoding end position And a comparing means for comparing the number of pixels or lines set by the setting means with the number of pixels or lines counted by the counting means.

In a sixth optical information reading apparatus according to the present invention, the decoding start position setting means and the decoding end position setting means set a plurality of pixels or lines as a decoding start position and a decoding end position, respectively. A portion between the decoding start position and the decoding end position is sequentially decoded.

According to a seventh aspect of the present invention, there is provided an optical information reading apparatus, comprising: an imaging unit having a plurality of pixels arranged in one-dimensional or two-dimensional directions; and a shift pulse for transferring charges accumulated in the imaging unit. , A shift register that inputs charges transferred by the shift pulse and sequentially outputs the transfer clock according to a predetermined period of transfer clock, a transfer clock generator that generates the transfer clock, Decoding means for receiving the output and performing a predetermined decoding process; and output start position setting means for setting a pixel or a line at which output from the shift register is started.

Further, the eighth optical information reading apparatus of the present invention is provided with output end position setting means for setting a pixel or a line at which the output from the shift register ends.

A ninth optical information reading apparatus according to the present invention comprises an output start position setting means for setting a plurality of output start positions and an output end position setting means for setting a plurality of output end positions. It is.

[0021]

With the above arrangement, the first optical information reading apparatus of the present invention can shorten the period of the transfer clock up to the decoding start position after the decoding start position, thereby shortening the reading time. I can do it.

Further, the second optical information reading apparatus of the present invention can easily set the decoding start position.

Further, the third optical information reading device of the present invention can start the decoding by the CPU when the output from the shift register ends up to the decoding end position.

Further, the fourth optical information reading apparatus of the present invention can shorten the cycle of the transfer clock after the decoding end position, and can quickly transfer the next electric charge stored in the imaging unit. .

The fifth optical information reading apparatus of the present invention can easily set the decoding end position.

Further, the sixth optical information reading apparatus of the present invention can rapidly decode a position where a bar code or the like is likely to exist in advance at a high speed. In other words, in the first to fifth optical information reading devices, continuous pixels or lines can be read into the memory and decoded, but by adopting this configuration, for example, when a two-dimensional CCD image sensor is used, a screen (frame) can be read. The information above, the central information,
A wide range of information, such as the information below, can be taken into the memory roughly and at high speed, and a place where a bar code or the like is likely to exist can be quickly found. Also, if necessary, information around the likely location can be captured by the first to fifth optical information reading devices. The object to be read is a one-dimensional barcode,
Moreover, if the decoding succeeds when the first optical information reading device roughly decodes the information, it is needless to say that there is no need to take in the peripheral information.

In the seventh optical information reading apparatus according to the present invention, it is not necessary to transfer and output the electric charge up to the pixel or the line until the decoding is started, and the reading is further accelerated.

Further, in the eighth optical information reading apparatus of the present invention, there is no need to transfer and output the charge of the pixel or the line after the decoding is completed, and the reading is further accelerated.

Further, the ninth optical information reading apparatus of the present invention performs rough decoding of a position where a bar code or the like is likely to exist in advance at a higher speed than the sixth optical information reading apparatus. be able to.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. (Embodiment 1) FIG. 1 shows a block diagram of a circuit portion according to a first embodiment of the present invention. Here, the same portions as those in FIG. 15 which is a block diagram of the conventional example are denoted by the same reference numerals, and description thereof will be omitted.

Numeral 14 denotes a decoding start position setting means, which is constituted by a register, and sets a line to start decoding by the CPU 8. Reference numeral 15 denotes first transfer clock switching means, which comprises a counter (counting means) 16 and a first comparison circuit (comparing means) 17.

FIG. 2 is a diagram showing timings of various signals according to the first embodiment of the present invention. In the present embodiment, the decoding start position setting means 14 sets the count value “9”.
9 "is set as the decoding start position. Counter 16
Is the shift pulse S which is also the start of the screen (frame)
P is cleared in the state of “L” and counts up by the vertical transfer clock V. The first comparison circuit 17 compares the value of the register of the decoding start position setting means 14 with the value of the counter 16. If the values match, the output signal of the first comparison circuit 17 changes the vertical transfer clock V of the transfer clock generation means 3. The high-speed clock is switched to the low-speed clock from the next line (FIG. 2A). The output of the shift register 2 is sent to the memory 7 via the AD converter 6 by the output signal of the first comparison circuit 17 from the next line where the value of the register of the counter 16 matches the value of the register of the decoding start position setting means 14. The writing is started, and when the next shift pulse SP becomes "L" ((a) in FIG. 2), the operation of writing to the memory 7 ends, and then the CPU 8 decodes the data.

In this embodiment, the shift pulse SP
Becomes "L" (FIG. 2A), the output signal of the first comparison circuit 17 is set to "H", and the vertical transfer clock V is set to the high-speed clock. The time when the shift pulse SP, which is also the start of the screen (frame), becomes "L" corresponds to the "predetermined pixel or line". Furthermore, in the present embodiment, the transfer clock generation means 3
A frequency divider combining an oscillator and a counter was used.

In this way, the cycle of the transfer clock up to the decoding start position can be shortened, and the output of the pixels for one screen is completed as soon as the cycle of the transfer clock is shortened (writing to the memory 7 is completed). The decoding by the CPU 8 can be started earlier, and the reading of a bar code or the like becomes faster.

Specifically, it is assumed that the one-dimensional barcode is arranged near the center in a substantially horizontal direction. Horizontal pixel 5
250,000 pixels of 250,000 pixels of 00 pixels and 500 vertical pixels
Field of view with CD image sensor is 30mm x 30mm
In the case of reading by the two-dimensional code reader, the decoding start position setting means 14 sets the position on the 250th line at the center. Conventional 5
While 33 ms (in the case of conforming to NTSC) is required before the decoding by the CPU 8 as a time for once writing the output from the CCD image sensor of the 00 line to the memory 7, the first 250 lines are provided by the high-speed transfer clock. C
Output time from CD image sensor (1.8us × 2
50) and a time (63.5 us × 250) for writing the latter 250 lines to the memory 7 in total of about 16.3 ms,
It is possible to output (write to the memory 7) in half the time of the related art. Here, the frequency of the low-speed clock is 15.7 kHz according to NTSC, and the frequency of the high-speed clock is 560 KH, which is the maximum transferable frequency of the shift register of the two-dimensional CCD image sensor used in the embodiment of the present invention.
z.

Unless the operator specifically intends, it is common to attempt to read by placing a one-dimensional barcode near the center in the horizontal direction.

As described above, switching of the transfer clock at the decoding start position (pixel or line) can be performed relatively easily using the counter and the comparison circuit.

(Embodiment 2) FIG. 3 is a block diagram showing a circuit portion according to a second embodiment of the present invention. Here, the same portions as those in FIG. 1 which is the block diagram of the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. The start of writing to the memory 7 is the same as in the first embodiment, and a description thereof will be omitted.

Decoding end position setting means 19 is constituted by a register, and the CPU 8 sets a line to end decoding. A second comparison circuit 18 compares the value of the counter 16 with the value of the register of the decoding end position setting means 18.

FIG. 4 is a diagram showing timings of various signals according to the second embodiment of the present invention. In the present embodiment, the decoding end position setting means 18 sets the count value to “2”.
00 ”is set as the decoding end position. Counter 1
After writing to the memory 7 up to the line where the value of the register 6 matches the value of the register of the decoding end position setting means 18, decoding is performed by the CPU 8 based on the output signal from the second comparison circuit 18 ((A) in FIG. 4). .

In the second embodiment, the shift pulse S
When P became “L” (FIG. 4A), the output signal of the second comparison circuit 18 was set to “H”.

With this configuration, when the output from the shift register 2 ends up to the decoding end position, the decoding by the CPU 8 can be started, so that the decoding can be started earlier than in the configuration of the first embodiment, and the bar code and the like can be started. Reading speeds up. In particular, when reading a one-dimensional barcode using a two-dimensional CCD image sensor, if the one-dimensional barcode is substantially horizontal (substantially parallel to horizontal pixels), the interval between the decoding start position and the decoding end position is one line. Can be set to be more effective.

A specific example will be described with reference to the specific example described in the first embodiment. When the one-dimensional barcode is arranged near the center in the horizontal direction, the time required for the CPU 8 to start decoding is the time required to output the first 250 lines from the CCD image sensor with the high-speed transfer clock (1.8 us). × 250) and the time required to write the 251st line to the memory (63.5 us × 1), which is about 0.5 ms in total, and is output in 1/50 or less of the conventional time (memory 7).
Can be written to).

(Embodiment 3) FIG. 5 is a block diagram of a circuit portion according to a third embodiment of the present invention. Here, the same portions as those in FIG. 1 and FIG. 3 which are block diagrams of Embodiment 1 and Embodiment 2 are denoted by the same reference numerals, and description thereof is omitted. The start and the end of writing to the memory 7 are the same as those in the first and second embodiments, so that the description is omitted.

Reference numeral 20 denotes a second transfer clock switching means, which comprises a third comparison circuit 21. Note that the third comparison circuit 21 corresponds to the comparison means of claim 5.

FIG. 6 is a timing chart of various signals according to the third embodiment of the present invention. In the third comparison circuit 21, the value of the register of the decoding end position setting means 19 and the value of the counter 1
6 and if they match, the vertical transfer clock V of the transfer clock
Is switched from the next line to the high-speed clock from the low-speed clock (FIG. 6A).

In this embodiment, the shift pulse SP
Becomes "L", the output signal of the first comparison circuit 17 and the output signal of the third comparison circuit 21 are set to "H". Further, when the shift pulse SP, which is also the start of the screen (frame), becomes “L”, this corresponds to “a predetermined pixel or line”. The “predetermined pixel or line” may be the pixel or line set by the decoding start position setting unit 14.

With this configuration, the cycle of the transfer clock after the decoding end position can be shortened, and the next charge accumulated in the image pickup unit 1 can be transferred quickly.

That is, the next information can be obtained quickly, so that the reading of a bar code or the like can be speeded up. In particular, as described in the specific example of the second embodiment, when reading a one-dimensional barcode, if there is no one-dimensional barcode between the first set decoding start position and the decoding end position, the decoding start position and the decoding Since it is necessary to reset the end position and store the output from the CCD image sensor in the memory, it is effective to output at high speed after the decoding end position.

Hereinafter, a specific example described in the second embodiment will be described. However, it is assumed that the one-dimensional barcode is arranged near 400 lines. CPU8
As described in the above-described second embodiment, the time required until the first decoding starts is the time required for outputting the first 250 lines from the CCD image sensor with the high-speed transfer clock (1.8 us × 250). And the time required to write the 251st line to the memory (63.5 us × 1) is about 0.5 ms in total, and can be output (written to the memory) in 1/50 or less of the conventional time. Since the code is not located near the center, the decoding start position and the decoding end position need to be set again. If the second transfer clock switching means 20 is not provided, the time required to output all pixels from the CCD image sensor is 250
The line has a time of outputting from the CCD image sensor with the high-speed transfer clock (1.8 us × 250) and a time of writing the 251st line into the memory (63.5 us × 1) and 25 lines.
Output time from the second line to the 500th line (6
In addition to the total of 16.3 ms of 3.5 × 249), the decoding start position and the decoding end position are set again, and 400 lines are output from the CCD image sensor with a high-speed transfer clock (1.8 μs × 400). The time required to write the 401st line into the memory (63.5 us × 1) requires a total of 0.8 ms, which is 17.1 ms in total. However, if the second transfer clock switching means 20 is used, the decoding start position and the decoding end position are again required. From the 252nd line after resetting
The output up to the line is a high-speed transfer clock and the time is (1.8 × 249), which is about 1.7 ms in total, which is about 1/10 of the case where the second transfer clock switching means 20 is not used. You can write to memory in time,
Barcode reading speeds up.

(Embodiment 4) FIG. 7 is a block diagram of a circuit portion according to a fourth embodiment of the present invention. 1 and 3 which are block diagrams of Embodiments 1 to 3.
In addition, the same parts as those in FIG. The start and end of writing to the memory 7 are as follows.
This is the same as in the first and second embodiments, and the switching of the vertical transfer block V is the same as in the first and third embodiments, and the description is omitted.

In this embodiment, two decoding start position setting means are used, and the first decoding start position setting means 14a and the second decoding start position setting means 14a are used.
The decryption start position setting means 14b. Furthermore, two decryption end position setting means are used, and the first decryption end position setting means 19a and the second decryption end position setting means 19b are used.

FIG. 8 is a timing chart according to the fourth embodiment of the present invention. In this embodiment, the count value "99" is set as the decoding start position by the first decoding start position setting means 14a, and the count value "101" is set as the decoding end position by the end position setting means 19a. Further, the count value "198" was set as the decoding start position by the second decoding start position setting means 14b, and the count value "200" was set as the decoding end position by the second decoding end position setting means 19b.

The first comparison circuit 17 compares the value of the register of the first decoding start position setting means 14a with the counter 16 and, if they match, outputs the signal of the transfer clock generation means 3 by the output signal of the first comparison circuit 17. The vertical transfer clock V is switched from the next line from the high-speed clock to the low-speed clock (FIG. 8A). Next, the third comparison circuit 21 compares the value of the register of the first decoding end position setting means 19a with the counter 16, and if the values match, the output signal of the third comparison circuit 21 outputs the vertical signal of the transfer clock generation means 3 to the vertical. The transfer clock V is switched from the next line to the high-speed clock from the low-speed clock. At this time, the output signal of the first comparison circuit 17 is returned to “H”, and the CPU 8 can perform the decoding process ((A) in FIG. 8).

Next, the first comparison circuit 17 compares the value of the register of the second decoding start position setting means 14b with the counter 16, and if they match, the output signal of the first comparison circuit 17 transfers the transfer clock generation means. 3, the vertical transfer clock V is switched from the next line to the high speed clock to the low speed clock. At this time, the output signal of the third comparison circuit 21 is returned to "H" ((c) in FIG. 8).

Further, the third comparison circuit 21 compares the value of the register of the second decoding end position setting means 19b with the counter 16, and if they match, the transfer clock generation means 3 uses the output signal of the third comparison circuit 21. Is switched from the low-speed clock to the high-speed clock from the next line. At this time, the output signal of the first comparison circuit 17 is returned to “H”, and the CPU 8 performs a decoding process ((D) in FIG. 8).

It should be noted that even if the decoding is performed by the CPU 8 at the time of FIG. 8A, the decoding by the CPU 8 is performed at the time of FIG. It does not matter. Also, the first comparison circuit 17
The input is switched between the first decoding start position setting means 14a and the second decoding start position setting means 14b, but two first comparison circuits 17 may be used. Similarly, two third comparison circuits may be used.

Further, with this configuration, switching of the transfer clock at the decoding end position is performed by the counter 16 and the comparison circuit 2.
1 can be easily performed.

Further, the position where a bar code or the like is likely to exist can be roughly decoded at a high speed. In other words, in the configurations of the first to third embodiments, continuous pixels or lines can be taken into the memory 7 and decoded, but by adopting this configuration, for example, when a two-dimensional CCD image sensor is used, the image (frame) can be displayed on the screen (frame). By fetching a wide range of information, such as the information at the center, the information at the center, and the information at the bottom, into the memory at a high speed, it is possible to quickly find a place where a barcode or the like is likely to exist. Then, if necessary, the information of the area around the place that is likely to be present is newly taken in by the configuration of the first to third embodiments, so that the reading of the barcode or the like can be speeded up. When the reading target is a one-dimensional barcode and the decoding is successful when the decoding is performed roughly, it is needless to say that there is no need to take in the peripheral information.

Specifically, assuming that one-dimensional barcodes are arranged in a substantially horizontal direction, the visual field is 30 mm × 3.
When a one-dimensional barcode is read by a two-dimensional code reader of 0 mm, the height of the one-dimensional barcode (in the direction corresponding to the vertical pixel) is almost 5 mm or more. If a line is set and six lines are set at equal intervals, it becomes possible to read the bar code at any position in the field of view.
That is, in the case where a conventional 250,000-pixel two-dimensional CCD image sensor is used, it takes 33 ms to write the output from the CCD image sensor of about 500 lines to the memory 7 once.
While (in the case of conformity with NTSC) was required before decoding by the CPU 8, the time for writing the output from the 6-line CCD image sensor to the memory 7 once (6
It is possible to write data into the memory in a total time of about 3.5 ms (3.5 μs × 6) and other high-speed output of about 494 lines (1.8 μs × 494), which is 1/25 of the conventional time. Furthermore, the data can be written to the memory faster than the result of the specific example described in the third embodiment. In other words, when the decoding is not successfully completed by setting the decoding start position and the decoding end position at one time, the configuration of the present embodiment is more effective.

(Embodiment 5) FIG. 9 is a block diagram showing a circuit portion according to a fifth embodiment of the present invention. Here, the same portions as those in FIG. 14 which is a block diagram of the conventional example are denoted by the same reference numerals, and description thereof will be omitted.

Reference numeral 22 denotes an output start position setting means, which is composed of an output start register and a switch. The CPU 8 sets a line for transferring charges from the photosensor 12 to the vertical shift register 10 and starting output from the horizontal shift register 11. .

FIG. 10 shows a part of the configuration of the two-dimensional CCD image sensor of the present embodiment. Vertical shift register 1
0 indicates one of about 500 lines for 5 lines closer to the horizontal shift register (first of the screen). Reference numeral 12a denotes one of the photosensors on the first line, and reference numeral 10a denotes one of the shift registers which conventionally transfer the charge of the pixels on the first line by the shift pulse SP. That is, the horizontal shift register transfers charges after 10a. Conventionally, as shown in FIG. 15, the charge accumulated in the photosensor 12 is directly transferred to the vertical shift register 10 disposed next to the switch. In the present embodiment, the switch Sn (n is 1 to the total number of vertical pixels) ) To the vertical shift register 10.

Which switch to pass through is determined by an output start register (not shown) set by the CPU 8. For example, when an output is to be started from the charge of the pixel 12b on the second line, the output start register is set so that all the switches S2 are turned ON. The electric charge accumulated in 12e by setting becomes 1 by the shift pulse SP.
Transferred to 0d, 12d to 10c, 12c to 10b
, 12b is transferred to 10a, and the first output becomes the second line, so that the time spent on useless output is omitted. Generally, when trying to output the a-th line, the switch Sn
(N = a) is turned on.

With this configuration, it is not necessary to transfer and output the charge up to the pixel or the line until the decoding is started, and the time for writing to the memory 8 is about 15.2 (250 × 250) for the latter 250 lines. Decoding can be started at 9 ms earlier than in the configuration of the first embodiment, and reading of a barcode or the like is faster.

(Embodiment 6) FIG. 11 is a block diagram of a circuit portion according to a sixth embodiment of the present invention. Here, the same portions as those in FIG. 9 which is the block diagram of the fifth embodiment are denoted by the same reference numerals, and description thereof is omitted.

Reference numeral 23 denotes an output end position setting means, which is composed of an output end register and a switch. The CPU 8 sets a line for transferring charges from the photosensor 12 to the vertical shift register 10 and terminating the output from the horizontal shift register 11 by the CPU 8. .

FIG. 12 shows a part of the configuration of the two-dimensional CCD image sensor of the present embodiment. Here, the same parts as those in FIG. 10 which are the configuration of the two-dimensional CCD image sensor according to the fifth embodiment are denoted by the same reference numerals, and description thereof is omitted.

In the present embodiment, the electric charge accumulated in the photo sensor 12 is transferred to the vertical shift register 10 via the switch Snm (n and m are both from 1 to the total number of vertical pixels).
Transfer to Which switch to go through is determined by an output start setting register (not shown) set by the CPU 8.
And an output end register (not shown).
For example, when an attempt is made to output from the charge of the pixel 12b on the second line to the charge of the pixel 12d on the fourth line, the output start register and the output end register are set so that the switches S22, S23, and S24 are turned on. The electric charge accumulated in 12d by setting becomes 1 by the shift pulse SP.
To 0c, 12c to 10b, and 12b to 10a, the first output is the second line and the last output is the fourth line. Generally, when trying to output from the a-th line to the b-th line, the switch Snm (n = a, a ≦
m ≦ b) is turned on.

With this configuration, there is no need to transfer and output the charge of the pixel or line after the decoding is completed.
The next charge stored in the imaging unit 1 can be output earlier than in the configuration of the second embodiment. That is, the next information can be obtained quickly, and the reading of a barcode or the like can be speeded up.

A specific example will be described with reference to the specific example described in the second embodiment. When the output end position setting means 23 is not used, the time required for output is the time for writing the 251st line to the memory (63.5 us × 1) and the time for outputting the 252nd line to the 500th line (1. 8
us × 249 (when a high-speed transfer clock is used), in addition to a total of about 0.51 ms, and a total time of writing the 401st line to the memory (63.5 us × 1), that is, a total of 0.58 ms.
is necessary. If the output end position setting means 23 is used so as not to output the lines after the set end position,
Since the time for outputting the 252nd line to the 500th line (1.8 μs × 249) is omitted, writing to the memory can be performed in 127 μs, and the barcode can be read at a higher speed.

(Embodiment 7) FIG. 13 is a block diagram of a circuit portion according to a seventh embodiment of the present invention. Here, the same portions as those in FIG. 11 which is the block diagram of the sixth embodiment are denoted by the same reference numerals, and description thereof is omitted.

22 (a) is a first output start position setting means, and 22 (b) is a second output start position setting means.
The CPU 8 sets a line for transferring charges from the photosensor 12 to the vertical shift register 10 and starting output from the horizontal shift register 11, which is composed of an output start register, a second output start register, and a switch.

23 (a) is first output end position setting means, and 23 (b) is second output end position setting means.
The CPU 8 sets a line for transferring charges from the photosensor 12 to the vertical shift register 10 and terminating the output from the horizontal shift register 11, which is composed of an output end register, a second output end register, and a switch.

A part of the configuration of the two-dimensional CCD image sensor according to the present embodiment will be described again with reference to FIG. 12 used in the sixth embodiment. For example, when an attempt is made to output the first line to the second line, and subsequently to the fourth line to the fifth line, the first output start register and the second output start are set so that the switches S11, S12, S24 and S25 are turned on. A register and a first output end register and a second output end register are set. The charge accumulated in 12e by setting is transferred to 10d, 12d to 10c, 12b to 10b, and 12a to 10a by the shift pulse SP, and the first output becomes the first line, and then the second line, 4th The line and the last output are the fifth line. In general, when an attempt is made to output from the a-th line to the b-th line, and subsequently from the c-th line to the d-th line, the switches Snm (n = a, a ≦ m ≦ b) and Sij
(I = c−b, c ≦ j ≦ d).

With this configuration, it is possible to roughly decode a position where a barcode or the like is likely to exist in advance at a higher speed than in the configuration of the fourth embodiment, and the reading of a barcode or the like is further accelerated. In the case of the specific example described in the fourth embodiment, the time for once writing the output from the 6-line CCD image sensor to the memory 7 can be 380 us (63.5 us × 6) by the configuration of the present embodiment.

The effect of reading a one-dimensional bar code using a two-dimensional CCD image sensor has been specifically described above. Whether reading information or reading a one-dimensional barcode using a one-dimensional CCD image sensor, the CCD must be roughly
The output from the image sensor is stored in a memory or the like and decoded,
By storing only the vicinity of the position where the information such as the bar code is likely to be stored in the memory 7 in detail again, the writing time to the memory 7 can be reduced.

This will be described with reference to FIGS. 14 (a), 14 (b) and 14 (c). Conventionally, large 2D code, small 2D code, 1D barcode, CCD
Although it was necessary to output the A line (all lines) shown in FIGS. 14A, 14B and 14C from the image sensor and store it in the memory 7, the next larger data was stored based on the contents roughly stored in the memory 7. In the two-dimensional code (FIG. 14A), B lines are fetched and a small two-dimensional code (FIG.
In (b)), it is sufficient only to take in C lines. Further, in the case of a one-dimensional barcode, in most cases, only one line shown in the center portion has to be captured, and in the worst case, in the specific example described in the fourth embodiment, only six lines have been captured. It can be shortened.

In particular, in recent years, a high-density (high-pixel) CCD image sensor has often been used in a two-dimensional code reader, so that it is more effective. This is because, for example, when a 250,000 pixel CCD image sensor is used, in the example of FIG. 14B, it has conventionally been necessary to capture A = 500 lines, but it is assumed that B = 50 lines can be acquired in the present invention. On the other hand, when a 1 million pixel CCD image sensor is used, it has conventionally been necessary to capture A = 1000 lines, but in the present invention, it is sufficient to capture B = 100 lines. In both cases, the improvement is 10 times. For example, if the output of one line requires 0.1 ms,
When using a 10,000 pixel CCD image sensor, 50ms is 5
In comparison with the improvement of 45 ms to 100 ms, 100 ms is 9 ms to 10 ms when using a 1 million pixel CCD image sensor.
This is an improvement of 0 ms, which is twice as long when using a 1,000,000 pixel CCD image sensor than when using a 250,000 pixel CCD image sensor.

As described above, according to the present invention, the cycle of the transfer clock can be switched at a certain set position,
Since the range to be output from the image sensor can be set, it can be used as a high-speed bar code presence / absence or bar code position detection sensor.

In the above embodiments, a two-dimensional CCD image sensor having a particularly large effect has been mainly described. However, the CCD image sensor is not limited to a two-dimensional CCD image sensor, but may be a one-dimensional CCD image sensor. However, it goes without saying that the reading speed is increased by applying the present invention.

[0082]

As is apparent from the above description, the first optical information reading apparatus according to the present invention can shorten the period of the transfer clock up to the decoding start position from the position after the decoding start position. Time can be shortened.

Further, the second optical information reading apparatus of the present invention can easily set the decoding start position.

Further, the third optical information reading apparatus of the present invention can start decoding by the CPU when the output from the shift register ends up to the decoding end position.

Further, the fourth optical information reading apparatus of the present invention can shorten the cycle of the transfer clock after the decoding end position, and can transfer the next electric charge stored in the image pickup section quickly. .

The fifth optical information reading apparatus of the present invention can easily set the decoding end position.

Further, the sixth optical information reading apparatus of the present invention can roughly decode a position where a bar code or the like is likely to exist in advance at a high speed. In other words, in the first to fifth optical information reading devices, continuous pixels or lines can be read into the memory and decoded, but by adopting this configuration, for example, when a two-dimensional CCD image sensor is used, a screen (frame) can be read. The information above, the central information,
A wide range of information, such as the information below, can be taken into the memory roughly and at high speed, and a place where a bar code or the like is likely to exist can be quickly found. Also, if necessary, information around the likely location can be captured by the first to fifth optical information reading devices. The object to be read is a one-dimensional barcode,
Moreover, if the decoding succeeds when the first optical information reading device roughly decodes the information, it is needless to say that there is no need to take in the peripheral information.

In the seventh optical information reading apparatus of the present invention, there is no need to transfer and output the electric charge up to the pixel or the line until the decoding is started, and the reading is further accelerated.

Further, in the eighth optical information reading apparatus of the present invention, it is not necessary to transfer and output the electric charge of the pixel or the line after the decoding is completed, and the reading is further accelerated.

Further, the ninth optical information reading apparatus of the present invention performs rough decoding of a position where a bar code or the like is likely to exist in advance at a higher speed than the sixth optical information reading apparatus. be able to.

[Brief description of the drawings]

FIG. 1 is a block diagram of a circuit portion of an optical information reading device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing timings of various signals of the optical information reading device according to the first embodiment of the present invention.

FIG. 3 is a block diagram of a circuit portion of an optical information reading device according to a second embodiment of the present invention.

FIG. 4 is a diagram showing timings of various signals of the optical information reading device according to the second embodiment of the present invention.

FIG. 5 is a block diagram of a circuit portion of an optical information reading device according to a third embodiment of the present invention.

FIG. 6 is a diagram illustrating timings of various signals of the optical information reading device according to the third embodiment of the present invention.

FIG. 7 is a block diagram of a circuit portion of an optical information reading device according to a fourth embodiment of the present invention.

FIG. 8 is a diagram showing timings of various signals of the optical information reading device according to the fourth embodiment of the present invention.

FIG. 9 is a block diagram of a circuit portion of an optical information reading device according to a fifth embodiment of the present invention.

FIG. 10 is a diagram showing a schematic configuration of a part of a configuration of a two-dimensional CCD image sensor of an optical information reading apparatus according to a fifth embodiment of the present invention.

FIG. 11 is a block diagram of a circuit portion of an optical information reading device according to a sixth embodiment of the present invention.

FIG. 12 is a diagram illustrating a schematic configuration of a part of a configuration of a two-dimensional CCD image sensor of an optical information reading apparatus according to sixth and seventh embodiments of the present invention.

FIG. 13 is a block diagram of a circuit portion of an optical information reading device according to a seventh embodiment of the present invention.

14A is a diagram showing an example of the effect of shortening the output time of the CCD image sensor in the case of a large two-dimensional code according to an embodiment of the present invention. FIG. FIG. 4C shows an example of the effect of shortening the output time of the CCD image sensor in the case of a small two-dimensional code in the embodiment. FIG. 7C shows the output time of the CCD image sensor in the case of a one-dimensional bar code in one embodiment of the present invention. Showing an example of the effect of shortening

FIG. 15 is a block diagram showing a configuration of a circuit portion of a conventional optical information reading device.

FIG. 16 is a diagram showing a schematic configuration of a two-dimensional CCD image sensor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image pick-up part 2 Shift register 3 Transfer clock generation means 4 Shift pulse generation means 5 Decoding processing means 6 AD converter 7 Memory 8 CPU 9 Communication I / F 10 Vertical shift register 11 Horizontal shift register 12 Photosensor 13 Output circuit 14 Decoding start position Setting means 15 first transfer clock switching means 16 counter 17 first comparison circuit 18 second comparison circuit 19 decoding end position setting means 20 second transfer clock switching means 21 third comparison circuit 22 output start position setting means 23 Output end position setting means

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06K 7/10 G06K 7/00

Claims (9)

(57) [Claims] An imaging unit having a plurality of pixels arranged in a one-dimensional or two-dimensional direction; shift pulse generating means for generating a shift pulse for transferring charges accumulated in the imaging unit; A shift register that receives the transferred charges and sequentially outputs the transferred charges according to a transfer clock having a predetermined period; transfer clock generation means that generates the transfer clock; A decoding start position setting means for setting a pixel or a line at which the decoding process is started; and a cycle of a transfer clock of the shift register until reaching the pixel or line set by the decoding start position setting means. The transfer clock of the shift register after reaching the pixel or line set by the position setting means An optical information reading device comprising: first transfer clock switching means for switching the period so as to be shorter than the period. 2. The decoding start position setting means sets the number of pixels or the number of lines from a predetermined pixel or line of the imaging section to a pixel or line to start decoding, and the first transfer clock switching means Counting means for counting the number of pixels or lines from the predetermined pixel or line to the pixel or line to start the decoding process, and the number of pixels or lines set by the decoding start position setting means and 2. The optical information reading apparatus according to claim 1, further comprising a comparing unit that compares the number of pixels or the number of lines counted by the counting unit. 3. The optical information reading apparatus according to claim 1, further comprising a decoding end position setting means for setting a pixel or a line at which decoding processing is ended. 4. The transfer clock cycle of the shift register after reaching the pixel or line set by the decoding end position setting means is set to the shift register transfer until reaching the pixel or line set by the decoding end position setting means. 4. The optical information reading apparatus according to claim 3, further comprising second transfer clock switching means for switching the clock so as to be shorter than the clock cycle. 5. The decoding end position setting means sets the number of pixels or the number of lines from a predetermined pixel or line of the imaging section to a pixel or line to end decoding, and the second transfer clock switching means Counting means for counting the number of pixels or lines from the predetermined pixel or line to the pixel or line at which the decoding process ends, and the number of pixels or lines set by the decoding end position setting means, 5. The optical information reading device according to claim 3, further comprising a comparing unit that compares the number of pixels or the number of lines counted by the counting unit. 6. A decoding start position setting unit and a decoding end position setting unit respectively set a plurality of pixels or lines as a decoding start position and a decoding end position, and set a portion between the decoding start position and the decoding end position. The optical information reading device according to any one of claims 3 to 5, which performs a decoding process sequentially. 7. An imaging section having a plurality of pixels arranged in one-dimensional or two-dimensional directions, a shift pulse generating means for generating a shift pulse for transferring charges accumulated in the imaging section, A shift register that receives the transferred charges and sequentially outputs the transferred charges according to a transfer clock having a predetermined period; transfer clock generation means that generates the transfer clock; And an output start position setting means for setting a pixel or a line at which output from the shift register is started. 8. The optical information reading apparatus according to claim 7, further comprising output end position setting means for setting a pixel or a line at which output from the shift register ends. 9. The optical information reading apparatus according to claim 7, further comprising output start position setting means for setting a plurality of output start positions and output end position setting means for setting a plurality of output end positions.