JP3249653B2 - Capacitor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a capacitor such as a ceramic capacitor and a thin film capacitor used for a semiconductor integrated circuit. More specifically, the present invention relates to a capacitor using a ferroelectric material having a large dielectric constant, in which the crystal grain size is reduced and the variation in the dielectric constant with respect to a temperature change is reduced, and a semiconductor device using the capacitor.

Here, the crystal grain size means the size of a crystal grain in a thin film in the thickness direction, not the size of the crystal grain in a direction perpendicular thereto. In a thin film composed of massive crystal grains, both have almost the same value. However, in a thin film having a columnar structure or a fibrous structure, the crystal grains have an elongated shape in the film thickness direction, and both have different values.

[0003]

2. Description of the Related Art FIG. 8 is an explanatory sectional view of a conventional ceramic capacitor. 8A, reference numeral 11 denotes a dielectric layer made of, for example, ferroelectric ceramics, 12a and 12b denote electrodes, 13a and 13b denote lead wires, and 14 denotes an insulating coating layer.
(B) is a partially enlarged view of a ceramic and shows crystal grains. Ferroelectric ceramics are manufactured by granulating and sintering raw materials such as oxides and carbonates such as TiO ₂ and BaCO ₃ . The crystal grain size of ceramics synthesized by sintering is usually 1 μm or more, and 1 μm
From 1 mm.

[0004] capacitance C of the capacitor electrode 12a, the dielectric constant epsilon _r and the thickness t of the 12b of the area S and the dielectric layer 11, can be expressed as _{C = ε r ε o S /} t. Here, ε _o is the dielectric constant of a vacuum.

[0005] Such ferroelectric ceramics have a very large dielectric constant, and can be made smaller by using a capacitor having a smaller electrode area or a thicker dielectric with the same electrode area than a capacitor using a material having a small dielectric constant. There is an advantage that the withstand voltage is improved. However, the ferroelectric material has a disadvantage that the permittivity changes greatly with temperature because the permittivity becomes maximum at the Curie temperature.

In a conventional ceramic capacitor, the magnitude of its dielectric constant and its temperature change are almost equal to those of a single crystal. The barium titanate crystal has a large dielectric constant when its grain size is reduced to about 1 μm. Journal of Applied Physics (J. Appl. Phys.) 58, 4, 1617, 1985 Has been reported to. According to this report, when the crystal grain size is reduced to 0.5 μm, the magnitude of the dielectric constant changes, but the temperature dependence of the dielectric constant varies from 200% to 500% in the temperature range of 100 ° C. No improvement in temperature characteristics was observed.

In a usual ceramic synthesis method, raw materials of an oxide or a carbonate are mixed and calcined. The raw material obtained by pulverizing and granulating the calcined product with a ball mill or the like is put into a mold, press-formed, and finally fired. Ceramics produced by this method usually have a particle size of several μm to several tens of μm, but have a high porosity and can be used to synthesize dense ceramics by CIP (Cold Isostatic Press) or HP (Hot Press).
Is used. In these production methods, dense ceramics having a small porosity can be obtained.
m.

BaTiO ₃ is a ferroelectric substance having a perovskite-type crystal structure. A paraelectric phase having a Curie temperature of 130 ° C. or higher has a cubic structure, a lower temperature has a tetragonal ferroelectric phase, and a relative dielectric constant has a Curie temperature. Takes a maximum value of 10,000 or more. At room temperature, the relative dielectric constant is about 2000.

Arlt et al. Converted BaTiO ₃ to C
Synthesized by combining the IP method and the HP method, and the crystal grain size is minimum 0.
28 μm ceramics were synthesized and their dielectric constants are reported (Journal of Applied Physics (J. Appl. Phys.), Vol. 58, No. 4, 1617, supra).
1985). The relative dielectric constant of ceramics with a crystal grain size of 10 μm or more is about 2000 at room temperature, but at 1 μm
When it is increased to about 5000, and at 1 μm or less, the dielectric constant decreases as the particle diameter decreases. It is also reported that the Curie temperature shifts by several degrees. The relative dielectric constant at room temperature of ceramics with a minimum particle size (0.28μm) is 2400, -50 ℃ ~ 125 ℃
There is a temperature change of about 25%.

Uchino et al. Synthesized a fine powder of BaTiO ₃ by a hydrothermal synthesis method and examined the temperature change of the crystal structure by powder X-ray diffraction (J. Am. Ceram. Soc., Vol. 72). , Issue 8, 155
5, 1989). It has been reported that in fine powder having a particle size of 0.12 μm to 1 μm, the phase transition temperature between cubic and tetragonal crystals depends on the particle size and changes as in the following formula.

[0011]

(Equation 3) Here, _Tc is the Curie temperature, and D is the crystal grain size (nm).

Ishikawa et al. Reported a decrease in Curie temperature of PbTiO ₃ fine powder (see Physical Review Bee (Phys. Rev. B), Vol. 37, No. 10, p. 5852, 1988). It is expressed by the following equation.

[0013]

(Equation 4) It is known that the temperature change of the dielectric constant of BaTiO ₃ ceramics having a small crystal grain size is small, but the minimum temperature change is about 25% in a temperature range of 100 ° C. However, the rate of temperature change is not improved as compared with the conventional temperature characteristic improvement method.

On the other hand, a phenomenon in which the Curie temperature depends on the particle size has been reported for fine powders, and the amount of reduction depends on the material. The change in Curie temperature of ceramics is small.

In order to overcome such drawbacks, in ferroelectric ceramics, various oxides and fluorides such as MgZrO ₃ and BaF ₂ are added to a ferroelectric compound as a main component to reduce the temperature change of the dielectric constant. Have been taken. Further, the main component compound and other components such as CaTiO
_3, it is possible to sell a small ceramic capacitor having a temperature change by using a solid solution such as MgSnO _3, NiSnO _3. However, these techniques cannot suppress an error due to a temperature change in the dielectric constant, and it is difficult to reduce the accuracy of the capacitor to ± 20% or less in a temperature range of 100 ° C.

On the other hand, there is a semiconductor element in which a memory cell including a transistor and a capacitor provided on a semiconductor substrate is formed. FIG. 9 shows an example of a memory element (DRA).
M) is a sectional explanatory view of one cell portion, wherein 16 is a silicon substrate, 17a is a transistor source region, 17b is a transistor drain region, 17c is a transistor gate region, and transistors 17a, 17b, and 17c are transistors 17a, 17b, and 17c. It is configured. 18 is a bit line, 19a is a buried plug connecting the source region 17a and the bit line 18, and 19b is a drain region 17a.
embedded plug connecting b to the capacitor lower electrode 21b, 20
Is an insulating film, 21c is a strontium titanate thin film as a dielectric film, 21a is an upper electrode, upper electrode 21a, lower electrode
The capacitor 21 is formed from the dielectric film 21c and the dielectric film 21c.

Next, the operation will be described. The element shown in FIG. 9 is used in a semiconductor integrated circuit. In this case, signal charge controlled by a transistor or the like formed on the same substrate is stored in a thin film capacitor lower electrode 21b to store information. Is performed. The accumulated charge amount Q depends on the electrode area S of the capacitor and the dielectric film 21c.
The relative dielectric constant epsilon _r and the thickness t of, can be expressed as _{Q = ε r ε o SV c} / t. Here, ε _o is the dielectric constant of vacuum, and V _c is the voltage applied to the capacitor. This accumulated charge amount Q is
The disturbance must be large enough not to cause erroneous memory due to external disturbances, in particular, excessive charges generated by ionizing radiation called soft errors.

In a semiconductor element having a low degree of integration, a silicon oxide film obtained by thermally oxidizing silicon or a C film is used as a dielectric film.
A silicon nitride film formed by VD has been used. As the integration progresses, the capacitor electrode area S decreases, so that the above-described silicon oxide film or silicon nitride film cannot obtain accumulated charges that do not cause a soft error. Therefore, a material having a high dielectric constant such as a paraelectric material such as tantalum oxide or strontium titanate, or a ferroelectric material such as lead zirconate titanate (PZT) or barium titanate is newly used as the dielectric film. It is thought that. For example, it is known that barium titanate and PZT exhibit a high relative dielectric constant of 1000 or more, and that a high insulating property can be obtained by forming a film so that oxygen defects do not occur.

The oxide ferroelectric thin film is usually formed by a sputtering method or a CVD method. In this case, in order to prevent an increase in leak current due to oxygen defects, the film is often formed in an oxidizing atmosphere at a high temperature of about 500 to 700 ° C. In addition, after film formation, high-temperature annealing is performed in an oxygen atmosphere to reduce leakage current and increase dielectric strength. Further, as a lower electrode material of a thin film capacitor using these oxides, platinum or the like having high oxidation resistance is used.

[0020]

As described above, a discrete ceramic capacitor and a capacitor used for a semiconductor memory are required to be reduced in size while securing a certain capacitance, and a large capacitance can be obtained in a small area. The use of ferroelectric materials has been studied. The relationship between the crystal grain size, the relative dielectric constant and the Curie temperature of fine powder of BaTiO ₃ , which is a ferroelectric material, has been investigated. However, when the crystal grain size is 1 μm or less, the relative dielectric constant becomes small,
No studies have been made to reduce the particle size, only to report that the relative permittivity is 2400 at a minimum particle size of 0.28 μm and that the change in relative permittivity is about 25% between -50 ° C and 125 ° C. It is.

The relationship between the crystal grain size and the Curie temperature is P
Although reported as fine powder of bTiO ₃ or BaTiO ₃ , since it is a fine powder, the crystal grain size is 120 nm or more, and the temperature at the time of using a capacitor and the Curie temperature of a thin film using a ferroelectric material are further increased. No report is made on the relationship with the crystal grain size.

For this reason, in a ceramic capacitor using a ferroelectric material, a change in the relative dielectric constant in a range of -20 ° C. to 80 ° C. at the time of using the capacitor by adding various oxides and fluorides is small. It is manufactured in such a way that the change is suppressed to about 20%. However, the rate of change due to a higher temperature cannot be controlled, and there is a problem that a ceramic capacitor using a ferroelectric material is not suitable as a further high-precision electronic component.

Further, a ferroelectric thin film is used as a memory element (DRA).
When used as a capacitor of M), in addition to the problem that a soft error is likely to occur due to a change in relative dielectric constant due to a change in temperature as described above, the capacitor is a thin film even at an applied voltage similar to that of a ceramic capacitor. Therefore, the intensity of the applied electric field increases, and the spontaneous polarization is inverted every time the memory is rewritten. It has been reported that an increase in the number of rewrites causes a decrease in the amount of stored charges and a deterioration in insulation characteristics (this phenomenon is called fatigue).

A ferroelectric substance is a paraelectric phase having no ferroelectric property at a temperature higher than the Curie temperature, and becomes a ferroelectric phase at a temperature lower than the Curie temperature, causing spontaneous polarization. Therefore, a ferroelectric which becomes a ferroelectric phase at the operating temperature of a semiconductor device is not suitable as a capacitor material in a DRAM due to fatigue. The operating temperature of the memory element is usually -20 ° C to 80 ° C. In the memory element, the temperature rises due to the operation of the transistor, and the temperature of the semiconductor element in operation becomes 0 ° C to 100 ° C. In this temperature range, the dielectric constant of the ferroelectric material greatly changes, and the amount of accumulated charges fluctuates in the operating temperature range of the semiconductor device, which causes a problem that normal operation cannot be performed.

On the other hand, a paraelectric material such as strontium titanate or tantalum oxide has a dielectric constant not as large as a ferroelectric material, and it is necessary to reduce the film thickness in order to secure a storage capacity. Since the insulating property is reduced, there is a problem in using it as a dielectric film for a capacitor of a highly integrated semiconductor device. Therefore, in order to manufacture a memory element of 64 Mbits or more with a high integration of the memory element, it cannot be manufactured with a conventional paraelectric material, and there is an urgent need to develop a ferroelectric material.

The present invention has been made to solve such a problem, and provides a small-sized ceramic capacitor having a small capacitance change using a ferroelectric material, and a thin film of a ferroelectric material for a memory. In the semiconductor device used as a capacitor, the electrode area of the capacitor is small,
It is an object of the present invention to provide a semiconductor element having a thin film capacitor structure having excellent insulation properties and having a small temperature change in capacitance.

[0027]

Means for Solving the Problems The present inventors have found that a capacitor using a ferroelectric material as a dielectric layer has a small change in capacitance with respect to a temperature change of about 100 ° C. As a result of intensive studies to obtain a small, large-capacity capacitor that does not cause fatigue even when used, it was found that the ferroelectric characteristics can be controlled by the crystal grain size of the ferroelectric material, and by adjusting the crystal grain size The inventors have found that a capacitor and a semiconductor device for memory having excellent characteristics can be obtained, and have completed the present invention.

That is, the capacitor of the present invention comprises: a dielectric layer made of a ferroelectric compound or a material containing a ferroelectric compound as a main component; two electrodes provided on both sides of the dielectric layer; A capacitor comprising: an insulating coating layer covering a body layer and two electrodes; and two lead wires respectively led out of the two electrodes to the outside of the insulating coating layer, wherein the capacitor comprises a polycrystalline body of the compound. Average grain size is 150
nm or less.

Preferably, the dielectric layer and the two electrodes are provided on a substrate, and the substrate is also covered by the covering layer.

Preferably, the substrate is made of a metal material or a good conductor, and is also used as one of the two electrodes.

A semiconductor device according to a fourth aspect of the present invention is a semiconductor device comprising a transistor formed on a semiconductor substrate and a capacitor provided on the semiconductor substrate and connected to the transistor. The body film is formed of a thin film of a ferroelectric material, the average crystal grain size of the thin film of the ferroelectric material is smaller than the thickness of the thin film, and
It is characterized in that it is not more than 0 nm.

Here, the thin film of the ferroelectric material constituting the dielectric film includes a ferroelectric material containing other ordinary dielectric materials.

The semiconductor device according to claim 5 is a semiconductor device comprising a transistor formed on a semiconductor substrate and a capacitor provided on the semiconductor substrate and connected to the transistor. Is made of a thin film of a ferroelectric material, and crystals are prepared so that the volume V of the crystal lattice of the thin film of the ferroelectric material is 1% or more larger than the value of the volume of the bulk material. It is characterized by.

Here, the bulk material is a single crystal or a polycrystalline material having a crystal grain size of 10 μm or more.

The semiconductor device according to claim 6, further comprising a transistor formed on a semiconductor substrate, and a capacitor provided on the semiconductor substrate and connected to the transistor. The ferroelectric material comprises a thin film of a ferroelectric material, the ferroelectric material is a bulk material, a ferroelectric material having a ferroelectric phase in the operating temperature range of the semiconductor element, and an average crystal grain size of the thin film. D is relative to the lower limit operating temperature T _o of the Curie temperature T _c and the semiconductor device of the bulk material

[0036]

(Equation 5) However, it is characterized in that k ₁ = 4800 nm ° C.

The semiconductor device according to claim 7, further comprising: a transistor formed on a semiconductor substrate; and a capacitor provided on the semiconductor substrate and connected to the transistor. The ferroelectric material is a thin film of a ferroelectric material, the ferroelectric material is a bulk material, a ferroelectric material having a ferroelectric phase in the operating temperature range of the semiconductor element, and the crystal lattice of the thin film Curie temperature T _c, the lower limit use of the semiconductor element temperature T _o and V the volume V _o of the crystal lattice of the bulk _{material> V o {1+ (T c} -T o) k 2} where k volume V bulk materials ₂ = 0.0003 / ° C.

The semiconductor device according to claim 8, further comprising: a transistor formed on a semiconductor substrate; and a capacitor provided on the semiconductor substrate and connected to the transistor. Comprises a thin film of a ferroelectric material, wherein the ferroelectric material is a bulk material and a ferroelectric material having a ferroelectric phase in the operating temperature range of the semiconductor element, and the thickness t of the thin film respect but lower operating temperature T _o of the Curie temperature T _c and the semiconductor device of the bulk material

[0039]

(Equation 6) However, it is characterized in that k ₃ = 9600 nm ° C.

The ferroelectric material is preferably a material in which Ba and / or Ti of BaTiO ₃ is partially replaced by another metal ion.

[0041]

According to the present invention, since the crystal grain size of the ferroelectric material of the memory capacitor is adjusted to 150 nm or less,
The temperature change of the dielectric constant near the Curie temperature of the ferroelectric material is drastically reduced, and a ceramic capacitor with good accuracy is obtained.

According to the present invention, since the crystal grain size or lattice constant of the ferroelectric thin film of the memory capacitor is adjusted, the temperature change of the dielectric constant is drastically reduced, and a highly reliable semiconductor device is obtained. Can be

Further, the ferroelectric thin film can be operated in the paraelectric phase of the ferroelectric material by reducing the Curie temperature by reducing the crystal grain size, adjusting the lattice constant or adjusting the film thickness. In addition, a ferroelectric material which cannot be used due to fatigue because it is in a ferroelectric phase in a conventional memory operating temperature range can be used without causing fatigue. Therefore, fatigue phenomena such as deterioration of insulation properties and reduction of accumulated charges are eliminated, a thin film capacitor having a small area and a large dielectric constant is obtained, and a highly integrated semiconductor device with high reliability is obtained.

[0044]

Next, the present invention will be described with reference to the drawings. 1A and 1B are diagrams showing an embodiment of the capacitor of the present invention, in which FIG. 1A is a cross-sectional explanatory view, FIG. 1B is a diagram showing crystal grains, and FIG. 2 is a cross-section showing another embodiment of the capacitor of the present invention. FIG. 3 is an explanatory cross-sectional view showing still another embodiment of the capacitor of the present invention, and FIG. 4 is (Ba _0.65 Sr _0.35 ) TiO.
Diagram showing the temperature change rate of the relative dielectric constant with respect to the crystal grain size of ₃ ,
FIG. 5 is a diagram showing the temperature change rate of the relative permittivity depending on the volume of the crystal lattice in the case of (Ba _0.65 Sr _0.35 ) TiO ₃ , and FIG. 6 shows the change amount of the Curie temperature with respect to the reciprocal of the crystal grain size of various materials. FIGS. 7A and 7B are diagrams showing changes in Curie temperature with respect to the volume of crystal grains of various materials.

As described above, the present inventors have conducted intensive studies on the improvement of the ferroelectric characteristics, and as a result, have found that the ferroelectric characteristics such as the change in the relative dielectric constant and the Curie temperature in the temperature range in which the electronic component is used. Is controlled by the crystal grain size of the ferroelectric layer or the ferroelectric thin film. In particular, by setting the average crystal grain size to 150 nm or less, the change in the relative dielectric constant of the ferroelectric material can be controlled around the electronic component used. It has been found that a change of about 20% or less can be suppressed in the temperature range of −20 ° C. to 80 ° C. In addition, the Curie temperature can be lowered by reducing the crystal grain size, and by lowering the Curie temperature below the operating temperature range of electronic components and using it in the paraelectric phase of a ferroelectric material, the dielectric constant increases. In addition, the present inventors have found that a semiconductor device for memory which has a small temperature change and does not cause fatigue can be obtained.

Here, BaTiO ₃ is used as the ferroelectric material.
And PbTiO ₃ , as well as a solid solution of BaTiO ₃ ,
BaTiO _{3 obtained} by substituting a part of Ba or Ti with one or more other metal ions is particularly excellent, and examples of Ba substituted ions include Sr, Ca, Cd, Mg,
(K, Bi) pair, (Tl, Bi) pair, (Rb, B
i) and the like are used.
For example, a pair of Zr, Hf, (Zn, Nb), (Mg, N
A pair b), a pair (Co, Ta) and the like are used. The dielectric layer or the dielectric thin film of the present invention is not only made of a ferroelectric material alone, but also has electrical properties such as insulation properties, suppression of a change in dielectric constant due to temperature, and mechanical properties such as mechanical strength. Various oxides, fluorides, and the like are mixed in the amount of about several mol% in order to improve the effect, and the same effect can be obtained with a material containing a ferroelectric material as a main component.

That is, FIG. 4 shows (Ba _0.65 Sr _0.35 ) T
Ambient temperature with respect to the average crystal grain size of iO ₃ is −20 ° C. to 80
As shown by the temperature change rate of the relative dielectric constant in the range of ° C., when the average crystal grain size is about 200 nm, there is a change of about 26%. Can be reduced to about 20%, and the rate of temperature change can be reduced to about 20% without mixing an additive as in the related art. Further reduce the average particle size, for example, 20n
By setting it to about m, the change rate of the dielectric constant can be suppressed to about 5%. By reducing the crystal grain size, the relative dielectric constant becomes about 740 at 220 nm,
It drops to about 300.

The relationship shown in FIG. 4 is (Ba _0.65 Sr _0.35 )
In the case of TiO ₃ , (Ba _x Sr _1-x ) T
It was confirmed that the same tendency was exhibited when x of iO ₃ was in the range of 0.5 ≦ x ≦ 0.75. In addition, BaTiO ₃ , PZT and PLZT showed the same tendency other than (Ba _x Sr _1-x ) TiO ₃ .

In order to form such a fine-grained ceramic having a small average crystal grain size, the conditions at the time of sintering are set to 700 to 110.
It is obtained by performing at 0 ° C. for a short time, and when performing by vapor phase reactive vapor deposition (CVD), it is obtained by forming a film at a substrate temperature of 400 to 550 ° C. during vapor deposition. By using an organometallic material that evaporates a ferroelectric compound as a raw material, and decomposing the raw material at about 300 to 500 ° C. for about several seconds to several tens of minutes by light or plasma or heat energy to deposit an oxide. I can get it.

The oxide dielectric thin film having small crystal grains is generally formed by a sputtering method or a CVD method.
By setting the film formation temperature to a low temperature of 00 ° C., a film structure having very fine massive crystal grains can be obtained. Also, after forming an amorphous film, annealing at 500 to 700 ° C. for several seconds to tens of minutes can provide fine bulk crystal grains.

Further, as shown in FIG. 5, it has been found that the temperature change rate of the dielectric constant of the ferroelectric can be greatly reduced by making the volume V of the crystal lattice larger than the volume V _{o of the} bulk material. . To achieve the conventional rate of change of 20% by adding additives to the temperature change of 100 ° C, the lattice volume can be increased by 1% with respect to the bulk material volume. 100 ° C if increased by 6.7%
5% change in the dielectric constant with respect to the temperature change.

In order to increase the volume V of the crystal lattice, for example, when a film is formed by a sputtering method, the flow ratio of Ar gas containing oxygen as a reaction gas is adjusted to a large value, or the film forming pressure is increased. This is obtained by adjusting the height to a high value, which is considered to be due to the fact that Ar is mixed into the thin film and the lattice constant becomes larger than usual.

The relationship shown in FIG. 5 is (Ba _0.65 Sr
_0.35 ) In the case of TiO ₃ , (Ba _x Sr _1-x ) T
A similar tendency is observed when x of iO ₃ is in the range of 0.5 ≦ x ≦ 0.75. In addition to (Ba _x Sr _1-x ) TiO ₃ , BaTi
A similar tendency was obtained for O ₃ and PZT.

Further, as shown in FIG. 6 or 7 , by reducing the crystal grain size or increasing the crystal lattice, the Curie temperature of the ferroelectric material is reduced as will be described in detail later. Can be done. By lower than the lower limit T _o of the operating temperature range of the semiconductor device Curie temperature T _c Therefore, always to operate at higher than the Curie temperature temperatures in any of the range of use temperature of the semiconductor device. As a result, the ferroelectric material can always be used in the paraelectric phase, and the relative dielectric constant is reduced (for example, about 10000 for (Ba _0.65 Sr _0.35 ) TiO ₃ is about 400). For example, Ta ₂ O ₅
Has a relative dielectric constant of about 20), and does not fatigue even when the number of times of writing to the memory becomes 10 ¹² or more.
A stable semiconductor device can be obtained.

Next, the present invention will be described in more detail with reference to specific examples.

[Embodiment 1] FIGS. 1A and 1B show an embodiment of a capacitor according to the present invention. FIG.
FIG. 3 is an explanatory view showing crystal grains in a partially enlarged view of the dielectric layer 1. In FIG. 1, reference numeral 1 denotes a dielectric layer made of a ferroelectric ceramic or the like, 2a and 2b denote electrodes, 3a and 3b denote lead wires, and 4 denotes an insulating coating layer. The crystal grain size in the conventional ceramic capacitor is several μm or more, but in the present invention, the crystal grain size is adjusted to 150 nm or less.

FIG. 4 shows the temperature change rate of the dielectric constant when the crystal grain size of (Ba _0.65 Sr _0.35 ) TiO ₃ is reduced. In FIG. 4, the horizontal axis indicates the crystal grain size (nm), and the vertical axis indicates the rate of change of the dielectric constant in a temperature range of 100 ° C.
When the crystal grain size is 200 nm, the temperature change rate is about 27%,
With 0 nm fine crystal grains, the temperature change is reduced to about 10%.
In order to reduce the temperature change rate to 20% or less in a temperature range of 100 ° C (the conventional ferroelectric ceramics has a temperature characteristic of about 20% by an additive), the crystal grain size is set to 150%.
nm or less.

In the ordinary method for producing ceramics, the crystal grain size becomes large and does not become 1 μm or less. A method for synthesizing microcrystalline ceramics will be described below. As in the synthesis of ordinary ceramics, raw materials such as carbonates and oxides are mixed, pressed, and then calcined. The calcined ferroelectric compound is pulverized with a ball mill for about 100 hours to synthesize a fine powder having an average particle diameter of 100 nm or less. Mix the binder with this fine powder,
Ceramics are obtained by sintering at low temperature for a short time.
Alternatively, the fine powder can be placed in a mold and molded by pressing.
Also, ceramics can be synthesized by heating while applying pressure. Electrodes 2a, 2b and lead wires 3a, 3b are provided on the ceramics by vapor deposition, bonding or baking, respectively, and an insulating coating layer 4 is applied to form a capacitor.

As a method for synthesizing the fine powder, there is a method obtained by hydrolyzing an alkoxide of a metal constituting the ferroelectric oxide.

As another method for synthesizing microcrystalline ceramics, there is a vapor phase reactive vapor deposition (CVD) method. In this method, an organometallic material that evaporates a ferroelectric compound is used as a raw material, and the raw material is decomposed by light, plasma, or heat energy to deposit an oxide. In this case, the synthesis temperature and the synthesis pressure are adjusted to obtain microcrystalline ceramics.

As another structure of the capacitor, there is a structure in which electrodes and dielectric layers are alternately laminated, and similar effects can be expected.

Embodiment 2 FIG. 2 is an explanatory sectional view of a microcrystalline ceramic capacitor which is another embodiment of the capacitor of the present invention. Reference numeral 5 denotes a substrate, on which electrodes 2a,
2b and a dielectric layer 1 having a capacitor structure. This capacitor is manufactured by the following method. Ni- on a substrate such as a fused quartz plate, alumina ceramics, or silicon substrate
A material for the electrode 2a such as an Al alloy, Ti, Au, or Al is formed by vacuum evaporation or the like, a ferroelectric layer 1 is deposited on the electrode by a CVD method or the like, and an electrode 2b is formed.
Furthermore, lead wires 3a and 3b are attached and an insulating coating layer 4 is applied. By adopting such a structure, the thin dielectric layer 1 can be formed with fine crystal grains, miniaturization of parts can be achieved, and mechanical strength of ceramics deposited by the CVD method is reinforced, and reliability is improved. And a ceramic capacitor having high temperature characteristics and good temperature characteristics can be obtained. Similar effects can be expected in a multilayer capacitor in which electrodes and dielectric layers are alternately stacked.

[Embodiment 3] FIG. 3 shows still another embodiment of the capacitor of the present invention. In this embodiment, a metal plate is used as the substrate 6 so that it can have the function of one electrode. Any material may be used as the material of the substrate 6 as long as it is a good conductor, and a semiconductor or an oxide conductor has the same effect.
For example, Ni-Al alloy, brass, stainless steel plate,
Or, these metal plates are plated with platinum, R
A metal plate coated with a conductive oxide such as uO ₂ can be used.

[Embodiment 4] Next, an embodiment in which the capacitor of the present invention is applied to a memory capacitor of a semiconductor device will be described. The appearance of the semiconductor element is exactly the same as that of the conventional example shown in FIG.
A ferroelectric thin film is used as 21c, and the crystal grains of this ferroelectric thin film are adjusted to have an average particle size of about 50 nm in this embodiment.

As described above, the temperature of the memory element during operation changes from 0 ° C. to 100 ° C. The crystal grain size of the ferroelectric thin film is 50
By adjusting the thickness to about nm, the relative dielectric constant is reduced to about 300, but the temperature change rate is extremely small at 5% in the range of 100 ° C., and a highly reliable memory element is obtained.

Next, a method of forming a ferroelectric thin film having small crystal grains will be described. The oxide ferroelectric thin film is usually formed by a sputtering method or a CVD method. In this case,
Conventionally, to prevent an increase in leakage current due to oxygen defects
The film is often formed in an oxidizing atmosphere at a high temperature of about 500 to 700 ° C. In addition, after film formation, high-temperature annealing is performed in an oxygen atmosphere to reduce leakage current and increase dielectric strength. Therefore, the thin film obtained by the CVD method has a columnar structure, and the thickness of the dielectric film is equal to the crystal grain size. When a ferroelectric thin film is formed by a sputtering method, a film of crystal grains which has a columnar structure or a fibrous film structure and is uniform in the film thickness direction is usually obtained. Although such a dielectric film having a columnar structure has a relatively large relative dielectric constant, a leak current easily flows, and there is a limit in reducing the thickness of the thin film and the crystal grain size.

In the present invention, however, the following film forming conditions are selected and the film is formed at a low temperature to form a film structure having very fine agglomerate crystal grains having a crystal grain size smaller than the thickness of the thin film. Could be obtained.

(1) Low film forming temperature (200 to 500 ° C.) (2) Low film forming pressure (2 Pa or less) (3) High Ar / O ₂ ratio (Ar: 9 / O ₂ : 1) (4) Comparison In addition, the film formation temperature has a great influence on the conditions for obtaining fine lump-shaped crystal grains, but other conditions such as pressure do not necessarily have to comply with these conditions, and film formation can be performed under other conditions. . Note that, as described above, the dielectric film of the present invention does not have a columnar structure in which crystal grains are formed over the entire thickness of the film,
It is formed so that the crystal grain size is always smaller than the thickness of the dielectric layer. The result is a massive structure.

As the electrode material, Pt, doped silicon, Pd, Ni-Al alloy, Ti, Au, Al,
ITO (iridium tin oxide), RuO ₂ or the like is used.

[Embodiment 5] Next, a description will be given of the rate of change of the dielectric constant with temperature due to the volume V of the crystal lattice of the dielectric film of the capacitor. The appearance of the semiconductor element is exactly the same as that of the conventional example shown in FIG. 9 except that a ferroelectric thin film is used as the dielectric film 21c, and the lattice constant of the ferroelectric film 21c is the same as that of a normal bulk. And the volume V of the crystal lattice is adjusted to be 1% or more larger than the value of a normal bulk material.

The lattice constant of the thin film may be different from that of a bulk material such as a single crystal or ceramic. This is related to the film formation method. For example, when a film is formed by a sputtering method, oxygen is mixed as a reaction gas in addition to Ar gas, but the flow rate ratio between oxygen and Ar is adjusted or the film formation pressure is adjusted. The adjustment changes the lattice constant of the thin film.
This is considered to be due to the fact that the lattice constant became larger than a normal value due to the inclusion of Ar in the thin film. In addition, stress is generated by forming a thin film on a different substrate,
The effect of changing the lattice constant is also considered.

It is known that the lattice constant changes depending on the film forming conditions. Although a correlation between the lattice constant a and the film forming conditions in a cubic material was considered, the crystal structure of the ferroelectric material sometimes takes a structure other than cubic, and cannot be discussed with one lattice constant. Here, the volume of the crystal lattice is specified instead of the change of the lattice constant due to the mixing of Ar or the film stress. If cubic, V = a ³ .

A ferroelectric thin film having a large lattice constant has a small change in dielectric constant with temperature. Ferroelectric (Ba _0.65 Sr
The crystal structure of the _0.35 ) TiO ₃ thin film is (pseudo) cubic. FIG. 5 is a diagram showing the volume V of the crystal lattice of this thin film and the temperature change rate of the dielectric constant in a temperature range of 100 ° C. It can be seen that in a thin film having a volume V larger than the normal value by 1.0% or more, the change in the dielectric constant with temperature becomes 20% or less.

Embodiment 6 Next, a description will be given of an embodiment in which the Curie temperature is adjusted according to the crystal grain size, and the paraelectric phase is always maintained within the operating temperature range of the semiconductor device. The structure of the semiconductor element is exactly the same as that of the conventional example shown in FIG. 9, except that the dielectric film 21c is made of a bulk material and has a Curie temperature T.
_c is constituted by a high ferroelectric than lower limit operating temperature T _o of the semiconductor device memory, the average crystal grain size D is

[0075]

(Equation 7) However, it is prepared so that k ₁ = 4800.

That is, the Curie temperature is a phase transition temperature between the ferroelectric phase and the paraelectric phase, and the dielectric constant becomes maximum. FIG. 6 shows the degree of decrease in the Curie temperature by reducing the crystal grain size. In FIG. 6, (Ba _0.65 Sr _0.35 ) Ti
O ₃ (hereinafter referred to as BST), Pb (Zr _0.52 T
i _0.48 ) O ₃ (hereinafter referred to as PZT), BaTiO ₃ (hereinafter referred to as BT), (Pb _0.95 La _0.05 ) (Zr _0.52 T
For a thin film of i _0.48 ) O ₃ (hereinafter referred to as PLZT), the relationship between the amount of decrease in the Curie temperature (difference from the Curie temperature of the bulk material) ΔT when the crystal grain size is changed is shown. As shown in FIG. 6, the temperature decrease ΔT is inversely proportional to the average crystal grain size D, and is expressed by the following equation.

[0077]

(Equation 8) Here, the value of the proportionality factor k ₁ is obtained slope Karae straight lines 6, is shown in Table 1.

[0078]

[Table 1] Since the measurement accuracy of the crystal grain size is about 50%, if the value of k is in the range of 600 to 4800, sufficient characteristics can be obtained as a ferroelectric thin film of a memory element.

Therefore, by adjusting the crystal grain size of the ferroelectric thin film having a ferroelectric phase as a bulk material in the memory element operating temperature range as shown in the equation (1), the ferroelectric thin film can be controlled in the memory element operating temperature range. It becomes a paraelectric phase.

[Embodiment 7] Next, an embodiment will be described in which the Curie temperature is adjusted according to the volume of the crystal lattice so that the paraelectric phase is always obtained within the operating temperature range of the semiconductor device. The appearance of the semiconductor element is exactly the same as that of the conventional example shown in FIG. 9, except that the dielectric film 21c is made of a bulk material and has a Curie temperature T.
_c is constituted by a high ferroelectric material than a memory device using the lower limit temperature T _o, the strength of the crystal lattice volume of the bulk material of the dielectric material as a V _o, the volume V of the crystal lattice is V> V _o { 1+ (T _c −T _o ) k ₂ ｝ (2) where k ₂ = 0.0003 / ° C.

That is, FIG. 7 shows the relationship between the V / V _{o and the} amount of decrease in the Curie temperature ΔT with respect to V / V _o when the lattice volume is changed variously for the three types of thin films of BST, PZT and BT.
This relationship is

[0082]

(Equation 9) And the values of 1 / k ₂ and k ₂ are as shown in Table 2.

[0083]

[Table 2] Table Examples 2 from k ₂ values, taking the range of 0.0003 0.001, it is possible to improve the properties of the ferroelectric thin film memory element.

Therefore, by preparing the crystal grains so that the lattice volume V of the ferroelectric thin film having a ferroelectric phase as a bulk material satisfies the formula (2) in the memory element operating temperature range, the ferroelectric thin film can be used as a memory element. It becomes a paraelectric phase in the temperature range.

[Embodiment 8] Next, an embodiment of the present invention for reducing the crystal grain size, operating in the paraelectric phase and improving the leak characteristics will be described. The structure of the semiconductor element is exactly the same as that of the conventional example shown in FIG.
Consists of a high ferroelectric material than the Curie temperature T _c is a memory device used lower limit temperature T _o in the bulk material as, and its thickness t is,

[0086]

(Equation 10) However, it is prepared so that k ₃ = 9600 nm ° C.

A thin film having a columnar or fibrous film structure has poor leakage characteristics and is not suitable for a capacitor of a memory element. On the other hand, the Curie temperature changes depending on the crystal grain size, so that a thin film having a bulky structure and a small crystal grain size are used. The film thickness is preferably twice or more the particle size represented by

[0088]

As described above, the present invention controls the crystal grain size of the ferroelectric layer or the volume of the crystal lattice, and thus has the following effects. (1) A high-precision, small-sized ceramic capacitor having a small temperature change in capacitance is obtained. (2) Since the capacitor is formed on the substrate, the strength is increased and a highly reliable capacitor can be obtained. (3) By integrating the substrate and the electrodes, a capacitor having a small number of components can be obtained. (4) In a semiconductor device for a memory using a ferroelectric thin film capacitor, by adjusting the crystal grain size or lattice constant of the ferroelectric thin film, the temperature change of the capacitance becomes small, and the reliability is high. A memory element is obtained. (5) By adjusting the crystal grain size, lattice constant or film thickness of the ferroelectric thin film in a memory device using a ferroelectric thin film capacitor having a ferroelectric phase in the operating temperature range of the memory device, the Curie temperature can be reduced. Since the temperature decreases and becomes a paraelectric phase in the operating temperature range, a highly reliable memory element can be obtained.

[Brief description of the drawings]

FIG. 1 is an explanatory sectional view of an embodiment of a capacitor according to the present invention.

FIG. 2 is an explanatory sectional view of a second embodiment of the capacitor of the present invention.

FIG. 3 is an explanatory sectional view of a capacitor according to a third embodiment of the present invention.

FIG. 4 is a diagram showing the temperature dependence of the dielectric constant with respect to the crystal grain size of the ferroelectric material according to the present invention.

FIG. 5 shows the crystal lattice volume V of the ferroelectric thin film according to the present invention.
FIG. 4 is a diagram showing a relationship between the temperature change rate of the dielectric constant and the temperature.

FIG. 6 is a diagram showing the relationship between the crystal grain size of the ferroelectric thin film and the Curie temperature decrease ΔT in the present invention.

FIG. 7 shows the crystal lattice volume V of the ferroelectric thin film according to the present invention.
FIG. 5 is a diagram showing a relationship between the Curie temperature and an amount of decrease ΔT.

FIG. 8 is an explanatory sectional view of a conventional ceramic capacitor.

FIG. 9 is an explanatory sectional view of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Dielectric layer 2a, 2b Electrode 3a, 3b Lead wire 4 Insulating coating layer 5 Substrate 6 Metal substrate 17 Transistor 21 Capacitor 21a, 21b Electrode 21c Dielectric film

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Tetsuro Makita 8-1-1 Tsukaguchi Honcho, Amagasaki City Inside the Materials and Devices Laboratory, Mitsubishi Electric Corporation (72) Inventor Kazunori Sato 8-1-1 Honcho Tsukaguchi, Amagasaki City Materials and Devices Laboratory, Mitsubishi Electric Corporation (56) References JP-A-3-80151 (JP, A) JP-A-3-50319 (JP, U)

Claims (3)

(57) [Claims] 1. A dielectric layer made of a ferroelectric compound or a material containing a ferroelectric compound as a main component, two electrodes provided on both sides of the dielectric layer, the dielectric layer and two electrodes A capacitor comprising: an insulating coating layer covering the insulating coating layer; and two lead wires respectively led out of the insulating coating layer from the two electrodes, wherein the dielectric layer is
A capacitor comprising a tarring film, wherein the average crystal grain size of the polycrystal of the compound is adjusted to 20 nm or more and 100 nm or less. 2. The sputtering film according to claim 1, wherein said sputtering film is an argon gas.
90% of oxygen gas, 10% of oxygen gas as the introduced gas,
Conditions for film formation temperature of 200 to 500 ° C and film formation pressure of 2 Pa or less
The capacitor according to claim 1 , wherein the dielectric layer and the two electrodes are provided on a substrate, and the substrate is also covered by the covering layer. 3. The dielectric layer according to claim 2 , wherein said dielectric layer has a crystal structure.
The volume of the crystal is a crystal of the bulk material of the sputtering film.
The capacitor according to claim 1, wherein the capacitor has a size not less than 1.02 times the volume of the lattice .