JP3289062B2 - Delta-sigma modulation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a delta-sigma modulation circuit in an analog / digital converter used for digital AV equipment and the like.

[0002]

2. Description of the Related Art As a conventional delta-sigma modulation circuit,
For example, see “Research on high-accuracy A / D and D / A conversion circuit design technology for voice and audio (Tokyo Institute of Technology doctoral dissertation) P.10
MASH (Multi-st Age noise SH) described in "2.
aping) There is a differential version of the first stage integrator in the circuit.

FIG. 3 is a block diagram showing a configuration of a conventional delta-sigma modulation circuit.

In FIG. 3, reference numeral 100 denotes a first subtractor, 1
01 is the first integrator, 102 is the second subtractor, 103 is the second integrator, 104 is the third subtractor, 105 is the fourth subtractor, 106 is the third integrator, 107 is Quantizer, 1
08 is a delay unit for feedback, 109 is a sign inverter, 110 is a first adder, 111 is an inverted amplifier, 112 is a second adder, and 120 is a first adder 110, an amplifier 111 and a second adder. And a local DC feedback circuit comprising the adder 112 of FIG.

The difference signal obtained by subtracting the feedback signal FB by the delay unit 108 from the positive-phase analog input signal + IN by the first subtractor 100 is added to the output of the inverted amplifier 111 by the second adder 112. Later, the first integrator 101
Is input to Further, a signal obtained by adding the feedback signal FB by the delay unit 108 via the sign inverter 109 from the analog input signal −IN of the opposite phase by the second subtractor 102 is
The signal is input to the second integrator 103. First integrator 101
The output of the second integrator 103 and the output of the second
4 and is added by the first adder 110.

The positive-phase analog input signal + IN and the negative-phase analog input signal −IN are input in opposite phases, and further, a feedback signal FB from a delay unit 108 to the first subtractor 100 and the second subtractor 102. Are also in opposite phases,
The amplitude of the signal component subtracted by the third subtractor 104 becomes twice the amplitude of the output signal component of the first integrator 101 as it is. Therefore, the gain of the third subtractor 104 is 1 /
Set to 2. The output of the third subtractor 104 is obtained by taking the difference between the output of the third subtractor 104 and the feedback signal FB by the delay unit 108, input to the third integrator 106, and then quantized by the quantizer 107. You. The output of the quantizer 107 is extracted as a digital output signal D _OUT from the delta-sigma modulator, and is input to a feedback delay unit 108 for delaying by one sampling period and converting it to an analog signal. Then, the signals are fed back to the first subtractor 100, the second subtractor 102, and the fourth subtractor 105.

The positive-phase analog input signal + IN and the negative-phase analog input signal −IN are input in opposite phases,
Further, since the feedback signals FB from the delay unit 108 to the first subtractor 100 and the second subtractor 102 are also out of phase with each other, the signal components are canceled by the first adder 110 and the first adder 110 Is a signal to which only a DC offset component and circuit noise generated in the first and second integrators 101 and 103 are added.

The output signal DC of the first adder 110 is amplified by a factor of −K by the inverting amplifier 111 and is input to the other input terminal of the second adder 112.

The first adder 110, the amplifier 111, and the second adder 112 mainly include the first and second integrators 1
A local DC feedback circuit 120 for eliminating the instability of the circuit due to the DC offset generated in the first and second integrators 101 and 103 has a function of fixing the output DC voltage of the first and second integrators 101 and 103. are doing.

The DC component that appears in the output due to the offset voltage generated by the first integrator 101 is α, the second integrator 1
Assuming that a DC component appearing in the output due to the offset voltage generated by the first adder 110 is β.
Is DC = α + β. However, a noise component is not considered here.

The output signal DC of the first adder 110 is inverted and amplified by an inverting amplifier 111 to become −K · DC, and this signal is fed back to the first integrator 101 via the second adder 112. You.

Next, the movement of the potential of each part of the conventional delta-sigma modulation circuit configured as described above will be described with reference to FIG.

When the sum of the DC components α and β due to the offset voltage, that is, the output signal DC from the first adder 110 is positive, the negative DC voltage is reduced by the inverting amplifier 111 and the second adder 112 to the first. Is added to the integrator 101, and the DC component β does not change.
The DC component α output from the integrator 101 moves in the negative direction as shown by (H). And with this,
As shown in (I), the output signal DC also goes in the negative direction.
Conversely, when the output signal DC is negative, the first integrator 10
The DC component α output by 1 moves in the positive direction as shown by (J), and accordingly, the output signal DC also goes in the positive direction as shown by (K). That is, the output signal DC is stabilized at 0, that is, at a potential such that α = −β as shown in (L).

[0014]

However, in the above-described conventional delta-sigma modulation circuit, the output -K.DC of the local DC feedback circuit 120 is equal to the second adder 1.
12 is input to the first integrator 101 but is not input to the second integrator 103, so that the noise generated by the local DC feedback circuit 120 itself is generated only in the output of the first integrator 101. Appears and does not appear in the output of the second integrator 103, and the effect of noise remains even by the subtraction processing in the third subtractor 104, and the remaining noise is added to the signal component. / N (signal-to-noise ratio) characteristic is degraded.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and aims to stabilize the operation of a delta-sigma modulation circuit by a local DC feedback circuit and to provide a local DC feedback circuit itself for stabilizing the operation. It is an object of the present invention to provide a delta-sigma modulation circuit having good S / N characteristics by removing generated noise.

[0016]

In order to achieve the above object, a delta-sigma modulation circuit according to the present invention integrates a positive-phase analog input signal with a first integrator and outputs a negative-phase analog input signal. Is integrated by a second integrator, a signal obtained by subtracting the output of the second integrator from the output of the first integrator is integrated by a third integrator, the integrated output is quantized, and the quantization is performed. and fed back delayed by one sampling period into analog and generates a feedback signal through the delayer with taking out an output as a digital output signal, the feedback signal and the second product
And returns the inverted signal of the feedback signal to a first input
And an input of the third integrator is fed back, and the output of the first integrator and the output of the second integrator are added and the inverted and amplified signal is fed back to the first integrator. In the delta-sigma modulation circuit thus configured, the addition and inversion amplification signal of the outputs of the two integrators is also fed back to the second integrator. The addition and inversion amplified signals of the outputs of the first and second integrators are fed back not only to the first integrator but also to the second integrator, so that the operation of the circuit is stabilized and the feedback signals of both of them are reduced. polarity·
Since the level is the same, the noise generated by the feedback circuit itself is canceled by the subtraction means up to the third integrator.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
The sigma modulation circuit integrates a positive-phase analog input signal with a first integrator, integrates a negative-phase analog input signal with a second integrator, and calculates the second integration from an output of the first integrator. A signal obtained by subtracting the output of the mixer is integrated by a third integrator, the integrated output is quantized, the quantized output is extracted as a digital output signal, and is converted to an analog signal via a delay unit.
A feedback is generated by delaying the sampling period and generating a feedback signal.
This feedback signal is fed back to the input side of the second integrator,
The inverted signal of the feedback signal is fed back to the input side of the first and third integrators, the output of the first integrator and the output of the second integrator are added, and the inverted and amplified signal is output to the first integrator. In a delta-sigma modulation circuit configured to feed back to one integrator, the addition and inversion amplification signal of the outputs of the two integrators is also fed back to the second integrator. The addition and inversion amplified signals of the outputs of the first and second integrators are fed back not only to the first integrator but also to the second integrator, so that the operation of the circuit is stabilized and the feedback signals of both of them are reduced. Since the polarity and the level are the same, the noise generated by the feedback circuit itself is canceled by the subtraction means up to the third integrator, so that the noise does not become a factor for deteriorating the S / N characteristic. It is possible to maximize the effect of improving the S / N characteristics by the differential input.

According to a second aspect of the present invention, there is provided a delta-sigma modulation circuit for subtracting an output of a feedback delay device from a positive-phase analog input signal and integrating a signal obtained by adding an output of an inverting amplifier. A second integrator that integrates a signal obtained by adding an integrator of the first integrator, an analog input signal of the opposite phase, and an output of the delay unit.
An integrator, a subtractor for subtracting the output of the second integrator from the output of the first integrator, and a signal obtained by adding the output of the first integrator and the output of the second integrator The inverting amplifier for inverting and amplifying the signal, a third integrator for integrating a signal obtained by subtracting the output of the delay unit from the output of the subtractor, and a quantization for quantizing the output of the third integrator. Vessels,
A delta-sigma modulation circuit configured to delay the output of the quantizer for one sampling period and convert the output to an analog signal, and to extract a digital output signal from the quantizer. The circuit is characterized in that the output of the inverting amplifier is also added to the input of the second integrator. A signal obtained by adding the output of the first integrator and the output of the second integrator is inverted and amplified by an inverting amplifier, and the output of the inverting amplifier is output not only to the first integrator but also to the second integrator. Since the feedback and addition are performed, the operation of the circuit is stabilized, and since the feedback signals of both of them have the same polarity and level, the noise generated by the feedback circuit itself is reduced by the first and second integrators. , The influence of each offset voltage on the DC component is canceled out by the subtractor that subtracts the output of the first integrator and the output of the second integrator, so that the S / N It does not become a factor of deteriorating the characteristics, and makes it possible to maximize the effect of improving the S / N characteristics by the differential input.

Hereinafter, specific embodiments of the delta-sigma modulation circuit according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing a delta signal according to an embodiment of the present invention.
FIG. 3 is a block diagram illustrating a configuration of a sigma modulation circuit. In FIG. 1, the same reference numerals as those in FIG. 3 according to the prior art denote the same components, and the description will be made again including the connection relationship. When the input terminal of the positive-phase analog input signal + IN is connected to the first subtractor 100 by ( +) Connected to the input terminal and the feedback delay 1
08 is connected to the (-) input terminal of the first subtractor 100. The output terminal of the first subtractor 100 is connected to the input terminal of the first integrator 101 via the second adder 112. An input terminal of the analog input signal −IN having a phase opposite to that of the positive phase analog input signal + IN is connected to a (+) input terminal of the second subtractor 102, and a delay unit 108 is provided.
Output terminal of the second subtractor 1 via the sign inverter 109.
02 (-) input terminal. An output terminal of the second subtractor 102 is connected to an input terminal of the second integrator 103 (through a third adder 113 described later).

The output terminal of the first integrator 101 is connected to the (+) input terminal of the third subtractor 104, and the output terminal of the second integrator 103 is connected to the (-) input terminal of the third subtractor 104. Connected to terminal. The gain of the third subtractor 104 is 1 /
It is set to 2. The output terminal of the third subtractor 104 is connected to the (+) input terminal of the fourth subtractor 105, and the output terminal of the delay unit 108 is connected to the (-) input terminal of the fourth subtractor 105. . The output terminal of the fourth subtractor 105 is connected to the input terminal of the third integrator 106, and the output terminal of the third integrator 106 is connected to the input terminal of the quantizer 107. The output terminal of the quantizer 107 is connected to the output terminal of the delta-sigma modulation circuit and to the input terminal of the feedback delay unit 108. FB is a feedback signal from the delay unit 108.

The output terminal of the first integrator 101 and the output terminal of the second integrator 103 are connected to respective input terminals of a first adder 110, and the output terminal of the first adder 110 is The gain is connected to the input terminal of the second adder 112 via an inverting amplifier 111 having a gain of -K.

In the present embodiment, the following configuration is provided in addition to the above configuration. Second subtractor 102
A third adder 113 is inserted in the connection line between the output terminal of the second integrator 103 and the input terminal of the second integrator 103, and the output terminal of the first adder 110 is connected to the third adder via the inverting amplifier 111. It is connected to the input terminal of the adder 113.
That is, the output −K · DC of the inverting amplifier 111 is the second
The first integrator 101 is fed back to the first integrator 101 via the adder 112, and is also fed back to the second integrator 103 via the third adder 113.
First adder 110, amplifier 111, and second adder 11
2 and the third adder 113, the local DC feedback circuit 12
1 is configured.

The basic operation of the delta-sigma modulation circuit according to the present embodiment configured as described above is almost the same as that of the conventional delta-sigma modulation circuit, and the description is omitted.

Hereinafter, the movement of the potential of each part of the delta-sigma modulation circuit of the present embodiment configured as described above will be described with reference to FIG.

When the sum of the DC components α and β due to the offset voltage, that is, the output signal DC from the first adder 110 is positive, the inverted amplifier 111 and the second adder 112 or the third adder 113 Adds a negative DC voltage to the first integrator 101 and the second integrator 103, so that the DC component α output by the first integrator 101
And the DC component β output from the second integrator 103 both move in the negative direction as shown in (A) and (B). Accordingly, the output signal DC also goes in the negative direction as shown in FIG. Conversely, when the output signal DC is negative, the first integrator 101 and the second integrator 1
03 output DC components α and β respectively (D),
Both move in the positive direction as shown in (E), and accordingly, the output signal DC also moves in the positive direction as shown in (F). That is, the output signal DC is stabilized at 0, that is, at a potential such that α = −β as shown in (G).

In this case, the output −K · DC of the local DC feedback circuit 121 is input to the first integrator 101 via the second adder 112, and is also input to the second integrator 101 via the third adder 113. Is also input to the integrator 103. That is, a signal having the same polarity and level is input to the first integrator 101 and the second integrator 103, and this signal is canceled by the third subtractor 104. The effect of the noise generated by 121 itself does not appear in the output of the delta-sigma modulation circuit, and does not become a factor for deteriorating the S / N characteristics. Therefore, S /
It is possible to maximize the effect of improving the N characteristics.

[0028]

As described in detail above, the present invention provides a
According to the sigma modulation circuit, it is possible to stabilize the operation of the modulation circuit, and to cancel the influence of noise generated by the local DC feedback circuit itself for stabilizing the operation, thereby improving the S / N characteristics. A delta-sigma modulation circuit can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a delta-sigma modulation circuit according to an embodiment of the present invention.

FIG. 2 is an operation explanatory diagram of the delta-sigma modulation circuit according to the embodiment;

FIG. 3 is a block diagram illustrating a configuration of a delta-sigma modulation circuit according to a conventional technique.

FIG. 4 is an operation explanatory diagram of a delta-sigma modulation circuit according to a conventional technique.

[Explanation of symbols]

100 first subtractor 101 first integrator 102 second subtractor 103 second integrator 104 third subtractor 105 fourth subtractor 106 ... Third integrator 107... Quantizer 108... Delay unit 109... Sign inverter 110... First adder 111... Inverting amplifier 112. Adder 121... Local DC feedback circuit + IN... Positive phase analog input signal −IN... Negative phase analog input signal D _OUT ... Digital output signal FB.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-233921 (JP, A) JP-A-1-101027 (JP, A) JP-A-6-61862 (JP, A) JP-A 8- 307275 (JP, A) Special Table Hei 8-508624 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H03M 3/02 H03M 1/08

Claims (2)

(57) [Claims] 1. An in-phase analog input signal is integrated by a first integrator, an anti-phase analog input signal is integrated by a second integrator, and the second integration is performed from an output of the first integrator. A signal obtained by subtracting the output of the amplifier is integrated by a third integrator, the integrated output is quantized, the quantized output is taken out as a digital output signal, and is converted into an analog signal via a delay unit, delayed by one sampling period and fed back. To generate a feedback signal, and the feedback signal is fed back to the input side of the second integrator.
The inverted signal of the return signal is fed back to the input side of the first and third integrators, the output of the first integrator and the output of the second integrator are added, and the inverted signal is added to the first integrator. In the delta-sigma modulation circuit configured to feed back to the integrator, the delta-sigma modulation circuit is configured to also feed back the addition-inverted amplified signal of the outputs of the two integrators to the second integrator. Sigma modulation circuit. 2. A first integrator for subtracting an output of a feedback delay unit from a positive-phase analog input signal and further integrating a signal obtained by adding an output of an inverting amplifier, and a negative-phase analog input signal. A second integrator for integrating a signal obtained by adding the output of the delay unit, a subtractor for subtracting an output of the second integrator from an output of the first integrator, and a first integrator An inverting amplifier for inverting and amplifying a signal obtained by adding the output of the second integrator and an output of the second integrator; and a third integrator for integrating a signal obtained by subtracting the output of the delay unit from the output of the subtractor. A quantizer for quantizing an output of the third integrator; and a feedback delayer for delaying an output of the quantizer for one sampling period and converting the output to an analog signal. The digital output signal from the converter In the delta-sigma modulation circuit that is forms, delta, characterized in that the output of the inverting amplifier are configured so as also added to the input of said second integrator
Sigma modulation circuit.