JP3289979B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device applied to a gate electrode of a thin film transistor (hereinafter referred to as a TFT) for forming an image display device in combination with a liquid crystal or the like.

[0002]

2. Description of the Related Art Liquid crystal display devices are promising among thin displays because of their characteristics such as low power consumption and easy full-color display. In recent years, the development of large display screens has been actively carried out. .

A structure of a TFT on an active matrix substrate constituting a conventional liquid crystal display device will be described with reference to a cross-sectional view of a main part configuration shown in FIG. A conventional TFT includes a gate electrode 2 made of, for example, aluminum on a glass substrate 1.
Is formed, a first gate insulating layer 3 of aluminum oxide is formed so as to cover the gate electrode 2, and an amorphous silicon semiconductor layer 5 is formed via a second gate insulating film 4 of silicon nitride. Then, source and drain electrodes 7a and 7b made of titanium and aluminum are formed via phosphorus-containing amorphous silicon semiconductor layers 6a and 6b,
A transparent display electrode 8 for applying a voltage to the liquid crystal is formed connected to the drain electrode 7b.

Next, a brief description will be given of a manufacturing process of the TFT having the above-described structure. First, a film of aluminum Al is formed on a glass substrate 1, and a gate electrode 2 is formed by photolithography and etching. Next, a first gate insulating film 3 of aluminum oxide is formed by anodic oxidation of a necessary portion of the gate electrode 2 described above. Next, a second gate insulating film 4 made of silicon nitride SiNx, which is a main material of the TFT, and amorphous silicon (a-S
i) The semiconductor layer 5 and an n ⁺ -a-Si layer for obtaining ohmic contact between the source and drain electrodes and the semiconductor layer are continuously formed by a plasma CVD method to form an a-Si layer other than where a TFT is formed. The n ⁺ -a-Si layer is removed by etching. Next, a film of iTO is formed, and a transparent display electrode 8 is formed by photolithography and etching. Next, in order to expose the surface of the gate electrode wiring and obtain electrical contact with the source wiring forming the source and drain electrodes, an opening is provided in the silicon nitride gate insulating film 4, and then titanium Ti and aluminum A film is formed in the order of Al, and a source electrode 7a and a drain electrode 7b are formed by photolithography and etching.
The n ⁺ -a-Si layer on the channel portion of the FT is removed to remove T ⁺
FT is completed.

[0005]

However, in the above-described conventional structure, when the aluminum gate electrode 2 is formed by the photolithography technique, or when the insulating film 4 and the semiconductor layer 5 are formed by the plasma CVD, etc., during the manufacturing process. Since there is a thermal process in which the substrate temperature becomes high, hillocks (growth of protrusions) are generated in the gate electrode using pure aluminum, and the protrusions are sufficiently removed in the subsequent stage of aluminum oxide formation in the anodic oxidation process. Insufficiency due to the inability to cover reduces the insulation, causing a short-circuit between the row wiring and the column wiring, or the aluminum Al surface where the source electrode wiring comes into contact with the gate electrode wiring is roughened, resulting in poor connection. There was a problem that it became high.

Therefore, in order to prevent such a defect occurring in the aluminum gate electrode, the gate electrode is formed by using aluminum Al to which an anodic oxidizable refractory metal is added as an impurity.
A technique for suppressing an hillock of 1 and forming an anodic oxide film having good insulating properties has been studied. However, when this technique is used, although hillocks can be suppressed, there is a new problem that the wiring resistance is extremely increased due to the addition of a high melting point metal impurity to the aluminum layer.

In view of the above-mentioned problems in the conventional semiconductor device, the present invention prevents hillocks of aluminum without increasing the wiring resistance of the gate electrode, and forms an anodic oxide film having high interlayer insulation as a gate insulating film. And a semiconductor device capable of forming the semiconductor device.

[0008]

According to the present invention, there is provided a method for manufacturing a semiconductor device, comprising the steps of changing the concentration of anodically oxidizable refractory metal continuously or stepwise in the vertical direction of the substrate on the negative side of the substrate. A first conductor layer as a component is selectively formed, an anodically oxidized oxide film is formed on the first conductor layer, and a semiconductor is formed via an insulating layer formed on the oxide film. A first conductive layer is formed selectively so as to partially overlap the first conductive layer, a second conductive layer is formed so as to partially overlap the semiconductor layer, and the first non-anodized first layer is formed .
The refractory metal concentration of the conductor layer is continuously
Or a semiconductor device that is changed stepwise .

[0009]

According to the present invention, the thickness of the substrate is continuously
Alternatively, since the refractory metal that can be anodically oxidized so that the concentration changes stepwise is added to the first conductor layer,
A first conductor layer having a lower additive concentration on the substrate side and a higher insulator layer side, or conversely, a first conductor layer having a higher additive concentration on the substrate side and a lower insulator layer side, is obtained. In a low portion, the wiring resistance can be reduced, and since the high-melting-point metal is contained in the layer, hillocks are suppressed and coverage of the oxide film by anodic oxidation is improved.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. [Embodiment 1] FIG. 1 is a sectional view showing the structure of a main part of a TFT according to an embodiment of the present invention. The TFT is provided at each portion where the gate electrode wiring and the source electrode wiring on the active matrix substrate in the liquid crystal display device intersect, and is provided at a position facing the glass substrate (substrate) 1. A liquid crystal (not shown) is sandwiched between the liquid crystal display device (not shown) and the liquid crystal display device.

In FIG. 1, the structure of the TFT is such that tantalum Ta is added on the glass substrate 1 by continuously increasing the concentration from 0 to 2 at% from the glass substrate 1 side toward the surface (the direction of arrow A). A gate electrode 2 is formed as a first conductor layer made of aluminum (thickness: 300 nm). The aluminum oxide gate insulating layer (film) is formed as an oxide film by anodization so as to cover the gate electrode 2. An amorphous silicon semiconductor layer 5 as a first non-single-crystal semiconductor layer is formed on the aluminum oxide gate insulating layer 3 via a silicon nitride gate insulating film 4 as an insulating thin film layer. A transparent display electrode 8 for applying a voltage to the liquid crystal via the silicon nitride gate insulating film 4 is formed. Quality silicon semiconductor layer 6a, 6b
Via a source electrode 7a and a drain electrode 7 made of titanium Ti and aluminum Al as a second conductor layer
b is formed, and the drain electrode 7 b is connected to the transparent display electrode 8. Note that the first and second non-single-crystal semiconductor layers can be regarded as semiconductor layers.

In the method of forming the gate electrode 2 of the present embodiment, a pure aluminum target and an aluminum target containing 2 at% of tantalum Ta are placed on a tray on which the glass substrate 1 is placed by using an in-line type DC sputtering apparatus. (Not shown) are deposited and deposited in the order in which they travel in the direction in which the targets intercept. In this vapor deposition method, the region in which the vapor deposition material scatters from the target in a conical shape by sputtering overlaps with the portion scattered only from the pure aluminum target and both the pure aluminum and the aluminum target including tantalum Ta. The scattered part and the tantalum T
A portion that scatters only from the aluminum target containing a is formed, and the concentration of the tantalum Ta that scatters toward the target side of the aluminum containing tantalum Ta is formed in the portion that overlaps and scatters. This means that it is gradually increasing. Therefore, the tray on which the glass substrate 1 is placed advances each of those portions,
On the glass substrate 1, in a direction perpendicular to the glass substrate 1,
The gate electrode 2 in which the concentration of tantalum Ta continuously increases can be obtained. Note that the steps after the formation of the gate electrode 2 are the same as the steps of manufacturing a conventionally known TFT, and a description thereof will be omitted.

According to this embodiment, since the low-concentration region of tantalum Ta exists under the gate electrode 2, the wiring resistance is lower than the wiring resistance of the aluminum single layer to which tantalum Ta is added at a constant concentration of 2 at%. Can be suppressed to 以下 or less.

Since the gate electrode 2 as a whole has tantalum Ta, which is a high melting point metal, added to aluminum Al, hillocks are not generated even after the heat treatment in the photolithography process, and the process is performed thereafter. ,
The coverage with aluminum oxide formed by using the anodic oxidation method is improved. Also, the leakage current of aluminum oxide is
The leak current is substantially equal to the leak current of aluminum oxide formed by anodizing aluminum Al having a purity of 99.99%,
This can prevent a short circuit between the gate electrode and the source electrode and between the gate electrode and the drain electrode.
Yield can be improved. In addition, 300 ° C
No formation of hillocks was observed even after the formation of silicon nitride SiNx, and the surface of aluminum Al at the contact portion between the gate electrode wiring and the source electrode wiring was not rough, so that good electrical contact was obtained. Embodiment 2 Next, another embodiment of the present invention will be described with reference to FIG.

FIG. 2 is a cross-sectional view of a main part of a TFT according to another embodiment. The TFT shown in the figure has a structure in which a passivation silicon nitride film 9 as a surface protection film is formed on an amorphous silicon semiconductor layer 5 forming a channel portion. It has a similar configuration. Note that the silicon nitride film 9 is formed in order to prevent deterioration of device characteristics due to outside air such as humidity.

A brief description will be given of a method of manufacturing a TFT having this configuration. First, on a glass substrate 1, aluminum A containing tantalum Ta having a continuous concentration change of 0 to 2 at% in the thickness direction by the same film forming method as in the above-described embodiment.
1 (thickness: 300 nm) is formed by sputtering, and the gate electrode 2 is formed by photolithography and etching. Next, a gate insulating layer (thickness: 150 nm) 3 of aluminum oxide is formed by anodizing the necessary portion of the gate electrode 2 described above. Next, a gate insulating film (film thickness 2) made of silicon nitride SiNx which is a main material of the TFT.
00 nm) 4, an amorphous silicon (a-Si) semiconductor layer (thickness: 50 nm) 5, and a passivation silicon nitride film (100 nm) 9 are sequentially and sequentially deposited by a plasma CVD method. Subsequently, the silicon nitride film 9 for passivation is etched into an island shape. Next, after forming phosphorus-containing amorphous silicon semiconductor layers (n ⁺ -a-Si) (thickness: 50 nm) 6a and 6b over the entire surface, a-Si layers other than those where TFTs are formed and n ⁺ - a-Si
The layer is etched away. Next, iTO (film thickness 100n)
m), and a transparent display electrode 8 is formed by photolithography and etching. Next, titanium Ti
(Film thickness 100 nm) and aluminum Al (film thickness 30
0 nm), and the source electrode 7a and the drain electrode 7 are formed by photolithography and etching.
b. Finally, the n ⁺ -a-Si layer remaining on the silicon nitride film 9 for passivation is removed to remove the TFT.
Is completed.

According to this embodiment, as in the previous embodiment,
Since a hillock of the gate electrode is prevented and an anodic oxide film having a low leakage current can be formed, a TFT in which a passivation film is formed in a channel portion can be manufactured without causing a short circuit between the gate electrode and the source electrode. .

As described above, in the embodiment of the present invention, the addition concentration of the anodically oxidizable refractory metal is continuously increased in the direction A (see FIG. 1) which is the thickness direction of the film thickness. A portion having a low additive concentration exists in the first conductor layer;
Thereby, the wiring resistance can be reduced as compared with the case where the gate electrode is formed of an aluminum layer to which a high melting point metal is added at a constant concentration. In addition, since the aluminum portion where the high melting point metal is added at a high concentration suppresses hillocks, the coverage of the oxide film by anodic oxidation is improved,
Further, since the added impurity itself becomes an oxide by anodic oxidation, the leakage current does not increase. As a result, the interlayer insulating property of the gate insulating film is improved, and short circuit failure between the gate electrode and the source and drain electrodes can be prevented. Further, since no hillock is generated, it is possible to prevent a contact failure of the source electrode wiring with the gate electrode wiring.

In the embodiment of the present invention, the case where the additive concentration of the impurity (tantalum Ta) is continuously increased from 0 to 2 at% from the glass substrate side toward the surface has been described. The same effect can be obtained by continuously increasing the thickness from 0 to 2 at% in the direction toward the glass substrate (the direction of arrow B in FIG. 1). Thus, it is considered that the generation of hillocks can be suppressed even when the concentration of impurities on the aluminum layer surface side is low, because the hillocks are caused not only by the aluminum surface but also by the internal mass transfer of aluminum by heat. That is, even when the additive concentration is continuously increased in the direction toward the glass substrate, an appropriate amount of tantalum Ta exists on the surface side of the aluminum layer, and the additive concentration is further increased in the direction toward the glass substrate. It is considered that mass transfer due to heat could be suppressed, and as a result, hillocks could be suppressed.

In the embodiment of the present invention, the configuration in which the addition concentration in the aluminum layer is continuously changed is described. However, the present invention is not limited to this, and the configuration in which the addition concentration is changed stepwise may be used.

In the embodiment of the present invention, the description has been made mainly on the use of aluminum Al containing tantalum Ta as an impurity for the gate electrode. However, the present invention is not limited to this, and titanium Ti, molybdenum Mo, tungsten W,
Even if a gate electrode is formed using aluminum Al containing one or more of hafnium Hf, niobium Nb, zirconium Zr, and vanadium V, increase in wiring resistance is suppressed to prevent hillocks and reduce leakage current. It has the same effect that an anodic oxide film can be formed.

The present invention can be applied to a semiconductor device such as a thin film transistor and a liquid crystal display device using the same. In particular, since the wiring resistance of the conductor layer can be suppressed, application to a large-screen liquid crystal display device is possible.

[0023]

As is apparent from the above description, the present invention provides a method for forming a first conductive layer using aluminum containing an anodizable refractory metal having a continuous or stepwise change in concentration in the thickness direction. Since the body layer is formed, there is an advantage that hillocks can be prevented by suppressing an increase in wiring resistance.

Further, since an anodic oxide film having a low leakage current can be formed, a short circuit between the first conductive layer and the second conductive layer, that is, the gate electrode and the source electrode can be prevented. There is an advantage that a contact failure of a connection portion of a wiring can be prevented, and thereby a semiconductor device having a high production yield can be provided.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a main part configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a main part of a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 1 glass substrate (substrate) 2 gate electrode (first conductor layer) 3 aluminum oxide insulating layer (oxide film) 4 silicon nitride insulating layer (insulating thin film layer) 5 amorphous silicon semiconductor layer (first non-single crystal) Semiconductor layer) 6a, 6b Amorphous silicon semiconductor layer (second non-single-crystal semiconductor layer) 7a, 7b Source and drain electrodes (second conductor layer) 8 Transparent display electrode

────────────────────────────────────────────────── ─── Continued on the front page (72) Koji Matsunaga, Inventor 1006 Kadoma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-4-353830 (JP, A) JP-A-4-299865 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29 / 786 H01L 21/336 H01L 21/3025 H01L 21/768 H01L 21/28 H01L 29/40 G02F 1/1368

Claims (4)

(57) [Claims] 1. A method according to claim 1, wherein the addition concentration of the anodically oxidizable refractory metal is continuously or stepwise changed in the vertical direction of the substrate on the minus side of the substrate.
A conductive layer is selectively formed, an anodized oxide film is formed on the first conductive layer, and the semiconductor layer is formed on the first conductive layer via an insulating layer formed on the oxide film. conductive layer and is selectively formed so as to overlap partially, the semiconductor layer and partially overlapping the second conductive layer is formed, the positive
High melting point metal concentration of first conductor layer not subjected to extreme oxidation
Is changed continuously or stepwise in the vertical direction of the substrate.
Wherein a that. 2. A method according to claim 1, further comprising: forming a first layer mainly composed of aluminum on one surface of the substrate, wherein the addition concentration of the refractory metal impurity capable of being anodized is changed continuously or stepwise in the vertical direction of the substrate. A conductor layer is selectively formed, an oxide film is formed on the surface of the first conductor layer by anodic oxidation, and a first non-single-crystal semiconductor layer containing silicon as a main component is formed via an insulating layer. A first conductive layer which is selectively formed so as to partially overlap with the first conductive layer, and wherein the second conductive layer is formed through a second non-single-crystal semiconductor layer mainly containing silicon containing phosphorus. The anode formed so as to partially overlap the single crystal semiconductor layer;
The refractory metal concentration of the first conductor layer that has not been oxidized
A semiconductor device characterized by being changed continuously or stepwise in a vertical direction of a substrate . Wherein said refractory metal is Ta, Ti, Mo, W, Hf, Nb, Zr,
3. The semiconductor device according to claim 1, wherein the semiconductor device is any one type or a plurality of types. 4. A semiconductor device according to claim 2, wherein a surface protection film on the first non-single-crystal semiconductor layer mainly composed of the silicon is selectively formed.