JP3298174B2 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereofInfo
- Publication number
- JP3298174B2 JP3298174B2 JP24470592A JP24470592A JP3298174B2 JP 3298174 B2 JP3298174 B2 JP 3298174B2 JP 24470592 A JP24470592 A JP 24470592A JP 24470592 A JP24470592 A JP 24470592A JP 3298174 B2 JP3298174 B2 JP 3298174B2
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- film
- polymer resin
- metal
- forming
- pattern
- Prior art date
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Description
【0001】[0001]
【産業上の利用分野】本発明は半導体装置、特に光検知
素子を形成した化合物半導体基板と信号処理素子を形成
した半導体基板を金属バンプで結合したハイブリッド型
の半導体装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a hybrid semiconductor device in which a compound semiconductor substrate on which a light sensing element is formed and a semiconductor substrate on which a signal processing element is formed are connected by metal bumps, and a method of manufacturing the same.
【0002】[0002]
【従来の技術】図4に示すように、従来のハイブリッド
型半導体装置は、例えばp型の水銀・カドミウム・テル
ル(HgCdTe)のような化合物半導体基板1に所定のパタ
ーンにn型の不純物をイオン注入等の方法で導入し、n
型層を形成してフォトダイオードよりなる光検知素子2
を形成する。2. Description of the Related Art As shown in FIG. 4, a conventional hybrid type semiconductor device has a structure in which a compound semiconductor substrate 1 such as p-type mercury-cadmium tellurium (HgCdTe) is formed by ionizing n-type impurities in a predetermined pattern. Introduced by a method such as injection, and n
Photodetector 2 formed of a photodiode by forming a mold layer
To form
【0003】一方、該光検知素子2で得られた信号を処
理する電荷転送素子のような信号処理素子をシリコン
(Si)基板3に形成し、該信号処理素子の入力ダイオー
ド4と、前記した光検知素子2とを、金属バンプ5でバ
ンプ接続してハイブリッド型の半導体装置を形成してい
る。なお、図の6は絶縁膜である。On the other hand, a signal processing element such as a charge transfer element for processing a signal obtained by the light detecting element 2 is formed on a silicon (Si) substrate 3, and an input diode 4 of the signal processing element and the signal processing element described above. A hybrid semiconductor device is formed by bump-connecting the light-detecting element 2 with the metal bump 5. Incidentally, reference numeral 6 in the drawing denotes an insulating film.
【0004】[0004]
【発明が解決しようとする課題】このような半導体装置
は、熱雑音の影響を避けるため、通常、液体窒素温度で
冷却して用いており、非動作時は室温であるので、液体
窒素温度(77°K)の低温より室温の間迄の温度変動に曝
されることになる。In order to avoid the influence of thermal noise, such a semiconductor device is usually cooled at the temperature of liquid nitrogen and used at room temperature when not operating. It will be exposed to temperature fluctuations from temperatures as low as 77 ° K) to room temperature.
【0005】一方、HgCdTeの化合物半導体基板1の熱膨
張率は5×10-6で、Si基板3の熱膨張率は3×10-6であ
り、両者の熱膨張率は異なっているため、上記した半導
体装置が温度変動に曝される間に両者の基板1,3 の温度
変動による膨張、収縮の度合いが異なり、そのため、金
属バンプ5が変形したり、基板1,3 より剥がれたりする
問題が起こり、この変形や、剥離によって金属バンプ5
同士が接触する不都合が生じる。On the other hand, the HgCdTe compound semiconductor substrate 1 has a coefficient of thermal expansion of 5 × 10 −6 , and the Si substrate 3 has a coefficient of thermal expansion of 3 × 10 −6 . While the above-described semiconductor device is exposed to the temperature fluctuation, the degree of expansion and contraction of the two substrates 1 and 3 due to the temperature fluctuation is different, so that the metal bumps 5 are deformed or peeled off from the substrates 1 and 3. This deformation and peeling cause metal bumps 5
The inconvenience of contact between them occurs.
【0006】このように金属バンプ5同士が接触する
と、接触した金属ハンプ5に接続されている画素の画素
信号は互いに重なり合うために、共に欠陥画素となり、
このように温度変動を繰り返すと、欠陥画素が発生し易
い問題がある。When the metal bumps 5 come into contact with each other as described above, the pixel signals of the pixels connected to the metal bumps 5 that have come into contact with each other overlap each other, and therefore both become defective pixels.
When the temperature change is repeated as described above, there is a problem that a defective pixel is easily generated.
【0007】本発明は上記した問題点を解決し、上記し
た温度変動による金属バンプの剥離や、移動等による変
形を防止し、金属バンプ同士が接触しないようにするこ
とで、欠陥画素が発生しないようにした半導体装置の提
供を目的とする。The present invention solves the above-mentioned problems, prevents the metal bumps from being peeled or deformed by movement or the like due to the above-mentioned temperature fluctuation, and prevents the metal bumps from contacting each other, so that defective pixels do not occur. It is an object of the present invention to provide a semiconductor device as described above.
【0008】[0008]
【課題を解決するための手段】本発明の半導体装置およ
びその製造方法は、請求項1に示すように、化合物半導
体基板に形成した光検知素子と半導体基板に形成した信
号処理素子とを金属バンプで接合して成る半導体装置に
於いて、前記金属バンプの周囲を、柱状、或いは板状の
低膨張率の高分子樹脂にて円形、或いは方形の状態に囲
んだことを特徴とする。According to a first aspect of the present invention, there is provided a semiconductor device and a method of manufacturing the same, wherein a light sensing element formed on a compound semiconductor substrate and a signal processing element formed on the semiconductor substrate are formed by metal bumps. Wherein the metal bump is surrounded by a columnar or plate-shaped polymer resin having a low expansion coefficient in a circular or square shape.
【0009】また請求項2に示すように、前記柱状の高
分子樹脂が角柱、或いは円柱状であることを特徴とす
る。また請求項3に示すように、本発明の半導体装置の
製造方法は、光検知素子を形成した化合物半導体基板、
或いは信号処理素子を形成した半導体基板の一方の基板
上に光感光性、或いは光非感光性の高分子樹脂膜を塗布
形成後、該基板上に前記高分子樹脂膜のパターン形成用
レジスト膜を塗布する工程、該高分子樹脂膜のパターン
形成用レジスト膜を所定のパターンに形成後、該レジス
ト膜をマスクとして前記高分子樹脂膜を柱状、或いは板
状の所定のパターンに形成する工程、前記柱状、或いは
板状の所定のパターンに形成された高分子樹脂膜を含む
基板上に、該高分子樹脂膜間に埋設される埋設用レジス
ト膜および金属パターン形成用レジスト膜を積層して形
成する工程、前記金属パターン形成用レジスト膜を所定
のパターンに形成後、該金属パターン形成用レジスト膜
をマスクとして下部の埋設用レジスト膜を所定のパター
ンに形成する工程、該基板上に金属膜を被着形成後、所
定のパターンに形成された埋設用レジスト膜を除去する
ことで、その上の金属パターン形成用レジスト膜と、金
属膜とを除去して、所定の柱状、或いは板状の高分子樹
脂膜パターンと、金属膜パターンを形成する工程を含む
ことを特徴とする。According to a second aspect of the present invention, the columnar polymer resin is a prism or a column. According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the present invention, comprising the steps of:
Alternatively, after forming a photosensitive or non-photosensitive polymer resin film on one of the semiconductor substrates on which the signal processing elements are formed, a resist film for pattern formation of the polymer resin film is formed on the substrate. A step of applying, after forming a resist film for forming a pattern of the polymer resin film in a predetermined pattern, a step of forming the polymer resin film in a columnar or plate-shaped predetermined pattern using the resist film as a mask, A burying resist film and a metal pattern forming resist film buried between the polymer resin films are formed on a substrate including a polymer resin film formed in a columnar or plate-like predetermined pattern. Forming the resist film for forming a metal pattern in a predetermined pattern, and forming a lower buried resist film in a predetermined pattern using the resist film for forming a metal pattern as a mask After depositing and forming a metal film on the substrate, the buried resist film formed in a predetermined pattern is removed, thereby removing the metal pattern formation resist film and the metal film thereover, and removing the metal film. The method is characterized by including a step of forming a columnar or plate-like polymer resin film pattern and a metal film pattern.
【0010】また請求項4に示すように、前記高分子樹
脂膜を、両者の基板に形成された金属バンプ同士を接合
する際のスペーサ膜とすることを特徴とする。According to a fourth aspect of the present invention, the polymer resin film is a spacer film for joining metal bumps formed on both substrates.
【0011】[0011]
【作用】本発明の半導体装置は、素子間を接続する金属
バンプの周囲を円形、或いは方形の状態に、熱膨張率が
5 ×10-6の低い熱膨張率を有し、角柱、或いは円柱の柱
状形、或いは板状のポリイミド樹脂で囲むようにする。According to the semiconductor device of the present invention, the periphery of the metal bump connecting the elements is formed into a circular or square state with a coefficient of thermal expansion.
It has a low coefficient of thermal expansion of 5 × 10 -6 , and is surrounded by a square or cylindrical columnar or plate-like polyimide resin.
【0012】このようにすると、基板同士の熱膨張率の
相違で、仮に金属バンプが変形したり、或いは剥がれた
りした場合でも、金属バンプ同士が接触することが防止
できる。In this way, even if the metal bumps are deformed or peeled off due to the difference in the coefficient of thermal expansion between the substrates, the metal bumps can be prevented from contacting each other.
【0013】またこの高分子樹脂膜は、両者の基板上に
形成された金属バンプ同士を接合する際のスペーサ膜と
なり、金属バンプの接合する位置の高さが、このスペー
サ膜により規定されるようになり、金属バンプの接合す
る間隔が、所定の値に保たれるようになる。The polymer resin film serves as a spacer film when joining the metal bumps formed on both substrates, and the height of the joining position of the metal bumps is defined by the spacer film. , And the interval at which the metal bumps are joined is maintained at a predetermined value.
【0014】[0014]
【実施例】図1(a)は本発明の半導体装置の一実施例を示
す断面図、図1(b)は平面図で、図示するように、p型の
HgCdTeより成る化合物半導体基板1に前記したようにn
型の不純物を導入してpn接合を形成してフォトダイオ
ードよりなる光検知素子2を形成する。一方Si基板3に
電荷転送装置の入力ダイオード4を形成し、両者の素子
2,4 は金属バンプ5にて接合されている。FIG. 1 (a) is a sectional view showing an embodiment of a semiconductor device according to the present invention, and FIG. 1 (b) is a plan view, as shown in FIG.
As described above, the compound semiconductor substrate 1 made of HgCdTe
A light sensing element 2 composed of a photodiode is formed by introducing a type impurity to form a pn junction. On the other hand, the input diode 4 of the charge transfer device is formed on the Si substrate 3 and both elements are formed.
2 and 4 are joined by metal bumps 5.
【0015】そしてこの金属バンプ5の周囲を囲むよう
に円柱状で熱膨張率値が5 ×10-6のポリイミド樹脂より
なる高分子樹脂膜11を設置する。この高分子樹脂膜11
は、図示するように円柱状でも良く、或いは他の実施例
として角柱状であっても良い。A columnar polymer resin film 11 made of polyimide resin having a coefficient of thermal expansion of 5 × 10 −6 is provided so as to surround the metal bump 5. This polymer resin film 11
May be cylindrical as shown, or may be prismatic as another embodiment.
【0016】また他の実施例として、前記した柱状の高
分子樹脂膜11の代わりに、図1(c)の平面図に示すよう
に、板状の高分子樹脂膜11A を用いて金属バンプ5の周
囲を囲むように形成しても良い。As another embodiment, as shown in the plan view of FIG. 1 (c), a metal bump 5 is formed by using a plate-shaped polymer resin film 11A instead of the column-shaped polymer resin film 11 described above. May be formed so as to surround the periphery of.
【0017】また金属バンプ5の周囲を囲む形状は、円
形でも方形でも何れでも良い。このように上記した円柱
状の高分子樹脂膜11を、金属バンプ5に密接して設ける
と、金属バンプ5の変形がこの円柱状の高分子樹脂膜11
によって防止され、隣接する金属バンプ5同士の間で接
触するような事故が防止できる。The shape surrounding the periphery of the metal bump 5 may be circular or rectangular. When the above-described columnar polymer resin film 11 is provided in close contact with the metal bumps 5, the deformation of the metal bumps 5 causes the columnar polymer resin film 11 to deform.
Therefore, an accident such as contact between adjacent metal bumps 5 can be prevented.
【0018】またこの高分子樹脂膜が金属バンプ同士を
圧着接合する際に両者の基板間のスペーサ膜として一定
の間隔を保つようになり、金属バンプの接合する圧力を
所定の値以下に規制することができ、圧着接合する際の
金属バンプの変形を防止する。When this polymer resin film is used to press-bond metal bumps to each other, a constant interval is maintained as a spacer film between the two substrates, and the pressure at which the metal bumps are bonded is regulated to a predetermined value or less. This prevents deformation of the metal bumps during pressure bonding.
【0019】以下、図面を用いて本発明の半導体装置の
製造方法を示す。図2(a)に示すように、化合物半導体基
板1,或いはSi基板3 上に熱膨張率が5 ×10-6で、粘度が
数100 センチポイズのポリイミド樹脂より成る高分子樹
脂膜11を、13μm の厚さにスピナーを用いて回転塗布す
る。Hereinafter, a method of manufacturing a semiconductor device according to the present invention will be described with reference to the drawings. As shown in FIG. 2A, a polymer resin film 11 made of a polyimide resin having a coefficient of thermal expansion of 5 × 10 -6 and a viscosity of several hundred centipoise was formed on the compound semiconductor substrate 1 or the Si substrate 3 by 13 μm. Is spin-coated with a spinner to a thickness of
【0020】次いで図2(b)に示すように、該基板1,3 上
に前記高分子樹脂膜11を所定のパターンに形成するため
のポジ型のパターン形成用レジスト膜( 東京応化社製、
商品名;OFPR)12をスピナーにて3 μm の厚さに回転塗布
する。Next, as shown in FIG. 2B, a positive type pattern forming resist film (Tokyo Ohka Co., Ltd.) for forming the polymer resin film 11 in a predetermined pattern on the substrates 1 and 3 is used.
(Product name: OFPR) 12 is spin-coated with a spinner to a thickness of 3 μm.
【0021】次いで図2(c)に示すように、該ポジ型レジ
スト膜12を紫外線で露光し、アルカリ性現像液を用いて
下部のポリイミド膜よりなる高分子樹脂膜11をも同時に
パターン形成する。Next, as shown in FIG. 2C, the positive resist film 12 is exposed to ultraviolet rays, and a polymer resin film 11 made of a lower polyimide film is simultaneously patterned using an alkaline developer.
【0022】次いで、このポリイミド膜よりなる高分子
樹脂膜11を300 〜400 ℃の温度でベーキングして熱硬化
させる。次いで図2(d)に示すように、ポリイミド膜より
なる高分子樹脂膜11を有する基板1,3 上に、該高分子樹
脂膜11の間を埋設するポジ型の埋設用レジスト膜12A を
塗布する。次いでその上にネガ型レジスト膜で後述する
金属膜を所定のパターンに形成するための金属パターン
形成用レジスト膜13を塗布し、次いで該金属パターン形
成用レジスト膜13をベーキング処理する。Next, the polymer resin film 11 made of the polyimide film is baked at a temperature of 300 to 400 ° C. and thermally cured. Next, as shown in FIG. 2 (d), a positive type burying resist film 12A for burying between the polymer resin films 11 is applied on the substrates 1 and 3 having the polymer resin film 11 made of a polyimide film. I do. Next, a metal pattern forming resist film 13 for forming a metal film to be described later in a predetermined pattern with a negative resist film is applied thereon, and then the metal pattern forming resist film 13 is baked.
【0023】次いで図3(a)に示すように、前記金属パタ
ーン形成用レジスト膜13を所定のパターンに露光、現像
する。次いで図3(b)に示すように、前記パターン形成し
た金属パターン形成用レジスト膜13をマスクとして、下
地のポジ型の埋設用レジスト膜12A を露光現像して除去
する。そして高分子樹脂膜11の周囲を未露光のポジ型の
埋設用レジスト膜12Aが囲むようになる。Next, as shown in FIG. 3A, the metal pattern forming resist film 13 is exposed and developed in a predetermined pattern. Next, as shown in FIG. 3 (b), using the patterned metal pattern forming resist film 13 as a mask, the underlying positive-type buried resist film 12A is exposed and developed to be removed. Then, the periphery of the polymer resin film 11 is surrounded by the unexposed positive type burying resist film 12A.
【0024】次いで図3(c)に示すように、該基板1,3 上
にインジウム膜よりなる金属膜14を蒸着により9μm の
厚さに被着形成する。次いでポジ型の埋設用レジスト膜
12A の除去液で、該レジスト膜12A を除去すると、その
上のネガ型の金属パターン形成用レジスト膜13とInの金
属膜14がリフトオフ法により除去され、図3(d)に示すよ
うに、高分子樹脂膜11で囲まれた所定パターンのInの金
属膜14が形成され、これが前記したInの金属バンプとな
る。Next, as shown in FIG. 3C, a metal film 14 made of an indium film is formed on the substrates 1 and 3 by vapor deposition to a thickness of 9 μm. Next, a positive type buried resist film
When the resist film 12A is removed with a removing solution of 12A, the negative type metal pattern forming resist film 13 and the In metal film 14 thereon are removed by a lift-off method, and as shown in FIG. An In metal film 14 having a predetermined pattern surrounded by the polymer resin film 11 is formed, and serves as the In metal bump described above.
【0025】なお、本実施例では金属バンプを囲む高分
子樹脂膜11を円柱状としたが、角柱状であっても良い。
また、この他に板状の高分子樹脂膜11にて金属バンプを
囲むような構造を採っても良い。In the present embodiment, the polymer resin film 11 surrounding the metal bumps has a columnar shape, but may have a prismatic shape.
In addition, a structure in which the metal bumps are surrounded by the plate-shaped polymer resin film 11 may be adopted.
【0026】また、この高分子樹脂膜11は本実施例に於
けるように感光性のポリイミド樹脂膜を用いる代わり
に、非感光性の高分子樹脂膜( 日立化成工業社製、商品
名:PIX、PIQ ) 等を用いて形成しても良い。Further, instead of using a photosensitive polyimide resin film as in this embodiment, this polymer resin film 11 is replaced with a non-photosensitive polymer resin film (manufactured by Hitachi Chemical Co., Ltd., trade name: PIX , PIQ) and the like.
【0027】[0027]
【発明の効果】以上述べたように、本発明の半導体装置
およびその製造方法によると、金属バンプの周囲が高分
子樹脂膜で囲まれているので、金属バンプの移動、剥離
等の変形が避けられ、金属バンプ同士が接触する事故が
無くなるので、画像が重なるような事故が防止できる。As described above, according to the semiconductor device and the method of manufacturing the same of the present invention, since the periphery of the metal bump is surrounded by the polymer resin film, deformation such as movement and peeling of the metal bump is avoided. In addition, since an accident in which the metal bumps come into contact with each other is eliminated, an accident in which images overlap with each other can be prevented.
【0028】また高分子樹脂膜の高さを、基板上に形成
された金属バンプの高さより高く形成すると、両方の素
子間の結合間隔を所定の高さに規制できるスペーサ膜と
しても使用可能となり、金属バンプ接合が確実に容易に
行い得るようになる。When the height of the polymer resin film is higher than the height of the metal bumps formed on the substrate, the polymer resin film can be used as a spacer film capable of restricting the coupling interval between both elements to a predetermined height. Thus, the metal bump bonding can be easily and reliably performed.
【図1】 本発明の半導体装置の断面図と平面図であ
る。FIG. 1 is a cross-sectional view and a plan view of a semiconductor device of the present invention.
【図2】 本発明の半導体装置の製造方法の工程を示す
断面図である。FIG. 2 is a cross-sectional view illustrating steps of a method for manufacturing a semiconductor device according to the present invention.
【図3】 本発明の半導体装置の製造方法の工程を示す
断面図である。FIG. 3 is a cross-sectional view illustrating a step of a method for manufacturing a semiconductor device according to the present invention.
【図4】 従来の半導体装置の断面図である。FIG. 4 is a cross-sectional view of a conventional semiconductor device.
1 化合物半導体基板 2 光検知素子 3 Si基板 4 入力ダイオード 5 金属バンプ 11 高分子樹脂膜 11A 板状の高分子樹脂膜 12 パターン形成用レジスト膜(ポジ型レジスト膜) 12A 埋設用レジスト膜(ポジ型レジスト膜) 13 金属パターン形成用レジスト膜(ネガ型レジスト
膜) 14 金属膜(In膜)1 Compound semiconductor substrate 2 Photodetector 3 Si substrate 4 Input diode 5 Metal bump 11 Polymer resin film 11A Plate-shaped polymer resin film 12 Resist film for pattern formation (positive resist film) 12A Resist film for burying (positive type) Resist film) 13 Resist film for metal pattern formation (negative resist film) 14 Metal film (In film)
フロントページの続き (72)発明者 成田 正彦 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 (56)参考文献 特開 昭63−268271(JP,A) 特開 平5−13667(JP,A) 特開 平5−315578(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 H01L 27/146 Continuation of the front page (72) Inventor Masahiko Narita 1015 Uedanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-63-268271 (JP, A) JP-A-5-13667 (JP, A) JP-A-5-315578 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/60 H01L 27/146
Claims (4)
素子(2) と半導体基板(3) に形成した信号処理素子(4)
とを金属バンプ(5) で接合して成る半導体装置に於い
て、 前記金属バンプ(5) の周囲を、柱状、或いは板状の低膨
張率の高分子樹脂膜(11)にて円形、或いは方形の状態に
囲んだことを特徴とする半導体装置。A photodetector (2) formed on a compound semiconductor substrate (1) and a signal processing element (4) formed on a semiconductor substrate (3).
Are bonded by a metal bump (5), and the periphery of the metal bump (5) is circular or columnar or plate-shaped with a low expansion coefficient polymer resin film (11). A semiconductor device, wherein the semiconductor device is enclosed in a square shape.
が角柱、或いは円柱状であることを特徴とする半導体装
置。2. The columnar polymer resin film according to claim 1, wherein
Is a prismatic or cylindrical shape.
基板(1) 、或いは信号処理素子(4) を形成した半導体基
板(3) の一方の基板(1,3) 上に光感光性、或いは光非感
光性の高分子樹脂膜(11)を塗布形成後、該基板上に前記
高分子樹脂膜(11)のパターン形成用レジスト膜(12)を塗
布する工程、 該高分子樹脂膜のパターン形成用レジスト膜(12)を所定
のパターンに形成後、該レジスト膜(12)をマスクとして
前記高分子樹脂膜(11)を柱状、或いは板状の所定のパタ
ーンに形成する工程、 前記柱状、或いは板状の所定のパターンに形成された高
分子樹脂膜(11)を含む基板(1,3) 上に、該高分子樹脂膜
(11)間に埋設される埋設用レジスト膜(12A) および金属
パターン形成用レジスト膜(13)を積層して形成する工
程、 前記金属パターン形成用レジスト膜(13)を所定のパター
ンに形成後、該金属パターン形成用レジスト膜(13)をマ
スクとして下部の埋設用レジスト膜(12A) を所定のパタ
ーンに形成する工程、 該基板(1,3) 上に金属膜(14)を被着形成後、所定のパタ
ーンに形成された埋設用レジスト膜(12A) を除去するこ
とで、その上の金属パターン形成用レジスト膜(13)と、
金属膜(14)とを除去して、所定の柱状、或いは板状の高
分子樹脂膜(11)パターンと、金属膜(14)パターンを形成
する工程を含むことを特徴とする半導体装置の製造方
法。3. A photo-sensitive layer on one of the compound semiconductor substrate (1) on which the photodetector (2) is formed or the semiconductor substrate (3) on which the signal processing element (4) is formed. Or a step of applying a resist film (12) for pattern formation of the polymer resin film (11) on the substrate after coating and forming a photo-insensitive polymer resin film (11); After forming the pattern-forming resist film (12) in a predetermined pattern, forming the polymer resin film (11) in a columnar or plate-like predetermined pattern using the resist film (12) as a mask, On a substrate (1,3) including a polymer resin film (11) formed in a columnar or plate-like predetermined pattern, the polymer resin film is formed.
(11) a step of laminating and forming a burying resist film (12A) and a metal pattern forming resist film (13) buried in between, after forming the metal pattern forming resist film (13) into a predetermined pattern; Forming a lower buried resist film (12A) into a predetermined pattern by using the metal pattern forming resist film (13) as a mask, and forming a metal film (14) on the substrate (1, 3) by deposition. Thereafter, by removing the buried resist film (12A) formed in a predetermined pattern, a metal pattern forming resist film (13) thereon,
Removing the metal film (14) to form a predetermined columnar or plate-shaped polymer resin film (11) pattern and a metal film (14) pattern. Method.
を、両者の基板(1,3)に形成された金属バンプ(5) 同士
を接合する際のスペーサ膜とすることを特徴とする半導
体装置の製造方法。4. The polymer resin film according to claim 1, wherein
A metal film (5) formed on both substrates (1, 3) as a spacer film for joining together.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24470592A JP3298174B2 (en) | 1992-09-14 | 1992-09-14 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24470592A JP3298174B2 (en) | 1992-09-14 | 1992-09-14 | Semiconductor device and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0697173A JPH0697173A (en) | 1994-04-08 |
| JP3298174B2 true JP3298174B2 (en) | 2002-07-02 |
Family
ID=17122703
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24470592A Expired - Fee Related JP3298174B2 (en) | 1992-09-14 | 1992-09-14 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3298174B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080181558A1 (en) * | 2007-01-31 | 2008-07-31 | Hartwell Peter G | Electronic and optical circuit integration through wafer bonding |
| JP5703730B2 (en) * | 2010-12-13 | 2015-04-22 | 富士通株式会社 | Infrared imaging device |
| WO2022239711A1 (en) * | 2021-05-10 | 2022-11-17 | 株式会社村田製作所 | Semiconductor device and module |
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1992
- 1992-09-14 JP JP24470592A patent/JP3298174B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0697173A (en) | 1994-04-08 |
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