JP3315567B2 - Remote control receiving circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving circuit of a remote control device widely used in televisions, VTRs, and the like, and more particularly, to a CMOS integrated circuit for the receiving circuit of the remote control device.
The present invention relates to low power supply voltage operation.

[0002]

2. Description of the Related Art In a conventional remote control receiving circuit (for example, Japanese Patent Application Laid-Open No. 3-113924), a bias voltage lower than a power supply voltage is created, a resistor and a photodiode are connected in series with the bias voltage, and one end of the resistor is connected. Is connected to the non-inverting input terminal of the operational amplifier.
When the DC current flowing through the photodiode is 0, that is, when there is no infrared light input, the bias voltage is applied to the non-inverting input terminal of the operational amplifier, and both the inverting input terminal and the output terminal of the operational amplifier have the potential of the bias voltage. become. In the prior art, in order to set the operational amplifier in a normal operating range, the inverting and non-inverting input terminals of the operational amplifier and 1.
Since a voltage of 2 V or more is required, the bias voltage also requires 1.2 V or more.

[0003]

In order to generate the bias voltage, the power supply voltage needs to be higher than the bias voltage. When trying to lower the operating power supply voltage, the bias voltage is a constraint on the minimum operating voltage. SUMMARY OF THE INVENTION An object of the present invention is to provide a remote control receiving circuit that operates at a lower power supply voltage by removing the restriction on the bias voltage.

[0004]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides an internal circuit of an operational amplifier in which the size of transistors of a pair of input differential stages is not equal, The transistors of the load circuit forming the pair are unequal in size, and a constant voltage is applied to the output terminal even if both the non-inverting input terminal and the inverting input terminal are at 0 V (ground potential).

According to the present invention, in the internal circuit of the operational amplifier used, the relative size ratio between the two MOS transistors constituting the input differential stage can be reduced by reducing the size of the transistor having the gate electrode as the non-inverting input terminal. The size of a transistor having a gate electrode as an inverting input terminal is set to be large. Further, the relative size ratio of the two MOS transistors in the load stage corresponding to the input differential stage is determined by reducing the size of the transistor serving as the load of the transistor having the inverting input terminal and reducing the size of the transistor serving as the load of the transistor having the non-inverting input terminal. Was set to be large. A so-called offset voltage is generated by the size ratio. When the current flowing through the photodiode is 0 V, even if the voltage at the input terminal of the operational amplifier becomes 0 V, a constant offset voltage is generated at the output terminal of the operational amplifier, and the output transistor of the operational amplifier operates in the operating range. to go into. Since no bias circuit is required to bring the operational amplifier into the operating range, the operating power supply voltage can be reduced.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of a remote control receiving circuit according to the present invention. In FIG. 1, a remote control receiving integrated circuit (hereinafter referred to as an IC) 2 includes an external photoelectric conversion element 5 for converting light intensity into current intensity.
And a load resistor 8 for converting the strength of the current into the strength of a voltage;
It comprises a preamplifier 1 for amplifying a voltage generated at both ends of the load resistor 8 and a signal processing circuit 3 which receives an output A of the preamplifier 1 as an input and includes a limiter, a filter, a detection circuit and the like. I have. Further, the power supply 4 is connected to a power supply terminal 6 of the remote control receiving IC 2 and one end of the photoelectric conversion element 5. The photoelectric conversion element 5 is connected to one end of a load resistor 8 inside the IC 2 through an input terminal 7 of the IC 2.

The general operation of FIG. 1 will be described. The optical signal converted into a current by the photoelectric conversion element 5 is converted into a voltage by the load resistor 8, input to the input terminal P of the preamplifier 1, and amplified. The amplified signal is input to the signal processing circuit 3 through the output terminal A of the preamplifier 1. The output of the signal processing circuit 3 is output from the output terminal 11 of the IC 2 as a binary value of High or Low. The preamplifier 1 used in FIG. 1 is a so-called operational amplifier 1 that can be represented by three terminals of a non-inverting input terminal (positive input terminal) P, an inverting input terminal (negative input terminal) M, and an output terminal A. It is. One end is connected to the output terminal A of the operational amplifier 1, the other end is connected to the resistor 17 connected to the inverting input terminal M of the operational amplifier 1, one end is connected to the inverting input terminal M, and the other end is connected to one end of the capacitor 10. And the capacitor 1 whose other end is connected to the ground potential.
0 constitutes a so-called resistance feedback amplifier circuit. When the resistance feedback amplifier circuit sees the output terminal A from the non-inverting input terminal P, the DC gain (gain) is 1, and the AC gain is such that the resistance value of the resistor 17 is R17 and the resistance value of the resistor 18 is R17.
Assuming that R18 << R17, almost R17 /
It becomes R18.

Next, the internal configuration of the operational amplifier 1 will be described. P-channel MOS transistor (hereinafter PMO
S) The source electrode of 13 is commonly connected to the source electrode of the PMOS 14, and further commonly connected to the other end of the current source 22 having one end connected to a power supply to form a so-called differential input stage. The drain electrode of the PMOS 13 is an N-channel M
The drain electrode of the OS transistor (hereinafter referred to as NMOS) 15 and the gate electrode of the NMOS 19 are commonly connected.
The drain electrode of the OS 14 is connected to the drain electrode of the NMOS 16 and the gate electrode of the NMOS 16,
5 and the NMOS 16 constitute a so-called load circuit. N
The drain electrode of the MOS 19 is connected to the other end of the load element 21 whose one end is connected to a power supply to form a so-called output stage.

The operation of the operational amplifier 1 will be described below with reference to FIG. FIG. 2 shows the intensity of incident light and the potential at point A. The solid line shows the characteristics of the remote control receiving circuit according to the present invention, and the dotted line shows the case where the operational amplifier 1 having a small offset voltage is used.
In the case of DC light input, the voltage generated at point P is proportional to the intensity of the incident light. On the other hand, at the output terminal A of the operational amplifier 1, a constant output Voff is obtained even if the intensity of the incident light is zero. As the intensity of the incident light increases, the potential at the point A increases in proportion to the incident light, starting from Voff. Even when the input terminal P is DC 0, a Voff voltage is generated at the output terminal A. Therefore, if a minute AC input is simultaneously superimposed and input, the output terminal A has an AC gain. A double amplified AC signal appears. That is, an AC signal can be amplified when there is no background light, without setting an operating point by another power supply such as a bias power supply.

As shown by the solid line in FIG. 3, if the intensity of the DC incident light is displayed on the horizontal axis and the AC gain (gain) is displayed on the vertical axis, the remote control receiving circuit according to the present invention can reduce the intensity of the incident light. Regardless, a constant AC gain is obtained. The dotted line in FIG. 3 indicates that the PMOS transistors 13 and 14 have the same size and the NMOS transistors 15 and 14 have the same size as the MOS transistor in the operational amplifier 1 shown in FIG.
16 shows the relationship between the incident light and the AC gain for the same size of 16 and 16. If the sizes of the transistors are the same, only a small amount of so-called offset generated in the operational amplifier 1 is generated at random in the positive and negative directions due to manufacturing variations. When there is no incident light intensity, the voltage of the output A becomes almost zero as shown by the dotted line in FIG. 2 and becomes in the inoperable range of the transistor, so that the AC gain is extremely reduced as shown by the dotted line in FIG.

Next, a method of generating this Voff will be described. When the gate length of a MOS transistor is L and the gate width is W, the transistor size is generally expressed by W / L. The expression “transistor size” uses this definition. Generally, an operational amplifier 1 composed of a CMOS includes a PMOS transistor 13 constituting a differential input stage.
And 14 have the same size, and the NMO
The sizes of the S transistors 15 and 16 are also set equal.

In the present invention, the size of the PMOS transistor 13 is smaller than that of the PMOS
The size of the S transistor 16 is changed to the NMOS transistor 1
It is smaller than 5. Specifically, the gain coefficient of the PMOS transistor 13 is β,
Is the size of b times so that the gain coefficient becomes b × β.
Assuming that the ratio of the size of the transistors NMOS 15 and 16 in the load stage is a: 1, Voff is the difference between the gate-source voltages of the PMOS transistors 13 and 14, so that a well-known MOS current equation is used. PMOS
The threshold voltages of the transistors 13 and 14 are Vth, PMOS
The gate-source voltage of the transistor 13 is Vgs1
3. Assuming that the gate-source voltage of the PMOS transistor 14 is Vgs14, the drain current Id1 of the PMOS transistor 13 and the drain current Id2 of the PMOS transistor 14 are

[0013]

(Equation 1)

[0014]

(Equation 2)

The NMOS transistors 15 and 16 form a so-called current mirror, and the flowing current ratio becomes equal to the transistor size ratio.

[0016]

(Equation 3)

Therefore, Voff is Vgs13−Vg
Since it is s14, from equations 1, 2, and 3,

[0018]

(Equation 4)

By substituting representative numerical values that can be easily realized into Equation 4, Id1 = 50 μA, β = 1 mA / v ·
Assuming that v, a = 1.7 and b = 1.7, Voff ≒ 13
It is 0 mV and can be easily realized.

[0020]

In the remote control receiving circuit according to the present invention, an offset is intentionally generated by asymmetrically changing the transistor size of the operational amplifier used in the first stage. That is, even if the input voltage is 0, a constant DC voltage Voff is obtained at the output. In addition, PMO
Since the S transistor is used, the input DC voltage is 0V
But it allows AC input and output. That is, even if the input becomes 0 V when there is no background light, an AC gain can be obtained, so that a bias circuit for setting an operating point is not required, and the device can be operated with a low power supply voltage.

The transistor of the operational amplifier is a MOS transistor.
Since it is composed of transistors, a CMOS integrated circuit can be formed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a graph showing DC characteristics of a first stage of a remote control receiving circuit according to the present invention.

FIG. 3 is a graph showing AC characteristics of a first stage of a remote control receiving circuit according to the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 operational amplifier 2 remote control reception circuit 3 signal processing circuit 4 power supply 5 light receiving element 6 power supply terminal of remote control reception circuit 7 input terminal of remote control reception circuit 8 load resistance 10, 20 capacity 11 output terminal of remote control reception circuit 13, 14 P-channel MOS transistor 15, 16, 19 N-channel MOS transistor 17, 18 Resistance 21 Load element 22 Constant current source

Continued on the front page (51) Int.Cl. ⁷ Identification code FI H04B 10/28

Claims (1)

(57) [Claims] A photoelectric conversion element for converting light intensity to current intensity, a first resistor for converting current intensity to voltage intensity, and an amplifier circuit for amplifying the voltage intensity as an input; And a circuit for processing a signal output from the amplifier circuit.
An operational amplifier having a non-inverting input terminal as an input, a second resistor disposed between the inverting input terminal and the output terminal of the operational amplifier, and a series resistor disposed between the inverting input terminal of the operational amplifier and a ground potential; The operational amplifier circuit includes a power supply at one end, and a source electrode of the first P-channel MOS transistor and a source at the other end connected to the source of the second P-channel MOS transistor. A current source commonly connected to the electrodes and a gate electrode having a non-inverting input terminal and a drain electrode commonly connected to the drain electrode of the first N-channel MOS transistor and the gate electrode of the third N-channel MOS transistor. The first P
A channel MOS transistor, a gate electrode of which is an inverting input terminal, and a drain electrode of which is a gate electrode and a drain electrode of the second N-channel MOS transistor;
The second P-channel MOS transistor commonly connected to the gate electrode of the channel MOS transistor;
The remaining source electrode is the first N-channel MOS transistor connected to ground potential, and the remaining source electrode is the second N-channel MOS transistor connected to ground potential.
An S transistor, a load resistance element having one end connected to a power supply, the other end commonly connected to an output terminal and a drain electrode of the third N-channel MOS transistor, and a third source electrode connected to a ground potential. N channel M
An OS transistor, and the ratio of the gain coefficient of each of the transistors is equal to the first P-channel MOS.
The gain coefficient of the transistor is the second P-channel MO
A remote control receiving circuit, wherein the gain coefficient is smaller than the gain coefficient of the S transistor and the gain coefficient of the second N-channel MOS transistor is smaller than the gain coefficient of the first N-channel MOS transistor.