JP3318678B2 - Television receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver , and more particularly to a television having a data switching circuit.
Related to a receiver .

[0002]

2. Description of the Related Art FIG. 5 shows an example of the configuration of a television receiver. The television signal received by the tuner 1 via the antenna is amplified by the video intermediate frequency amplifier 2, and then the Y / C separation circuit 3 and the synchronization separation circuit 10
To enter. The Y (luminance) signal and the C (color difference) signal output from the Y / C separation circuit 3 are converted into R (red), G (green), and B (blue) signals by the RGB amplifier 4 and amplified. It is supplied to CRT5.

[0003] A synchronization separation circuit 10 separates a vertical synchronization signal and a horizontal synchronization signal from a television signal and supplies them to a vertical deflection circuit 11 and a horizontal deflection circuit 12, respectively. The microcomputer 6 sends, via a data bus, vertical amplitude data indicating the vertical amplitude of the CRT 5 (ie, the vertical deflection) and horizontal amplitude data indicating the horizontal amplitude of the CRT 5 (ie, the horizontal deflection) via the data bus. , Respectively, the vertical deflection circuit 11 and the horizontal deflection circuit 1
Feed to 2. Vertical deflection circuit 11 and horizontal deflection circuit 1
2 generates a vertical deflection current and a horizontal deflection current of the CRT 5 and supplies them to the deflection coil DY of the CRT 5. In FIG. 5, a portion surrounded by a broken line is a portion for controlling the vertical amplitude and the horizontal amplitude of the beam of the CRT 5.

FIG. 6 shows an example of a conventional data switching circuit used in the television receiver of FIG. This data switching circuit switches between vertical amplitude data and horizontal amplitude data. The bus interface 20 includes a vertical amplitude data, a horizontal amplitude data, an address data, and a control signal (including a timing signal) serially transmitted from the microcomputer 6 via the data and address buses SDA and the control bus SCL. ), A predetermined number of bits (for example, 8 bits) of vertical amplitude data are transferred to the A register 21, and a predetermined number of bits (for example, 8 bits) of horizontal amplitude data are transferred to the B register 22.

[0005] The vertical amplitude data stored in the A register 21 is converted into an analog signal by a D / A converter 31 and supplied to a vertical amplitude control circuit 11C. The vertical amplitude control circuit 11C is a part of the vertical deflection circuit 11 shown in FIG. The horizontal amplitude data stored in the B register 22 is converted into an analog signal by the D / A converter 32 and supplied to the horizontal amplitude control circuit 12C. The horizontal amplitude control circuit 12C corresponds to the horizontal deflection circuit 1 shown in FIG.
Part 2

In the television receiver of FIG. 5, for example, when the mode is switched from the video signal mode to the RGB mode, or conversely, when the mode is switched from the RGB mode to the video signal mode, the overscan amounts of the two modes are different. Then, the micro computer 6 serially transfers the vertical amplitude data and the horizontal amplitude data corresponding to the mode after the switching to the bus interface 20 of FIG. 6, and the bus interface 20 uses these data for the A register 21 and the B register. 22 is rewritten.

[0007]

In the conventional data switching circuit shown in FIG. 6, when the mode is switched between the video signal mode and the RGB mode, the microcomputer 6 transmits the vertical amplitude data and the horizontal amplitude data to the bus interface 20. High-speed transfer to
The bus interface 20 also transmits the vertical amplitude data and the horizontal amplitude data at high speed to the A register 21 and the B register 2.
If the data is not rewritten by transferring the data to No. 2, the vertical amplitude and the horizontal amplitude do not change at the same time but change in two steps.

Further, data transfer from the microcomputer 6 to the bus interface 20 and A register 21 and B register 22 from the bus interface 20 are performed.
If the data cannot be transferred at high speed, the screen must be darkened before transferring the data, and then the screen must be brightened so that the two-step change in vertical and horizontal amplitudes cannot be seen. Did not.

The present invention has been made in view of such circumstances, and has as its first object to eliminate the need for high-speed data transfer in order to switch a plurality of data at high speed.

A second object of the present invention is to eliminate special processing such as darkening a screen during a data switching period.

[0011]

A television according to claim 1.
A plurality of John receivers are provided for vertical amplitude data.
Vertical amplitude data storage means and horizontal amplitude data
A plurality of horizontal amplitude data storage means,
One switching means provided for width data
Therefore, a plurality of vertical
A switch for switching and outputting the output signal of the amplitude data storage means.
For switching between vertical amplitude data and horizontal amplitude data
And one switching means,
Multiple horizontal amplitude data records provided for width data
Horizontal amplitude data to output by switching the output signal of the storage means
Switching means, vertical amplitude data and horizontal amplitude data
Vertical amplitude data storage used after switching each of
Means or horizontal amplitude data storage means
After that, vertical amplitude data switching means and horizontal amplitude data
Control means for simultaneously switching the switching means .

[0012] According to a second aspect of the invention, there is provided a television receiver.
Multiple vertical amplitude data sets are provided for vertical amplitude data.
Data registers and horizontal amplitude data.
The horizontal amplitude data register and the vertical amplitude data
A single switching means provided with vertical amplitude data;
Data registers provided for each data
Amplitude that switches and outputs the digital output signal of the
Data switching means, one for horizontal amplitude data
Switching means, provided with horizontal amplitude data.
Horizontal amplitude data registers provided for
The horizontal amplitude data that switches and outputs the digital output signal of
Data switching means, vertical amplitude data and horizontal amplitude data.
Vertical amplitude data to be used after switching each of the data
Register or horizontal amplitude data register in advance.
After that, the vertical amplitude data switching means and horizontal amplitude data
Control means for simultaneously switching the data switching means .

According to a third aspect of the invention, there is provided a television receiver,
Multiple vertical amplitude data sets are provided for vertical amplitude data.
Data registers and horizontal amplitude data.
Horizontal and vertical amplitude data registers
A D / A converter provided for
Digital signal output from the quadrature data register
Vertical amplitude data D / A converter to convert to analog signal
And one for the horizontal amplitude data register.
D / A converter, horizontal amplitude data register
Converts digital signals output from analog to analog signals
Horizontal amplitude data D / A converter and vertical amplitude data
Switching means provided for the
Multiple vertical amplitude data provided for amplitude data
Switch the analog output signal of D / A converter and output
Vertical amplitude data switching means and horizontal amplitude data
Switching means provided for each of the
Multiple horizontal amplitude data provided for horizontal amplitude data
Switch the analog output signal of the data D / A converter
Output horizontal amplitude data switching means and vertical amplitude
Use after switching between data and horizontal amplitude data
Vertical or horizontal amplitude data register
The vertical amplitude data switching
Means and horizontal amplitude data switching means at the same time
And control means .

[0014]

[0015]

[0016]

[0017]

In the television receiver having the structure of the first aspect, the vertical amplitude data storage means or the horizontal amplitude data storage means used after switching the vertical amplitude data and the horizontal amplitude data respectively.
After being stored in advance in the width data storage means , the vertical amplitude data
The switching means and the horizontal amplitude data switching means are simultaneously switched. Therefore, the data signals after switching can be obtained simultaneously from the outputs of the plurality of switching means.

In the television receiver according to the second aspect, each of the vertical amplitude data and the horizontal amplitude data is used for a vertical amplitude data register or a water register used after switching.
After being stored in advance in the flat amplitude data register , the vertical amplitude data
Data switching means and horizontal amplitude data switching means
The stages are switched simultaneously. Therefore, the data signals after switching can be obtained simultaneously from the outputs of the plurality of switching means.

According to a third aspect of the present invention, in the television receiver , the vertical amplitude data and the horizontal amplitude data are respectively used after switching between the vertical amplitude data register and the vertical amplitude data register.
After being pre-stored in a flat amplitude data registers, a plurality of vertical
Vertical switching the output of the D / A converter
Amplitude data switching means and multiple horizontal amplitude data
Horizontal amplitude data for switching D / A converter output
The switching means are switched simultaneously. Therefore, an analog signal corresponding to the data after switching can be simultaneously obtained from the outputs of the plurality of switching means.

[0020]

[0021]

[0022]

[0023]

FIG. 1 shows the configuration of an embodiment of a data switching circuit according to the present invention. This embodiment is an example in which the contents of vertical amplitude data and horizontal amplitude data used in the television receiver of FIG. 5 are switched. FIG.
Medium and vertical amplitude control circuit 11C, horizontal amplitude control circuit 12
The C and D / A converters 31 and 32 are the same as the conventional example shown in FIG.

On the input side of the D / A converter 31, there are provided an A0 register 21A0 for storing the vertical amplitude data for the video signal mode, and an A1 register 21A1 for storing the vertical amplitude data for the RGB mode. And the digital output signals of 21A1 are switched by a switch 41 and the D / A converter 3
It is configured to be supplied to one input.

On the input side of the D / A converter 32, there are provided a B0 register 22B0 for storing the horizontal amplitude data for the video signal mode and a B1 register 22B1 for storing the horizontal amplitude data for the RGB mode. And the digital output signals of 22B1 are switched by the switch 42 and the D / A converter 3
2 is supplied to the second input.

When the output signal from the register selection register 50 indicates the video signal mode, the switch 41
0 register 21A0 output terminal and D / A converter 31
When the output signal of the register selection register 50 indicates the RGB mode, the output terminal of the A1 register 21A1 and the input terminal of the D / A converter 31 are connected.

When the output signal of the register selection register 50 indicates the video signal mode, the switch 42
0 register 22B0 output terminal and D / A converter 32
When the output signal of the register selection register 50 indicates the RGB mode, the output terminal of the B1 register 22B1 and the input terminal of the D / A converter 32 are connected.

The bus interface 20C includes a data bus SDA (data from the microcomputer 6 in FIG. 5
), Video signal mode vertical amplitude data transmitted serially via SCL (clock) ,
Vertical amplitude data for RGB mode, horizontal amplitude data for video signal mode, horizontal amplitude data for RGB mode, and address data indicating storage locations of these data;
In response to a control signal indicating the video signal mode or the RGB mode, a predetermined number of bits (for example, 8 bits) of vertical amplitude data for video signal mode is transferred to the A0 register 21A0, and a predetermined number of bits (for example, (8 bits) RGB mode vertical amplitude data, a predetermined number of bits (for example, 8 bits) of video signal mode horizontal amplitude data to the B0 register 22B0, and a predetermined number of bits (for example, 8 bits) to the B1 register 22B1. ), And the video signal mode or the RGB mode is set in the register selection register 50.

In the embodiment of FIG. 1 configured as described above, when the bus interface 20C sets the register selection register 50 to the video signal mode, the output of the register 50 switches the switch 41 to the A0 register 21.
At the same time that the output terminal of A0 and the input terminal of the D / A converter 31 are connected, the switch 42 connects the output terminal of the B0 register 22B0 and the input terminal of the D / A converter 32. As a result, the A0 register 21A0
Supplies the digital signal of the vertical amplitude data for the video signal mode to the D / A converter 31 at the same time
A digital signal of the video signal mode horizontal amplitude data is supplied to the D / A converter 32 from the register 22B0.

When the bus interface 20C sets the RGB mode in the register selecting register 50, the output of the register 50 causes the switch 41 to connect the output terminal of the A1 register 21A1 and the input terminal of the D / A converter 31. And at the same time, switch 42
Output terminal of one register 22B1 and D / A converter 32
Connected to the input terminal. As a result, a digital signal of RGB mode vertical amplitude data is supplied from the A1 register 21A1 to the D / A converter 31, and a digital signal of RGB mode horizontal amplitude data is supplied from the B1 register 22B1 to the D / A converter 32. Is done.

As described above, the vertical amplitude data and the horizontal amplitude data are simultaneously switched. Therefore, when the mode is switched, it is not necessary to transfer the vertical amplitude data and the horizontal amplitude data from the microcomputer 6 to the bus interface 20 at high speed to rewrite the register data. Therefore, the load on the software of the microcomputer 6 is reduced. Further, when the data transfer cannot be performed at high speed as in the related art, the data is transferred after the screen is darkened, and then the screen is brightened so that the two-stage change of the vertical amplitude and the horizontal amplitude cannot be seen. You don't have to.

FIG. 2 shows another embodiment of the data switching circuit of the present invention. In this embodiment, the A0 register 21A
0, A1 register 21A1, B0 register 22B0, B
D / A converters 31A0, 31A1, 32B0 and 32B1 are provided on the output side of one register 22B1, respectively. The analog signals output from the D / A converters 31A0 and 31A1 are switched by a switch 41C, and the D / A converters 32B0 and 32B1 are switched. The difference from the embodiment of FIG. 1 is that the analog signal output from the switch is switched by the switch 42C. When the bus interface 20C sets the video signal mode in the D / A selection register 50C, the switch 41C sets the D / A converter 3
1A0 is connected to the input terminal of the vertical amplitude control circuit 11C, and the switch 42C is connected to the D / A
Output Terminal of Converter 32B0 and Horizontal Amplitude Control Circuit 12
The input terminal of C is connected. When the bus interface 20C sets the RGB mode in the D / A selection register 50C, the switch 41C sets the D / A converter 31
The output terminal of A1 is connected to the input terminal of the vertical amplitude control circuit 11C, and the switch 42C is connected to the output terminal of the D / A converter 32B1 and the horizontal amplitude control circuit 12C.
Connected to the input terminal.

In the embodiment of FIG. 2, the switch 41C
And 42C switch an analog signal instead of a digital signal, so that the number of signals to be switched can be reduced.

FIG. 3 shows another embodiment of the data switching circuit of the present invention. A register 21, B register 22, D
/ A converters 31 and 32, and vertical amplitude control circuit 11C and horizontal amplitude control circuit 12C are the same as those in the conventional example of FIG.

The output terminal of the D / A converter 31 is connected via a switch 41E to the input terminal of the vertical amplitude control circuit 11C. The output side of the switch 41E, that is, the input terminal of the vertical amplitude control circuit 11C is grounded via the voltage holding capacitor 61. While the switch 41E is connected to the output terminal of the D / A converter 31, the voltage holding capacitor 61 is charged by the analog voltage indicating the vertical amplitude output from the D / A converter 31. The output terminal of the D / A converter 32 is connected to the input terminal of the horizontal amplitude control circuit 12C via the switch 42E. The output side of the switch 42E, that is, the input terminal of the horizontal amplitude control circuit 12C is grounded via the voltage holding capacitor 62. While the switch 42E is connected to the output terminal of the D / A converter 32, the voltage holding capacitor 62 is charged by the analog voltage indicating the vertical amplitude output from the D / A converter 32.

The bus interface 20C is used for controlling the control signal sent from the microcomputer 6 of FIG. 5 via the data buses SDA and SCL during the period of switching from the video signal mode to the RGB mode or from the RGB mode to the video signal mode. , Ie, the data switching period, the data holding register 50E
To output a data retention command "1". Accordingly, the switch 41E disconnects the vertical amplitude control circuit 11C from the D / A converter 31, and the switch 42E disconnects the horizontal amplitude control circuit 12C from the D / A converter 32. Therefore, during the data switching period, the vertical amplitude control circuit 11
C, a holding voltage indicating the vertical amplitude data before switching is supplied from the capacitor 61, and the horizontal amplitude control circuit 12C
, A holding voltage indicating the horizontal amplitude data before the switching is supplied from the capacitor 62.

While the capacitors 61 and 62 hold the voltage, the bus interface 20C transfers the new vertical amplitude data and the horizontal amplitude data to the A register 21 and the B register 22, respectively. afterwards,
The bus interface 20C outputs a data holding release command “0” to the data holding register 50E. Thus, the switch 41E connects the input terminal of the vertical amplitude control circuit 11C to the output terminal of the D / A converter 31, and the switch 42E connects the input terminal of the horizontal amplitude control circuit 12C and the output of the D / A converter 32. Connect to the terminal. Therefore, in a new mode (RGB mode or video signal mode) after the completion of the data switching period, the D / A converter 31 supplies an analog voltage indicating new vertical amplitude data to the vertical amplitude control circuit 11C, An analog voltage indicating new horizontal amplitude data is supplied from the D / A converter 32 to the control circuit 12C.

FIG. 4 is a timing chart showing the operation of the embodiment of FIG. The register name in the “data transfer” column in FIG. 4A is the name of a register that receives data transfer from the bus interface 20C. First, the bus interface 20C sends a data holding command “1” to the data holding register 50E, and the switches 41E and 42E
Is turned off, new vertical amplitude data is sent to the A register 21, then new horizontal amplitude data is sent to the B register 22, and then a data holding cancel command "0" is sent to the data holding register 50E, and 41E and 42
E is turned on to simultaneously update the voltages supplied to the vertical amplitude control circuit 11C and the horizontal amplitude control circuit 12C.
Thus, the D / A is controlled by the capacitors 61 and 62.
By holding the output voltages of converters 31 and 32, A register 21 and B register 2
2 may be transferred. The time during which a voltage indicating new data is supplied from the D / A converter 31 to the vertical amplitude control circuit 11C, and the time during which a voltage indicating new data is supplied from the D / A converter 32 to the horizontal amplitude control circuit 12C. There is no need to darken the screen because there is no difference between the two.

[0039]

According to the television receiver of the first aspect, a plurality of vertical amplitude data are recorded for the vertical amplitude data.
Storage means and a plurality of horizontal amplitude data for the horizontal amplitude data.
Data storage means, and a plurality of vertical amplitude data
Vertical amplitude data for switching the output of the width data storage means
Switching means and a plurality of horizontal amplitudes of horizontal amplitude data
Horizontal amplitude data switch for switching the output of the data storage means
Switching means, vertical amplitude data and horizontal amplitude data
Vertical amplitude data storage used after switching each of
Means or horizontal amplitude data storage means
After that, vertical amplitude data switching means and horizontal amplitude data
Since the switching means are switched at the same time,
A data signal after switching can be obtained simultaneously from outputs of a plurality of switching means without the need to transfer data to the storage means at high speed. Further, even when the data content affects the display of the screen, it is not necessary to perform special processing such as darkening the screen during the data switching period.

According to the television receiver of the second aspect,
Multiple vertical amplitude data registers for vertical amplitude data
Data and multiple horizontal amplitude data
A register is provided and a plurality of vertical amplitude data
Vertical amplitude data switch that switches the output of the data register.
And a plurality of horizontal amplitude data of the horizontal amplitude data.
Amplitude data switch that switches the output of the data register
A vertical amplitude data and a horizontal amplitude data.
Vertical amplitude data register used after switching each
Or, after storing it in the horizontal amplitude data register in advance,
Direct amplitude data switching means and horizontal amplitude data switch
Since to switch the quenching means at the same time, without having to transfer data at high speed in the register, the output of the plurality of switching means, at the same time, it is possible to obtain a data signal after the switching. Further, even when the data content affects the display of the screen, it is not necessary to perform special processing such as darkening the screen during the data switching period.

According to the third aspect of the television receiver ,
Multiple vertical amplitude data registers for vertical amplitude data
Data and multiple horizontal amplitude data
A register is provided.
Vertical amplitude data D / A converter and horizontal amplitude data
One horizontal amplitude data D / A converter on the output side of the register
A plurality of vertical amplitude data D of the vertical amplitude data.
Vertical data that can switch the output of the A / A converter
Switching means for controlling a plurality of horizontal amplitude data;
Horizontal that can switch the output of width data D / A converter
Provide amplitude data switching means,
Vertical used after switching each of the horizontal amplitude data
Preset in the amplitude data register or horizontal amplitude data register
The vertical amplitude data switching means and water
Since the flat-amplitude data switching means are switched at the same time, the switched data signals can be obtained from the outputs of the plurality of switching means simultaneously without the need to transfer the data to the register at high speed. Further, even when the data content affects the display of the screen, it is not necessary to perform special processing such as darkening the screen during the data switching period. Further, since the switching means switches an analog signal, the configuration is simpler than switching a digital signal in parallel of a plurality of bits.

[0042]

[0043]

[0044]

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a data switching circuit of the present invention.

FIG. 2 is a block diagram showing a configuration of another embodiment of the data switching circuit of the present invention.

FIG. 3 is a block diagram showing a configuration of another embodiment of the data switching circuit of the present invention.

FIG. 4 is a timing chart showing an operation example of the embodiment of FIG. 3;

FIG. 5 is a block diagram illustrating an example of a television receiver to which the present invention is applied.

FIG. 6 is a block diagram illustrating an example of a conventional data switching circuit.

[Explanation of symbols]

 11C Vertical amplitude control circuit 12C Horizontal amplitude control circuit 20C Bus interface 21 A register 21A0 A0 register 21A1 A1 register 22 B register 22B0 B0 register 22B1 B1 register 31, 31A0, 31A1 D / A converter 32, 32B0, 32B1 D / A converter 41 , 41C, 42, 42C Switch 50 Register selection register 50C D / A selection register 50E Data holding register

Claims (3)

(57) [Claims] A vertical amplitude data for controlling a vertical deflection, and
Data to switch horizontal amplitude data to control horizontal deflection
In a television receiver having a switching circuit, a plurality of vertical amplitudes are provided for the vertical amplitude data.
Data storage means, and a plurality of horizontal amplitudes provided for the horizontal amplitude data
Data storage means, and one switch provided for the vertical amplitude data
Means for the vertical amplitude data.
Cutting the output signals of the plurality of vertical amplitude data storage means.
A vertical amplitude data switching means for switching and outputting, and one switching means provided for the horizontal amplitude data, wherein the plurality of horizontal amplitude data storage means provided for the horizontal amplitude data are provided. Horizontal amplitude data switching means for switching and outputting an output signal; and outputting each of the vertical amplitude data and the horizontal amplitude data.
The vertical amplitude data storage means used after switching, or
Is stored in the horizontal amplitude data storage means in advance, and
Thereafter, the vertical amplitude data switching means and the horizontal amplitude
Television receiver, characterized in that it comprises a control means for switching width data switching means simultaneously. 2. A vertical amplitude data for controlling a vertical deflection.
Data to switch horizontal amplitude data to control horizontal deflection
In a television receiver having a switching circuit, a plurality of vertical amplitudes are provided for the vertical amplitude data.
A data register, and a plurality of horizontal amplitudes provided for the horizontal amplitude data.
A data register, and a switch provided for the vertical amplitude data.
Means for the vertical amplitude data.
Digital output of the plurality of vertical amplitude data registers.
Vertical amplitude data switch that switches and outputs force signals
Switching means, and one switch provided for the horizontal amplitude data.
Means for the horizontal amplitude data.
Digital output of the plurality of horizontal amplitude data registers.
Horizontal amplitude data switch that switches and outputs force signals
The vertical amplitude data and the horizontal amplitude data.
The vertical amplitude data register to be used after switching or
Is stored in advance in the horizontal amplitude data register,
Thereafter, the vertical amplitude data switching means and the horizontal amplitude
Television receiver, characterized in that it comprises a control means for switching width data switching means simultaneously. 3. Vertical amplitude data for controlling vertical deflection,
Data to switch horizontal amplitude data to control horizontal deflection
In a television receiver having a switching circuit, a plurality of vertical amplitudes are provided for the vertical amplitude data.
A data register, and a plurality of horizontal amplitudes provided for the horizontal amplitude data.
A data register, and a D register provided for the vertical amplitude data register.
/ A converter, wherein the vertical amplitude data register
Digital signal output from the
A vertical amplitude data D / A converter, and a D / A converter provided for the horizontal amplitude data register.
/ A converter, said horizontal amplitude data register
Digital signal output from the
A horizontal amplitude data D / A converter, and a switch provided for the vertical amplitude data.
Means for the vertical amplitude data.
The plurality of vertical amplitude data D / A converters.
Vertical amplitude data switch that switches and outputs log output signals
Switching means, and a switch provided for the horizontal amplitude data.
Means for the horizontal amplitude data.
The plurality of horizontal amplitude data D / A converters.
Horizontal amplitude data switch for switching and outputting log output signals
Switching means, each of the vertical amplitude data and the horizontal amplitude data.
The vertical amplitude data register to be used after switching or
Is stored in advance in the horizontal amplitude data register,
Thereafter, the vertical amplitude data switching means and the horizontal amplitude
Television receiver, characterized in that it comprises a control means for switching width data switching means simultaneously.