JP3324973B2 - Positioning mark for forming resist pattern and method for manufacturing multilayer printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a positioning mark for forming a resist pattern and a method for manufacturing a multilayer printed wiring board, and more particularly to a positioning method which is excellent in positioning accuracy of a photomask used for forming a plating resist. The present invention relates to a method for manufacturing a multilayer printed wiring board using marks.

[0002]

2. Description of the Related Art In a method of manufacturing a so-called build-up multilayer printed wiring board, an uncured interlayer resin insulating material (adhesive for electroless plating) is applied by a roll coater, dried and cured, and then a via hole is formed. Formed and plated to form conductor circuits. As a method of manufacturing such a build-up multilayer wiring board, there are a full additive method of leaving a plating resist and a semi-additive method of removing a plating resist.

The build-up by the full additive method will be described with reference to FIG. Inner layer conductor circuit 1
Substrate 1 with 42a and positioning mark 142b formed
20 is coated with an insulating layer 138 (FIG. 8A). Then, via holes 136 are formed in the insulating layer 138 by etching (FIG. 8B). And
After placing the dry film 141, the predetermined pattern 16
The dry film 141 is exposed with the photomask film 160 on which the film 1a is formed (FIG. 8C) The exposed portion of the dry film 141 is removed with a solvent to form a resist 142 (FIG. 8D). Then, a plating 143 is formed in the non-resist forming portion, thereby completing the via hole 147.

Next, the semi-additive method will be described with reference to FIG.
This will be described with reference to FIG. The insulating layer 1 is provided on the substrate 120 on which the inner conductor circuit 142a and the positioning mark 142b are formed.
38 (FIG. 9A). And the insulating layer 13
8, an opening 136 for forming a via hole by etching.
Is drilled (FIG. 9B). Then, the plating layer 140 is formed uniformly by electroless plating (FIG. 9C). Then, after placing the dry film 141, the dry film 141 is exposed with the photomask film 160 on which the predetermined pattern 161a is formed (FIG. 9).
(D)). The exposed portion of the dry film 141 is removed with a solvent to form a resist 142 (FIG. 9E).
Then, a plating 144 is formed on the non-resist forming portion (FIG. 9F). Thereafter, the via 142 is formed by removing the resist 142 and the plating film 140 below the resist 142.

[0005] Here, the semi-additive method is advantageous over the full additive method in that the side surface of the conductor circuit can be roughened to improve the adhesion to the interlayer resin insulating material.

[0006] The plating resist is formed as described above with reference to FIGS. 8C and 8D in the full additive method, and in the semi-additive method.
As described with reference to FIGS. 9D and 9E, the photosensitive dry film 141 is attached to the surface of the substrate 120, and the photomask film 160 on which the conductor circuit pattern 161a is drawn is placed. Then, exposure and development are performed.

Here, the photomask film 160 is
It must be placed at a position that exactly matches the conductor circuit 124a under the interlayer resin insulation layer (dry film) 141. For this purpose, the positioning mark 124b is provided on the substrate 120 side.
Is formed, and a positioning mark 161b is formed on the photomask 160 side. The positioning mark is recognized by an image processing technique, and the two are aligned to align the photomask film. That is, FIG.
As shown in FIG. 9C and FIG. 9D, light is irradiated from below and the transmitted light between the positioning mark 124b on the substrate 120 and the positioning mark 161b on the photomask 160 is monitored by the upper camera 200. Then, the photomask film 160 is positioned by overlapping the two.

Here, as shown in FIG. 8C, in the full additive method, the positioning mark 124b on the substrate 120 and the positioning mark 1 on the photomask 160 are used.
The transmitted light with 61b can be reliably captured by the upper camera 200. However, in the semi-additive method, the electroless plating film 140 is formed on the entire surface of the interlayer resin insulating layer 138, and the photosensitive dry film 141 is pressed on the electroless plating film 140. Therefore, it is difficult to recognize the positioning mark using the transmitted light described above.

Accordingly, the inventors of the present application have obtained an idea that the position is adjusted by irradiating light from above and reflecting light from the electroless plating film. That is, as shown in FIG. 10A, a concave portion (opening) 136b is provided in the interlayer resin insulating layer 138,
The electroless plating film 140 in which the dry film 141 is not in contact with the dry film 141 in the recess interior 136b and the electroless plating film 140 in which the dry film 141 is in contact (that is, the recess 136b)
A method of recognizing only the reflected light of the electroless plating film 140 inside the concave portion 136b as a positioning mark by utilizing the difference in the amount of reflection from the outside (outside). Wall surface 13 inside recess
The light is reflected by the electroless plating film 140 of FIG.
b, the amount of reflection incident on the camera from the concave portion is larger than the amount of reflection incident on the camera from the electroless plating film 140 (outside the concave portion 136b) with which the dry film 141 is in contact. I thought it could be recognized as a mark.

[0010]

However, when this method was actually performed, it was found that the reflected light could not be sufficiently recognized. As a result of analyzing the cause, as shown in FIG. 10B, the photosensitive dry film 141 melts and enters the recess 136b during the heating and pressing, and is not reflected by the electroless plating film 140. Is no longer equal to the amount of reflection of the electroless plating film (outside the concave portion 136b) in contact with
It turned out that it cannot be recognized as a positioning mark.

In order to prevent such a dry film resin from entering, a method of reducing the diameter of the concave portion was also attempted. However, a new problem arises in that the positioning mark itself becomes small and the positioning accuracy is deteriorated. did.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to apply a photosensitive dry film to a semi-additive method without deteriorating the positioning accuracy. It is an object of the present invention to provide a positioning mark which can be read even when the method is used, and a method for manufacturing a multilayer printed wiring board using the positioning mark.

[0013]

According to a first aspect of the present invention, there is provided a positioning mark for forming a resist pattern, wherein a ring-shaped recess is formed in an interlayer resin insulating layer to achieve the above object.
A technical feature is that a plating film is provided on the surface of the interlayer resin insulating layer and in the recess.

A second aspect of the present invention provides a method for manufacturing a multilayer printed wiring board, which comprises the following steps (a) to (f). (A) a step of forming an interlayer resin insulating layer on a substrate provided with a reference mark; (B) providing a hole for forming a via hole and a ring-shaped recess in the interlayer resin insulating layer using the reference mark; (C) a step of forming a plating film on the surface of the interlayer resin insulating layer, a hole for forming a via hole, and a ring-shaped concave portion; (D) a step of pressing the photosensitive dry film. (E) When placing the photomask film on which the conductor pattern and the black circle are drawn on the photosensitive dry film, only the reflected light of the plating film formed in the ring-shaped recess is recognized as a positioning mark. Align the black circle of the photomask film with the ring-shaped positioning mark,
Placing the photomask film on a photosensitive dry film, exposing and developing the dry film to form a plating resist pattern for forming a conductor pattern. (F) A step of forming a conductor pattern by electrolytic plating, removing the plating resist, and dissolving and removing the plating film present under the plating resist.

In the present invention, a ring-shaped recess is formed in the interlayer resin insulation layer, and an electroless plating film is provided on the surface of the interlayer resin insulation layer and in the recess, and this is used as a positioning mark. Even if the photosensitive dry film is pressed on the electroless plating film, the dry film does not contact the inside of the recess, so the electroless plating film that the photosensitive dry film contacts does not contact the photosensitive dry film. The ring-shaped positioning mark can be recognized by the difference in the reflectance of the film. Further, since the width of the ring-shaped concave portion can be reduced, the photosensitive dry film does not enter, and the positioning mark does not become unrecognizable due to the compression of the dry film. Moreover, since the diameter of the ring is recognized as the size of the positioning mark, the positioning accuracy does not decrease due to the quantization error associated with the image processing technology.

The width of the recess is desirably 100 to 300 μm. The reason for this is that if the thickness is less than 100 μm, the width is too small to read easily, and if it exceeds 300 μm, the plating resist is attached.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a multilayer printed wiring board according to the present invention will be described in detail. (A) The substrate used in the present invention is etched into a copper-clad laminate to form a copper pattern. Here, as shown in FIG. 1A, 18 μm is applied to both sides of a substrate 20 made of glass epoxy or BT (bismaleimide triazine) having a thickness of 1 mm.
copper clad laminate 20a formed by laminating copper foil 22
Is used as a starting material, and the copper foil 22 is etched in a pattern according to a conventional method, thereby forming an inner layer copper pattern 24a and a reference mark (not shown) having a partially hollowed shape on both surfaces of the substrate 20. Provide. Further, a through hole 27 for a through hole is formed, and a through hole 28 is formed by applying a copper plating 25 to electrically connect the front and back wiring layers. Here, instead of the copper-clad laminate 20a, an adhesive layer for electroless plating is formed on a glass epoxy substrate, a polyimide substrate, a ceramic substrate, a metal substrate, or the like, and this is roughened to form a roughened surface. May be subjected to electroless plating to form a copper pattern.

The surface of the core substrate is roughened by a blackening (oxidation) -reduction process (see FIG. 1B).

Here, as shown in FIG. 1C, a resin is applied to the substrate 20 by a roll coater to fill the through holes 28 between the conductor circuits (inner layer copper patterns 24a). Then, it is cured by heating at 150 ° C. for 30 minutes.

Subsequently, one side of the substrate 20 is polished with a belt sander using # 600 belt polishing paper (manufactured by Sankyo Rikagaku). At this time, polishing is performed so that the filling resin 30 does not remain on the inner layer copper pattern 24a and the land 28a of the through hole 28. Thereafter, buffing is performed to remove the scratches caused by the belt sander. Then, the other surface is similarly polished to form a flat substrate 20 on both surfaces as shown in FIG. Then, Cu-Ni-
The surface is roughened by plating with a needle-shaped alloy (inter-plate made by Ebara Ujilite) 39 consisting of P (Fig. 2 (E)).
reference).

Next, an interlayer resin insulating material layer 38 is formed on the substrate 20 (see FIG. 2F). The interlayer insulating material layer 38 is made of a thermosetting resin such as an epoxy resin, a polyimide resin, a bismaleimide triazine resin, and a phenol resin, a photosensitive resin obtained by sensitizing these resins, a thermoplastic resin such as polyether sulfone, a thermoplastic resin, and a thermosetting resin. A composite of a curable resin and a composite of a photosensitive resin and a thermoplastic resin can be used.

The interlayer insulating agent is preferably an adhesive for electroless plating. As the adhesive for electroless plating, an adhesive obtained by dispersing cured heat-resistant resin particles soluble in an acid or an oxidizing agent in an uncured heat-resistant resin hardly soluble in an acid or an oxidizing agent is most suitable. . This is because by roughening and removing the heat-resistant resin particles soluble in an acid or an oxidizing agent, an octopus-shaped anchor can be formed on the surface and the adhesion to the conductor circuit can be improved.

As the heat-resistant resin hardly soluble in an acid or an oxidizing agent, a photosensitive thermosetting resin or a composite of a photosensitive thermosetting resin and a thermoplastic resin is preferable. By sensitizing, via holes can be easily formed by exposure and development. Further, by forming a composite with a thermoplastic resin, the toughness can be improved, the peel strength of the conductor circuit can be improved, and the occurrence of cracks in the via hole due to the heat cycle can be prevented.

Specifically, epoxy acrylate obtained by reacting an epoxy resin with acrylic acid or methacrylic acid, or a composite of epoxy acrylate and polyether sulfone is preferred. Epoxy acrylate has two of all epoxy groups.
It is desirable that 0 to 80% react with acrylic acid or methacrylic acid.

As the heat resistant resin particles, epoxy resin, amino resin (melamine resin, urea resin, guanamine resin) and the like are preferable.

The acid used in the present invention includes phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and organic acids are particularly preferable. This is because, when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded.

The oxidizing agent is preferably chromic acid or permanganate (such as potassium permanganate). In particular,
When dissolving and removing the amino resin, it is desirable to carry out roughening treatment alternately with an acid and an oxidizing agent. In addition, the interlayer insulating material layer
It does not need to be formed by one application, but may be formed by applying a plurality of times.

(B) The interlayer resin insulating material layer 38 is dried.
Then, as shown in FIG. 2F and FIG. 5A showing the alignment, the photomask film 60 is aligned with the reference mark 100 formed on the substrate 120. On the photomask film 60, a circular pattern 61a for forming a via hole, a positioning mark 61b, and a ring-shaped pattern 61c for forming a positioning mark with a plating resist are drawn. Here, FIG.
Light is irradiated from below as shown in FIG. 4 and the silhouette of the reference mark 100 is recognized by the CCD camera 200 using the transmitted light, and the positioning mark 61b is placed in the circle of the silhouette.
The adjustment is made while moving the position of the photomask 60 or the substrate 20 so that the black circle of the above is included. Here, the photomask film 60 may be made of resin or glass.

Next, exposure and development are performed to provide an opening 36 for forming a via hole and a ring-shaped recess 64 (FIG. 2).
(G)). An opening 36 for forming a via hole and a ring-shaped recess 64 formed in the substrate 20 are shown in FIG. In this step, with the photomask film 60 in close contact with it, 500 mJ / cm ² by an ultra-high pressure mercury lamp.
Exposure. This is spray-developed with a DMDG solution, and the substrate is further subjected to 3000 mJ / c with an ultra-high pressure mercury lamp.
exposed with m ^2, 1 hour at 100 ° C., thereafter 0.99 ° C. 5
By performing heat treatment (post-bake) for a long time, the opening 3 having excellent dimensional accuracy equivalent to a photomask film
6. An interlayer resin insulating layer 38 having a thickness of 35 μm and having a ring-shaped recess 64 is formed.

Next, after the surface of the interlayer resin insulation layer 38 is roughened (see FIG. 2H), a catalyst nucleus is provided. The catalyst nucleus is preferably a noble metal ion or a colloid, and generally uses palladium chloride or a palladium colloid.
It is desirable to perform a heat treatment to fix the catalyst core. The catalyst core is preferably palladium.

(C) After providing the catalyst core, electroless copper plating is performed to form an electroless copper plating film 40 on the entire surface of the interlayer resin insulating layer (see FIG. 3 (I)). By this plating, a plating film is also formed inside the concave portion 64 of the ring recess, and serves as a positioning mark 66.

(D) A dry film 41 made of a photosensitive resin for forming a plating resist is thermocompression-bonded (FIG. 3).
(See (J)), the positioning mark 66 is enlarged and shown in FIG.
It is shown in (A). As the dry film, a commercially available product may be used, or a composition comprising an epoxy acrylate obtained by reacting an epoxy resin with acrylic acid or methacrylic acid and an imidazole curing agent may be used.

As the epoxy resin, a novolak type epoxy resin is preferable, and a cresol novolak type or a phenol novolak type epoxy resin can be used. FIG.
As shown in (A), in this embodiment, even if the dry film 41 is thermocompression-bonded, the width W of the concave portion 64 of the positioning mark 66 is reduced, so that the dry film 41 is melted and enters the concave portion 64. Absent.

(E) The photomask film 70 is positioned and placed on the dry film 41 (see FIG. 3K). On the photomask film 70, a conductor pattern 71a and a black circle 71b as a positioning mark for the dry film 41 side are drawn. The alignment between the photomask film 70 and the substrate 20 is specifically performed as follows.

FIG. 7B shows the photomask film 7.
FIG. 6 is an explanatory view showing the alignment of the “0” with the substrate 20;
Indicates an image captured by the CCD camera 200. Here, the difference between the reflection amount of the electroless copper plating film 40 in contact with the dry film 41 and the reflection amount of the electroless copper plating film 40 in the positioning mark 66 not in contact with the dry film 41 is read by the CCD camera 200 and positioned. The mark 66 is recognized as a ring-shaped mark. FIG. 6A shows an image of the positioning mark 66 taken by a CCD camera. As can be seen from the figure, since the ring portion of the positioning mark 66 reflects light strongly, the contour of the ring can be clearly identified. In the case of the simple concave portion described above with reference to FIG. 10B, the resin of the dry film enters as described above and cannot be clearly recognized as the positioning mark.

The positioning mark 66 and the black circle 71b on the photomask film 70 side are overlapped and the CCD camera 200
FIG. 6 (E) shows an image photographed by. The position coordinates of the center of the black circle 71b on the photomask film 70 side and the center of the positioning mark 66 recognized as a ring are determined by image processing technology, and the dry film 70 is positioned so that both centers are aligned.
Alternatively, the substrate 20 is moved and adjusted, and the photomask film 70 is placed on the dry film 41. The positioning mark 66 is recognized as a ring, and reducing the width W of the ring (see FIG. 7A) does not reduce the size of the mark itself. The influence of the accompanying quantization error is reduced, and the positioning accuracy is not reduced.

Hereinafter, reading by the CCD camera 200,
The image processing technique will be described in more detail. When the substrate 20 is irradiated with light from the light source 202, the light is reflected on the surface of the electroless copper plating film 40 with which the dry film 41 contacts.
Further, although light is reflected by the electroless copper plating film 40 of the positioning mark 66 where the dry film 41 is not in contact,
The positioning mark 66 is a recess, and is shown in FIG.
As shown in FIG. 5, not only the light incident from directly above the concave portion but also the light incident obliquely is reflected on the wall surface of the concave portion 64, and this reflected light is reflected again on the bottom surface, and together with the light incident from directly above. It is added and emitted. For this reason, the amount of reflection incident on the camera is larger than the reflection on the electroless copper plating film 40 (outside the concave portion 64) where the dry film 41 contacts. Utilizing this difference in the amount of reflection, the positioning mark 66 is recognized as shown in FIG.

When the positioning mark 66 is recognized, the position coordinates of the center point are calculated. Next, the position coordinates of the center point of the black circle 71b are calculated, and the shift amount between the two is calculated. Drive data for the substrate or the photomask film 70 is generated from the shift amount, and the substrate 20 or the photomask film is calculated in accordance with the drive data. 70 is moved and aligned, and both are brought into close contact with each other.

The photomask film 70 used in the present invention may be made of resin such as polyethylene terephthalate, or may be made of glass. Next, ultraviolet exposure is performed. Further develop with alkaline aqueous solution,
A plating resist 42 is formed (see FIG. 4L).

(F) Electrolytic copper plating is applied to portions where the plating resist 42 is not formed, and an electrolytic copper plating film 44 is provided as a thick layer (see FIG. 4 (M)). Then, after removing the plating resist 42, the electroless plated copper film 40 under the plating resist 42 is dissolved and removed with an etchant, thereby completing the conductor circuit 46 and the via hole 47 (FIG. 4 (N)). reference). As the etchant, an aqueous solution of sulfuric acid-hydrogen peroxide, an aqueous solution of persulfate, an aqueous solution of ferric chloride and cupric chloride is preferable. Further, the above steps are repeated to build up a wiring layer, thereby completing a multilayer printed wiring board.

Here, the size of the positioning mark 66 will be further described with reference to FIG. FIG. 6 (A)
Shows a CCD camera image when the outer diameter of the positioning mark 66 is 2φ (2 mm) and the ring width is 150 μm. FIG. 6B shows an outer diameter of 2φ and a ring width of 3 mm.
FIG. 6 (C) shows the case where the outer diameter is 2φ and the ring width is 500μ when formed to 00μ, and FIG. 6 (D) shows the case where the outer diameter is formed to 2φ and the ring width is 700μ. An image is shown.

As shown in FIGS. 6 (B), 6 (C) and 6 (D), when the ring width exceeds 300 μm, the ring becomes double. This is because when the thickness exceeds 300 μm, the plating resist melts and adheres to the positioning mark 66 in the same manner as when the positioning mark is formed in the simple concave portion shown in FIG. . On the other hand,
If the ring width is smaller than 100 μ, the width is too small to make reading difficult. For this reason, the ring width is 100 to 300
μm is desirable.

The diameter of the ring-shaped recess is 1 to 3 mm.
Is good. The reason for this is that if it is too small, the positioning accuracy decreases, and if it exceeds 3 mm, it becomes impractical due to factors such as the CCD camera magnification and the occupied area.

[0044]

As described above, according to the positioning mark of the present invention, it is possible to read even if the photosensitive dry film is thermocompression-bonded without deteriorating the positioning accuracy and to obtain a highly reliable semi-additive wiring. Can manufacture boards.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram of a multilayer printed wiring board according to one embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of a multilayer printed wiring board according to one embodiment of the present invention.

FIG. 3 is a manufacturing process diagram of a multilayer printed wiring board according to one embodiment of the present invention.

FIG. 4 is a manufacturing process diagram of the multilayer printed wiring board according to one embodiment of the present invention.

FIGS. 5A and 5B are perspective views showing alignment of a photomask film. FIGS.

FIGS. 6A to 6E are explanatory diagrams of positioning marks imaged by a CCD camera.

FIG. 7A is an explanatory view showing a positioning mark in FIG. 3J in an enlarged manner, and FIG. 7B is an explanatory view showing shooting of the positioning mark by a CCD camera. .

FIG. 8 is a manufacturing process diagram showing formation of via holes by a full additive method.

FIG. 9 is a manufacturing process diagram showing formation of via holes by a semi-additive method.

FIG. 10A is an explanatory diagram when a positioning mark formed by a concave portion is imaged by a CCD camera;
FIG. 10B is an explanatory diagram of a positioning mark formed by a concave portion.

[Explanation of symbols]

Reference Signs List 20 substrate 22 copper foil 24a conductive circuit 30 resin filler 38 interlayer resin insulating material 40 electroless plating film 41 dry film 42 plating resist 44 electrolytic plating film 47 via hole 60 photomask film for forming via hole opening 61a via hole Black circle for forming 61b Ring figure for forming positioning mark 64 Ring-shaped recess for forming positioning mark 66 Positioning mark 70 Photomask film 71b Black circle for positioning drawn on photomask film 200 CCD camera

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-354396 (JP, A) JP-A-7-142862 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05K 3/00-3/46 G03F 9/00 H05K 1/02

Claims (2)

(57) [Claims] 1. A positioning mark for forming a resist pattern, wherein a concave portion is formed in a ring shape in an interlayer resin insulating layer, and a plating film is formed on the surface of the interlayer resin insulating layer and in the concave portion. . 2. A method for manufacturing a multilayer printed wiring board, comprising the following steps (a) to (f). (A) a step of forming an interlayer resin insulating layer on a substrate provided with a reference mark; (B) providing a hole for forming a via hole and a ring-shaped recess in the interlayer resin insulating layer using the reference mark; (C) a step of forming a plating film on the surface of the interlayer resin insulating layer, a hole for forming a via hole, and a ring-shaped concave portion; (D) a step of pressing the photosensitive dry film. (E) When placing the photomask film on which the conductor pattern and the black circle are drawn on the photosensitive dry film, only the reflected light of the plating film formed in the ring-shaped recess is recognized as a positioning mark. Align the black circle of the photomask film with the ring-shaped positioning mark,
The photomask film is placed on a photosensitive dry film, and the photosensitive dry film is exposed and developed.
A step of forming a plating resist pattern for forming a conductor pattern; (F) A step of forming a conductor pattern by electrolytic plating, removing the plating resist, and dissolving and removing the plating film present under the plating resist.