JP3325274B2 - Method of forming capacitor insulating film - Google Patents
Method of forming capacitor insulating filmInfo
- Publication number
- JP3325274B2 JP3325274B2 JP40466990A JP40466990A JP3325274B2 JP 3325274 B2 JP3325274 B2 JP 3325274B2 JP 40466990 A JP40466990 A JP 40466990A JP 40466990 A JP40466990 A JP 40466990A JP 3325274 B2 JP3325274 B2 JP 3325274B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- forming
- insulating film
- oxide film
- oxidation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 12
- 239000003990 capacitor Substances 0.000 title description 10
- 238000000137 annealing Methods 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 150000004767 nitrides Chemical class 0.000 claims 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims 1
- 239000012495 reaction gas Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 79
- 230000003647 oxidation Effects 0.000 description 24
- 238000007254 oxidation reaction Methods 0.000 description 24
- 230000002159 abnormal effect Effects 0.000 description 6
- 238000005755 formation reaction Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 230000035876 healing Effects 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000003313 weakening effect Effects 0.000 description 2
- -1 H and NH Chemical class 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Memories (AREA)
Description
【０００１】[0001]
【産業上の利用分野】この発明は、ＤＲＡＭ（Dynamic
Random Access Memory）のキャパシタ絶縁膜として用い
られる実効膜厚５０Åレベルの極めて薄い下部酸化膜
（自然酸化膜）／ＬＰＣＶＤ（Low Pressure Chemical
Vapor Deposition）−Si3N4 膜／上部酸化膜なる積層絶
縁膜からなるキャパシタ絶縁膜の形成方法に関するもの
である。BACKGROUND OF THE INVENTION The present invention relates to a DRAM (Dynamic
Extremely thin bottom oxide film (natural oxide film) with an effective film thickness of 50 ° / LPCVD (Low Pressure Chemical) used as a capacitor insulating film of random access memory
Vapor Deposition) relates a method of forming the -Si 3 N 4 film / an upper oxide film comprising laminated insulating consisting film capacitor insulating film.
【０００２】[0002]
【従来の技術】今日、ＤＲＡＭのキャパシタ誘電膜には
下部酸化膜（自然酸化膜）／ＬＰＣＶＤ−Si3N4 膜／上
部酸化膜（ヒーリング酸化膜）からなる積層絶縁膜が一
般に用いられている。2. Description of the Related Art Today, a laminated insulating film composed of a lower oxide film (natural oxide film) / LPCVD-Si 3 N 4 film / upper oxide film (healing oxide film) is generally used as a capacitor dielectric film of a DRAM. .
【０００３】ＤＲＡＭの高集積化に伴い、この積層絶縁
膜もさらに薄いものが要求されてきている。４Ｍ6 ＤＲ
ＡＭ以降においては、下部酸化膜は積極的には形成せ
ず、下部電極表面にできてしまう自然酸化膜を用い、Ｌ
ＰＣＶＤ−Si3N4 は１００Å以下の極薄膜を利用するの
が主流となっている。[0003] As the integration of DRAMs becomes higher, the thickness of the laminated insulating film is required to be thinner. 4M 6 DR
After the AM, the lower oxide film is not actively formed, and a natural oxide film formed on the lower electrode surface is used.
PCVD-Si 3 N 4 is to utilize the following very thin 100Å are the mainstream.
【０００４】ここで、極薄ＬＰＣＶＤ−Si3N4 は、SiH2
Cl2 とNH3 を材料ガスに用いる場合には、一般に、７０
０℃〜８００℃で反応させて形成される。反応温度を７
００℃以下に下げると、Si3N4 膜中の不純物量（特にSi
H, NH などの化合物によるターミナルＨ量）が多くなる
など、化学的にはより不完全な膜が形成されるため、絶
縁膜としての特性も向上は望めないものとされてきた。Here, the ultra-thin LPCVD-Si 3 N 4 is made of SiH 2
When Cl 2 and NH 3 are used for the material gas, generally 70%
It is formed by reacting at 0 ° C to 800 ° C. Reaction temperature 7
When the temperature is lowered to below 00 ° C., the amount of impurities in the Si 3 N 4 film (especially,
Since a more imperfect film is formed chemically, such as an increase in the amount of terminal H due to compounds such as H and NH, it has been considered that the characteristics as an insulating film cannot be improved.
【０００５】また、上記酸化膜は一般にSi3N4 表面を８
５０℃〜９００℃で（H2＋O2）雰囲気中で数十分酸化
し、形成される。この上部酸化膜を形成して初めて、リ
ーク電流を許容限界以下に抑えることができ、この酸化
はSi3N4 を含む積層絶縁膜の形成に不可欠である。[0005] In addition, the above-mentioned oxide film generally has an Si 3 N 4 surface of 8 μm.
It is oxidized for several tens minutes in an atmosphere of (H 2 + O 2 ) at 50 ° C. to 900 ° C. and is formed. Only after forming this upper oxide film, the leak current can be suppressed below the allowable limit, and this oxidation is indispensable for forming a laminated insulating film containing Si 3 N 4 .
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、１００
Å以下、特に〜５０Åレベルの極薄ＬＰＣＶＤ−Si3N4
を利用しようとするとき、前記の上部酸化膜形成条件で
酸化を行うと、極薄Si3N4 膜の耐酸化性または酸化種に
対するマスク性が破れ、下部電極材のポリ−シリコンま
でが酸化されてしまう。その結果、異常酸化現象による
絶縁膜の膜厚は数百Åに膨れ、初期の極薄絶縁膜の形成
という目的が達せられなくなるという問題があった。SUMMARY OF THE INVENTION However, 100
Å or less, particularly ~50Å level of ultrathin LPCVD-Si 3 N 4
When the oxidation is performed under the above-described upper oxide film forming conditions, the oxidation resistance of the ultrathin Si 3 N 4 film or the masking property against the oxidizing species is broken, and even the poly-silicon of the lower electrode material is oxidized. Will be done. As a result, the thickness of the insulating film swells to several hundreds of mm due to the abnormal oxidation phenomenon, and there is a problem that the purpose of forming an ultra-thin insulating film in the initial stage cannot be achieved.
【０００７】また、ＬＰＣＶＤ−Si3N4 を利用した積層
絶縁膜を高集積ＤＲＡＭに採用するときに、最も深刻な
問題となるのは、リーク電流である。上部酸化を弱くす
れば、上記のような異常酸化現象は回避できるが、リー
ク電流が小さくならないため、やはり実用上満足できる
誘電膜は得られなかった。Further, when a laminated insulating film using LPCVD-Si 3 N 4 is employed in a highly integrated DRAM, the most serious problem is a leakage current. If the upper oxidation is weakened, the above-mentioned abnormal oxidation phenomenon can be avoided. However, since the leak current does not decrease, a dielectric film which is practically satisfactory cannot be obtained.
【００１８】この発明は前記従来技術が持っている問題
点のうち、異常酸化現象による極薄絶縁膜形成ができな
い点と、リーク電流の防止と上部酸化膜の薄膜化の両立
が不可能な点について解決したキャパシタ絶縁膜の形成
方法を提供するものである。According to the present invention, of the problems of the prior art, an extremely thin insulating film cannot be formed due to an abnormal oxidation phenomenon, and it is impossible to prevent leakage current and reduce the thickness of an upper oxide film at the same time. It is intended to provide a method for forming a capacitor insulating film which solves the above.
【０００９】[0009]
【課題を解決するための手段】この発明は前記問題点を
解決するために、キャパシタ絶縁膜の形成方法におい
て、反応ガスSiH2Cl2 とNH3 を５５０℃〜６５０℃の低
温で反応させて極薄のＬＰＣＶＤ−Si3N4 を形成する工
程と、８５０℃〜９００℃の（H2＋O2）雰囲気中で所定
時間アニール処理を行って上部酸化膜を形成する工程と
を導入したものである。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a method for forming a capacitor insulating film, comprising reacting reactive gases SiH 2 Cl 2 and NH 3 at a low temperature of 550 ° C. to 650 ° C. A process for forming an ultra-thin LPCVD-Si 3 N 4 and a process for forming an upper oxide film by performing an annealing process in a (H 2 + O 2 ) atmosphere at 850 ° C. to 900 ° C. for a predetermined time are introduced. is there.
【００１０】[0010]
【作用】この発明によれば、キャパシタ絶縁膜の形成方
法において、以上のような工程を導入したので、ＬＰＣ
ＶＤ−Si3N4 の成膜温度を５５０℃〜６５０℃まで下げ
ることにより、膜形成直後の状態での膜質はあえてター
ミナルＨの多い化学的に不完全な膜として極薄アモルフ
ァス膜とし、厚膜フィルムから極薄フィルムの形状に近
づけ、耐酸化性を向上させ、上記酸化膜の酸化条件を弱
めずに、８５０℃〜９００℃の（H2＋O2）中でアニール
処理を行うことにより、上部酸化膜を形成でき、したが
って、前記問題点を除去できる。According to the present invention, the above-described steps are introduced in the method of forming a capacitor insulating film.
By lowering the film forming temperature of VD-Si 3 N 4 to 550 ° C. to 650 ° C., the film quality immediately after the film formation is intentionally changed to a very thin amorphous film as a chemically incomplete film having many terminals H, and By performing the annealing treatment in (H 2 + O 2 ) at 850 ° C. to 900 ° C. without reducing the oxidation conditions of the oxide film, by approaching the shape of the film to the shape of the ultrathin film to improve the oxidation resistance, An upper oxide film can be formed, and thus the above problem can be eliminated.
【００１１】[0011]
【実施例】以下、この発明のキャパシタ絶縁膜の形成方
法の実施例について説明する。この発明により形成され
るキャパシタ絶縁膜は、下部酸化膜／ＬＰＣＶＤ−Si3N
4 膜上部酸化膜の３層膜であり、この発明に適用される
装置には、より下部酸化膜を薄くできる縦型ＬＰＣＶＤ
炉を用いている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the method for forming a capacitor insulating film according to the present invention will be described below. The capacitor insulating film formed according to the present invention is a lower oxide film / LPCVD-Si 3 N
The device applied to the present invention is a vertical LPCVD which can make the lower oxide film thinner.
A furnace is used.
【００１２】この縦型ＬＰＣＶＤ炉内にウエハを入れる
ときに、すでに、ウエハの表面には、下部酸化膜として
極薄の自然酸化膜が形成されている。この自然酸化膜上
にＬＰＣＶＤ−Si3N4 膜を縦型ＬＰＣＶＤ炉内で形成す
る。この場合、SiH2Cl2 １０〜１００sccm、NH3 ５０〜
５００sccmを流し、反応温度６００℃、反応圧力0.１０
Torr〜0.４０Torrで５０ÅのSi3N4 膜を形成する。この
時の成膜速度は、0.５Å／分程度である。このＬＰＣＶ
Ｄ−Si3N4 膜の形成に際し、成膜温度を６００℃を中心
とする５５０℃〜６５０℃にすることにより、膜形成直
後の膜質は犠牲にして、極薄アモルファス膜としての形
状を島状フィルムから極薄フィルムに近づけることによ
り、耐酸化性を向上し、〜５０ÅレベルのＬＰＣＶＤ−
Si3N4 膜に対しても、後述する上部酸化条件を弱めるこ
となく形成できる。When a wafer is put into this vertical LPCVD furnace, an extremely thin natural oxide film is already formed on the surface of the wafer as a lower oxide film. An LPCVD-Si 3 N 4 film is formed on this natural oxide film in a vertical LPCVD furnace. In this case, SiH 2 Cl 2 10 to 100 sccm, NH 3 50 to
Flow 500 sccm, reaction temperature 600 ° C, reaction pressure 0.10
A 50 ° Si 3 N 4 film is formed at Torr to 0.40 Torr. The deposition rate at this time is about 0.5 ° / min. This LPCV
Upon D-Si 3 N 4 film formed by a 550 ° C. to 650 ° C. centered at 600 ° C. The deposition temperature, film quality immediately after the film formation at the expense, the island shaped as ultrathin amorphous film Oxidation resistance is improved by bringing the film closer to the ultra-thin film, and LPCVD-
A Si 3 N 4 film can also be formed without weakening upper oxidation conditions described later.
【００１３】なお、６００℃よりも下げると、あまりに
も成長レートが小さくなり、スループット的に問題があ
り、さらに、温度を５５０℃以下にすると、SiH2Cl2 ＋
NH3 を材料ガスとする通常のＬＰＣＶＤ法では、Si3N4
形成反応がほとんど進まなくなり、結局５５０℃〜６５
０℃の温度が最適となる。[0013] Incidentally, lower than 600 ° C., even growth rate is reduced too, there is a problem with throughput manner, Further, when the temperature 550 ° C. or less, SiH 2 Cl 2 +
In a normal LPCVD method using NH 3 as a material gas, Si 3 N 4
The formation reaction hardly progressed, and eventually 550 ° C. to 65 ° C.
A temperature of 0 ° C. is optimal.
【００１４】次に、上記ＬＰＣＶＤ−Si3N4 膜の成長後
に、上部酸化膜をアニールにより形成するわけである
が、この上部酸化条件は例えば８５０℃で、（H2／O2）
雰囲気中で３０分間アニールでよい。８５０℃で（H2＋
O2）雰囲気中で３０分アニールすることによる上部酸化
（ヒーリング酸化）条件の下での薄膜化限界の成膜温度
依存を図１に示す。Next, after the LPCVD-Si 3 N 4 film is grown, an upper oxide film is formed by annealing. The upper oxidation condition is, for example, 850 ° C. and (H 2 / O 2 ).
Annealing may be performed in an atmosphere for 30 minutes. At 850 ° C (H 2 +
FIG. 1 shows the film forming temperature dependence of the limit of thinning under the condition of upper oxidation (healing oxidation) by annealing in an O 2 ) atmosphere for 30 minutes.
【００１５】この図１中の「△」印は７００℃、0.１０
Torr、３０／３０sccmデポジット膜、「○」印は６５０
℃、0.１０Torr、３０／３０sccmデポジット膜、「▽」
印は６００℃、0.１０Torr、３０／３０sccmデポジット
膜の場合をそれぞれ示しており、たとえば、７００℃デ
ポジット膜だと４０〜４５Å以下で異常酸化を起こして
いる。また、７００℃→６５０℃→６００℃と成膜温度
を下げる程異常酸化を起こして、膜厚増分が著しく増加
する薄膜化限界が下がることがわかる。つまり、成膜温
度が低い程薄膜化でき異常酸化を起こしにくい。In FIG. 1, the symbol “△” indicates 700 ° C., 0.10
Torr, 30 / 30sccm deposit film, "○" mark is 650
° C, 0.10 Torr, 30 / 30sccm deposit film, "▽"
The marks indicate the case of a deposit film of 600 ° C., 0.10 Torr, and 30/30 sccm, respectively. For example, in the case of a 700 ° C. deposit film, abnormal oxidation occurs at 40 to 45 ° or less. In addition, it can be seen that abnormal oxidation occurs as the film formation temperature is lowered from 700 ° C. to 650 ° C. to 600 ° C., and the thinning limit at which the increase in film thickness increases significantly decreases. In other words, the lower the film formation temperature, the thinner the film can be, and the less likely it is to cause abnormal oxidation.
【００１６】Si3N4 膜の耐酸化性がもつ薄膜化限界は下
地のポリシリコン電極の形成方法にも左右されるようで
あるが、４０KeV で８Ｅ１５cm-2Asをイオンインプラン
テーションし、N2雰囲気中で８５０℃３０分アニールし
たポリシリコン上においては、４５Åまでは６００℃で
成膜したSi3N4 の場合、耐酸化性をもつことが確認でき
ている（ヒーリング酸化後の酸化膜換算膜厚toxeff＝５
１Å、耐圧分布良好）。Although the oxidation resistance of the Si 3 N 4 film is considered to be dependent on the method of forming the underlying polysilicon electrode, the ion implantation of 8E15 cm −2 As at 40 KeV is carried out to obtain N 2. It has been confirmed that Si 3 N 4 formed at 600 ° C. up to 45 ° C. has oxidation resistance on polysilicon annealed at 850 ° C. for 30 minutes in an atmosphere (equivalent to oxide film after healing oxidation). Thickness toxeff = 5
1Å, good breakdown voltage distribution).
【００１７】[0017]
【発明の効果】以上、詳細に説明したように、この発明
によれば、反応ガスSiH2Cl2 とNH2 を成膜温度５５０℃
〜６５０℃で反応させることにより、ＬＰＣＶＤ−Si3N
4 膜を成膜することによって、表面の平坦性を向上させ
極薄膜の耐酸化性が向上し、その結果、上部酸化（ヒー
リング酸化）条件を弱めることなく、上部酸化膜の形成
が可能となり、電気特性的にも満足できる実効膜厚toxe
ff＝５０Åレベルの、ＬＰＣＶＤ−Si3N4 を用いたキャ
パシタ絶縁膜の作製が可能になる。As described in detail above, according to the present invention, the reaction gases SiH 2 Cl 2 and NH 2 are formed at a film forming temperature of 550 ° C.
By reacting at ~650 ℃, LPCVD-Si 3 N
By forming four films, the flatness of the surface is improved, and the oxidation resistance of the ultra-thin film is improved. As a result, the upper oxide film can be formed without weakening the upper oxidation (healing oxidation) conditions. Effective film thickness toxe that also satisfies electrical characteristics
It is possible to manufacture a capacitor insulating film using LPCVD-Si 3 N 4 at ff = 50 ° level.
【図１】この発明における耐酸化性からの薄膜限界の成
膜温度依存特性図。FIG. 1 is a graph showing a film forming temperature dependence characteristic of a limit of a thin film based on oxidation resistance in the present invention.
フロントページの続き (56)参考文献 特開 平２−273963（ＪＰ，Ａ) 特開 平２−186632（ＪＰ，Ａ)Continuation of the front page (56) References JP-A-2-27363 (JP, A) JP-A-2-186632 (JP, A)
Claims (1)
Cl2とNH3とを５５０℃〜６５０℃の範囲で反応させ窒化
膜をウエハ上に形成する工程と、 前記反応温度よりも高温の(H2＋O2)雰囲気中において、
所定時間アニール処理を行い前記窒化膜上に酸化膜を形
成する工程と、を含むことを特徴とするキャパシタ絶縁
膜の形成方法。In a low pressure CVD furnace, a reaction gas SiH 2
Forming a nitride film on the wafer by reacting Cl 2 and NH 3 in the range of 550 ° C. to 650 ° C., in a (H 2 + O 2 ) atmosphere higher than the reaction temperature,
Forming an oxide film on the nitride film by performing an annealing process for a predetermined time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP40466990A JP3325274B2 (en) | 1990-12-05 | 1990-12-05 | Method of forming capacitor insulating film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP40466990A JP3325274B2 (en) | 1990-12-05 | 1990-12-05 | Method of forming capacitor insulating film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04209536A JPH04209536A (en) | 1992-07-30 |
| JP3325274B2 true JP3325274B2 (en) | 2002-09-17 |
Family
ID=18514325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP40466990A Expired - Lifetime JP3325274B2 (en) | 1990-12-05 | 1990-12-05 | Method of forming capacitor insulating film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3325274B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3660391B2 (en) * | 1994-05-27 | 2005-06-15 | 株式会社東芝 | Manufacturing method of semiconductor device |
| JPH1174485A (en) | 1997-06-30 | 1999-03-16 | Toshiba Corp | Semiconductor device and manufacturing method thereof |
-
1990
- 1990-12-05 JP JP40466990A patent/JP3325274B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04209536A (en) | 1992-07-30 |
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