JP3325545B2 - Superconducting sigma-delta modulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sigma-delta modulator for a high-resolution superconducting A / D converter that converts an analog signal having a wide dynamic range into a digital signal.

[0002]

2. Description of the Related Art In various fields such as measuring instrument applications and wireless applications, the necessity of an AD converter (analog / digital converter) having a higher resolution (multiple bits), a higher speed, and a wider input band has been called out. At present, the increase in the number of bits of the AD converter is about 1.5 bits / 8 years, and it has not been possible to achieve a significant increase in resolution as an AD converter employing ordinary technology.

On the other hand, in the field of superconductivity, high-speed, wide-band, and high-resolution AD converters have been continuously developed by taking advantage of superconducting magnetic flux quantization, zero resistance, high-speed response, and the like. Research for the purpose of increasing the resolution has been actively conducted.

A superconducting sigma-delta A / D converter (US Pat. No. 5,140,324 “Superconducting sigma-
delta analog-to-digital converter ", US Patent 53
27130 "Spur-free sigma-delta modulator an
d multiple flux quanta feedback generator ”, J.
X. Przybysz et al. , IEEE Trans. on Appl. Superc
gnd. , Vol.3. No. 1 pp. 2732 ・ 2735.
1993) has been proposed and noted in the United States.

This is based on the following sigma-delta modulator (see FIG. 10). In other words, a sigma-delta modulator has an integration function (Σ (sigma)) and a differentiation function (Δ
(Delta)), and specifically,
As shown in FIG. 10, the sigma-delta modulator prepares a superconducting inductance element 1 having an inductance of Ls, and one end of the superconducting inductance element 1 has an R element.
One end of a resistance element 2 having a resistance value of s is connected, and the other end of the resistance element 2 is grounded (a current flowing through the inductance element 1 becomes an integrator output).
And two Josephson elements 3, each having one end connected to the other end of the inductance element 1 of the integrator.
4.

Each of the Josephson elements 3 and 4 is an over-damped Josephson element, the other end of the Josephson element 3 is a clock input terminal, and the other end of the Josephson element 4 is grounded. I have. A bias current is applied to the one end side of the inductance element 1,
In addition, the inductance element 1 is provided with one end side.
The configuration is such that an analog signal is applied.

A signal from an analog signal source is integrated by an integrator including a superconducting inductance element 1 and a resistance element 2 (a current flowing through the inductance element 1 is output from the integrator), and a comparison operation is performed by Josephson elements 3 and 4. Is performed.

Here, the Josephson devices 3 and 4 are devices having a characteristic that a voltage pulse is output when the applied current is larger than a threshold value.

Therefore, the Josephson elements 3 and 4 output a voltage pulse (digital value "1") if the received integrator output is larger than the threshold value, and output nothing (digital value "0") if smaller. ) At the same time (comparison operation), and at the same time, the single flux quantum (Φ0: corresponding to the above-described time integration of the voltage pulse) generated by the comparison operation is returned to the inductance element 1 so that the output of the integrator is obtained. Decrease by a fixed value ((Φ0 / Ls): 1 magnetic flux quantum).

That is, the sigma-delta modulator is composed of an integrator (a current flowing through the inductance becomes an integrator output) composed of a superconducting inductance Ls and a resistor Rs, and an overdamped Josephson element connected to the inductance. A comparison operation is performed by the Josephson element. If the comparison result is greater than the threshold value, a voltage pulse is output (digital value “1”), and if the comparison result is smaller than the threshold value, nothing is output (digital value “0”). This is a sigma-delta modulator in which the effect of reducing the output of the integrator by a constant value (Φ0 / Ls: 1 flux quantum) by a single flux quantum Φ0 generated by the operation is obtained by feedback.

Therefore, this sigma-delta modulator can be expressed as shown in FIG. 11 when shown in a block diagram. That is, as shown in FIG.
P, a delay element delay, and an adder +. The input analog signal is added to the comparison result of the comparator CMP, which is given via the delay element delay, by changing the sign in the adder + and added to the integrator Σ. The output is integrated, and the integrated output is applied to a comparator CMP for comparison. Then, the comparison result is sent to the adder + again via the delay element delay, added to the input analog signal as a negative component, and given to the integrator Σ.

The operation of sending the comparison result to the adder + via the delay element delay and adding it to the input analog signal as a negative component is a differentiation operation. In order to configure an AD converter using a sigma-delta modulator which is a modulator combining the integral operation and the differential operation, as shown in FIG. CM
It is necessary to provide a process of taking a moving average of the comparison result at P by a decimation filter and further thinning out.

That is, sampling is performed by a sigma-delta modulator at a frequency much higher than the input signal frequency,
A very high rate modulator output of 1 [bit] is obtained, and a moving average is digitally obtained by a digital filter called a decimation filter, and the number of bits is calculated, for example.
Increase to 16 [bits]. Furthermore, the signal frequency 2
The normal AD conversion output is obtained by thinning out the data until the frequency becomes about twice.

An AD converter can be configured using a sigma-delta modulator, which is a modulator combining the integration operation and the differentiation operation. However, if an ideal sigma-delta modulator can be realized, high resolution (Multi-bit), a high-speed, wide input band AD converter can be realized.

However, a problem is that there is no ideal integrator used for the sigma-delta modulator.

To this end, as shown in FIG. 10, a low-pass filter using an inductance element and a resistance element and having a time constant of Ls / Rs is used as an integrator.

Therefore, the integrator roughly forgets information before the time constant and is not integrated.

That is, at present, in the case of a sigma-delta modulator, the input analog signal and the clock signal to be AD-converted must have a frequency sufficiently higher than the time constant of Ls / Rs.

In the case of a sigma-delta modulator using an integrator having such a leak (leakage), the quantization noise level is lower than that of a sigma-delta modulator using an integrator having no leak. In general, as the oversampling ratio increases, the signal / noise ratio (S / N ratio) increases as the oversampling ratio increases, and the number of conversion bits increases. Resulting in.

In addition, in the case of a sigma-delta modulator using an integrator having a leak (leakage), it is also known that an AD converter configured using the integrator has poor linearity (for example, S R. Northworthy, R. Schreie
r, and G. C. Temmes, Eds. , De1ta-Sigma Data Conv
erters: Theory, Design and Simulation, Piscata
way, NJ: IEEE Press 1997, p13).

In addition to the simple first-order sigma-delta modulator using Ls and Rs, a second-order double-loop sigma-delta modulation having two integrators (US Pat. No. 5,198,881)
No. 5 “Two loop superconducting sigma-delta analog
−to-digital converters ”, JX Przybysz et a
l. , IEEE Trans. on Appl. Supercond. , Vol.5, p
p. 2248-2251, 1995. ) Has been proposed, but this also has a similar problem.

Further, a bandpass sigma-delta modulator for a passband signal using a resonator having inductance and capacitance instead of an integrator (US Pat. No. 534)
No. 1136 “Bandpass sigma-delta modulator for an
Although alog-to-digital converters ") have been proposed, in this method, an increase in the amount of feedback has been a problem in order to increase the resolution.

[0023]

If an AD converter using a sigma-delta modulator using superconducting technology can be realized, a high-resolution (multi-bit), high-speed, wide input band AD converter can be obtained. However, since the sigma-delta modulator does not have an ideal integrator, a low-pass filter having a time constant of Ls / Rs is used instead as an integrator.

Therefore, in this integrator, information before the time constant is not correctly integrated, resulting in an integrator having a leak.

Therefore, the input analog signal to be subjected to AD conversion must have a frequency sufficiently higher than the time constant of Ls / Rs. In the case of a sigma-delta modulator using such a leaky integrator, the quantization noise level does not decrease on the low frequency side as compared with a sigma-delta modulator using a leakless integrator. Therefore, the higher the oversampling ratio, the higher the signal / noise ratio
While the (SN ratio) can be increased and the number of conversion bits increases, the SNR and the number of conversion bits saturate at some point. In addition, the linearity also deteriorates.

As described above, when an AD converter is configured using a sigma-delta modulator to which the superconducting technology is applied, the number of conversion bits (resolution) is increased due to the characteristics of the components of the current sigma-delta modulator. However, there is a problem that the linearity is degraded and the like, but there is no way to avoid this. That is, for this purpose, the reciprocal of the time constant Ls / Rs of the integrator may be designed to be sufficiently lower than the frequency of the input signal, or the feedback amount Φ0 / Ls may be increased.

However, there are restrictions on the values of the inductance Ls of the inductance element 1 and the resistance value Rs of the resistance element 2 which are constituent elements of the integrator. Therefore, it is necessary to increase Ls or decrease Rs. You can't do that.

Regarding the inductance Ls, when the current flowing through the inductance element 1 which is the output of the integrator is a digital output “1”, this is Φ by the Josephson element.
The feedback is reduced by 0 / Ls.

Therefore, the feedback amount Φ0 / L
The value of s must be kept larger than the thermal noise current generated by the shunt resistance of the over-damped Josephson element, which is a comparator, and the value of the inductance Ls cannot be increased unnecessarily. This is because if the current is not kept larger than the thermal noise current, the error rate of the comparator increases and the SN ratio deteriorates.

Thus, the inductance Ls cannot be increased unnecessarily (Φ0 / Ls> thermal noise current).

Here, the above-mentioned "over-damped Josephson element" refers to the McCumber coefficient βc calculated using the resistance of the Josephson element including the added shunt resistance and the like (for example, superconducting electronics by Hiroshi Hara). (Refer to page 34 of Ohmsha 1985) is about 1 or less and has no hysteresis in current-voltage characteristics.

FIG. 13A shows the element characteristics (current I-voltage V characteristics) of the overdamped Josephson element. Josephson devices have two very thin insulating layers.
An element having a junction (Josephson junction) made of two superconductors. In this Josephson junction, a superconducting current flows through the junction even without an externally applied voltage due to a tunnel effect (DC Josephson effect). When a small DC bias is applied to the junction, an AC Josephson effect occurs, and the current flowing through the junction becomes AC.

FIG. 13A having no hysteresis characteristics
A current-voltage characteristic as shown in FIG. 13 is an over-dump type Josephson element, and an under-dump type Josephson element having hysteresis characteristics as shown in FIG. 13B.

In the present invention, the term "over-dump type" or "under-dump type" refers to a single Josephson element (or a shunt resistor).
It should be noted that when incorporated into a circuit, the overall current-voltage characteristics will naturally change.

If the value of the feedback amount Φ 0 / Ls is not kept larger than the thermal noise current generated by the shunt resistor of the over-dampened Josephson device, the error rate of the comparator increases, Since the SN ratio deteriorates, the value of the inductance Ls cannot be increased.

Therefore, Ls must be determined in a range where the feedback amount Φ0 / Ls is within the range of Φ0 / Ls> thermal noise current.

On the other hand, the resistance value Rs cannot be unnecessarily reduced due to the interface resistance of the superconductor / resistor, the limitation of the geometric size (for suppressing the stray impedance at high frequencies), the loss of the comparator, and the like.

Therefore, an AD converter using a sigma-delta modulator which has a high resolution (multiple bits), a high speed, and a wide input band has not been realized at present.

Therefore, an object of the present invention is to make it possible to greatly ease the restriction that the inductance Ls cannot be increased, to increase the resolution (to increase the number of bits),
An object of the present invention is to provide a sigma-delta modulator capable of achieving high speed and wide input bandwidth.

[0040]

In order to achieve the above object, the present invention is configured as follows.

[1] First, an integrator composed of an inductance element to which a resistance element or a capacitance element is connected, and a Josephson element that is over-damped, and an output from the inductance element of the integrator is provided. A comparator for performing a comparison operation in synchronization with a clock signal by using the pulse generation operation characteristic of the Josephson device as a comparison operation by applying the pulse generation operation characteristic to the Josephson device. In a superconducting sigma-delta modulator in which the magnetic flux quantum generated from the Josephson element uses the effect of reducing the current of the inductance element by a constant value as feedback, the latter part of the Josephson element constituting the comparator To a DC-biased Josephson transmission line. At the same time, the Josephson transmission line is such that at least one of the Josephson elements constituting the Josephson transmission line is an under-damped Josephson element, and the magnetic flux quantum generated in the Josephson transmission line is described above. It is characterized in that feedback is provided.

In such a configuration, an analog signal is integrated by an integrator, and the integrated signal is compared by a comparator. The Josephson element has a characteristic of outputting a voltage pulse when the applied current is larger than the threshold value Ic. Then, the Josephson element outputs a voltage pulse (digital value “1”) if the received integrator output is larger than the threshold value, and outputs nothing (digital value “0”) if the received integrator output is smaller than the threshold value (digital value “0”). Comparison operation).

According to the present invention, a single magnetic flux quantum generated by the comparison operation of the Josephson element is fed back to the integrator, and the magnetic flux quantum generated by the Josephson element of the Josephson transmission line is integrated with the integrator. Feedback to the inductance element.

In the present invention, at least one of the Josephson elements constituting the DC-biased Josephson transmission line at the subsequent stage of the comparator is an under-damped Josephson element, and the others are ordinary Josephson elements. Element (over-damped Josephson element). With this configuration, when the voltage pulse generated by the Josephson element constituting the comparator reaches the Josephson transmission line, the flux quantum generated by the pulse current associated with the voltage pulse flowing through the Josephson transmission line is: Be more than one. With the configuration in which the plurality of magnetic flux quanta is fed back, the amount of feedback which has conventionally been small can be increased in the present invention. With such a configuration, a plurality of flux quanta can be collectively fed back for each comparison operation when the current value is equal to or larger than the threshold value.

[2] Secondly, it is composed of a first integrator including a resistance element and an inductance element, and an over-damped Josephson element, and the output from the inductance element of the first integrator. To the Josephson element to use the pulse generation operation characteristic of the Josephson element as a comparison operation, comprising: a comparator that performs a comparison operation in synchronization with a clock signal. In a superconducting sigma-delta modulator in which the flux quantum generated from the Josephson element by operation uses the effect of reducing the current of the inductance element by a constant value as feedback, a resistor is provided before the first integrator. At least one set of a second integrator comprising an element and an inductance element via a Josephson element A DC-biased Josephson transmission line is connected to the subsequent stage of the Josephson element constituting the comparator, and the Josephson transmission line is one of the Josephson elements constituting the Josephson transmission line. The at least one Josephson element is an under-damped Josephson element, and the magnetic flux quantum generated in this Josephson transmission line is fed back to the inductance element of the first integrator, and the inductance element of the second integrator is Is characterized in that feedback is provided via a Josephson junction of a Josephson element connected between the first and second integrators.

In such a configuration, the analog signal is integrated by the integrator, and the integrated signal is compared by the comparator. The Josephson element has a characteristic of outputting a voltage pulse when the applied current is larger than the threshold value Ic. Then, the Josephson element outputs a voltage pulse (digital value “1”) if the received integrator output is larger than the threshold, and outputs nothing (digital value “0”) if smaller than the threshold. do.

According to the present invention, a single magnetic flux quantum generated by the comparison operation of the Josephson element is fed back to the integrator, and the magnetic flux quantum generated by the Josephson element of the Josephson transmission line is integrated with the integrator. Feedback to the inductance element.

According to the present invention, at least one of the Josephson elements constituting the Josephson transmission line at the subsequent stage of the comparator is an under-damped Josephson element, and the other is a normal Josephson element (over-damping). Josephson device). With this configuration, when the voltage pulse generated by the Josephson element constituting the comparator reaches the Josephson transmission line, the flux quantum generated by the pulse current associated with the voltage pulse flowing through the Josephson transmission line is: Be more than one. The plurality of magnetic flux quanta are configured to be fed back, and further, the configuration is configured to be fed back via a Josephson element connected between the first integrator and the second integrator. Therefore, this makes it possible to increase the amount of feedback, which was conventionally small, many times in the present invention.
Then, with such a configuration, for each comparison operation,
When the current value is equal to or larger than the threshold, a plurality of magnetic flux quanta can be fed back together.

[3] Thirdly, it is composed of an integrator composed of a capacitance element and an inductance element which form a resonance circuit together with the inductance, and a Josephson element which is over-damped, and A comparator that uses a pulse generation operation characteristic of the Josephson element as a comparison operation by providing an output to the Josephson element, and performs a comparison operation in synchronization with a clock signal. In a superconducting sigma-delta modulator, wherein the effect that a magnetic flux quantum generated from the Josephson element by operation reduces the current of the inductance element by a constant value is used as feedback, the integrator includes a resistance element and a Josephson element. Is provided at the input stage, and the comparator is A DC-biased Josephson transmission line is connected to the subsequent stage of the formed Josephson element, and at least one of the Josephson elements constituting the Josephson transmission line is a Josephson element. An under-damped Josephson element, the magnetic flux quantum generated in the Josephson transmission line is fed back to the inductance element of the integrator, and is fed back via the Josephson junction of the Josephson element at the input stage of the integrator. It is characterized by having a configuration.

In such a configuration, the analog signal is filtered by the integrator by the resonance circuit and integrated, and the integrated signal is compared by the comparator. The Josephson element has a threshold current Ic
When it is larger, a voltage pulse is output. The Josephson element outputs a voltage pulse when the received integrator output is larger than the threshold (digital value “1”), and outputs nothing when the received integrator output is smaller than the threshold (digital value “0”).
Is performed.

According to the present invention, a single magnetic flux quantum generated by the comparison operation of the Josephson element is fed back to the integrator, and the magnetic flux quantum generated by the Josephson element of the Josephson transmission line is integrated with the integrator. Feedback to the inductance element.

In the present invention, at least one of the Josephson elements constituting the Josephson transmission line at the stage following the comparator is an under-damped Josephson element, and the other is a normal Josephson element (over-damping). Josephson device). With this configuration, when the voltage pulse generated by the Josephson element constituting the comparator reaches the Josephson transmission line, the flux quantum generated by the pulse current associated with the voltage pulse flowing through the Josephson transmission line is: Be more than one. The plurality of magnetic flux quanta are configured to be fed back as described above, and further, are configured to be fed back via a Josephson element connected in front of the integrator. Therefore, by this,
The small feedback amount can be increased many times in the present invention. With such a configuration, a plurality of flux quanta can be collectively fed back for each comparison operation when the current value is equal to or larger than the threshold value.

That is, the present invention relates to [1], [2],
[3] In any configuration, the present invention relates to a sigma-delta modulator in which a filter including an inductance element and a resistance element to which superconducting technology is applied is used as an integrator, and the sigma-delta modulation in which the inductance Ls cannot be increased conventionally. The limitation of the vessel is the inductance Ls
Focusing on this problem, the problem is that the feedback amount Φ0 / Ls
Paying attention to the fact that is small, that is, one magnetic flux quantum (Φ 0) has a small value, and this is solved by adopting a configuration that increases this.

In other words, increasing the small feedback amount, that is, making the unit of the feedback amount an integral multiple of the magnetic flux quantum (nΦ0) and increasing the feedback unit of Φ0 by n times, and increasing the feedback amount, The restrictions can be lifted.

Therefore, the present invention has a configuration in which the feedback amount can be increased.

In order to increase the amount of feedback, an RSFQ (Rapid Single Flux Quantum) Josephson transmission line downstream of the comparator is connected to a Josephson line (quantization magnetic flux pair generation circuit) in which an under-damped Josephson element is inserted. The configuration is replaced. This way,
When a single flux quantum (pulse) from the Josephson element of the comparator reaches the Josephson element of the under-damping, the Josephson element of the under-damping is switched, and the single-flux quantum is switched for a certain time due to the influence of the capacitance of the junction. The voltage state is maintained while continuously generating a magnetic flux quantum (SFQ) pair (a pair of SFQs whose magnetic flux directions are opposite to each other).

Therefore, the magnetic flux quantum generated by one comparison operation can be doubled in this (magnetic flux quantum pair generation).

By causing the flux quanta generated here to also feed back to one conventional feedback, a plurality of flux quanta are fed back, and the amount of feedback is n times larger than in the conventional example. (N> 1).

As a result, the value of the inductance is increased by n times,
The time constant can be increased by n times.

In the case of a bandpass sigma-delta modulator, n-fold feedback is possible unless the inductance is changed.

Further, since it is an integral multiple of Φ 0, it is an amount calculated only from physical constants from Φ 0 = h / 2e (h: Planck constant, e: electron elementary charge).
It does not mean that the accuracy of the feedback is lower than in the prior art.

Therefore, according to the present invention, the inductance component Ls of the integrator, which is a factor that hinders the realization of the AD converter that achieves high resolution (multiple bits), high speed, and wide input bandwidth by the sigma delta modulator, is large. The sigma-delta modulator that can greatly improve the resolution (multiple bits), increase the speed, and increase the input bandwidth can be obtained by greatly relaxing the restriction that the sigma-delta modulator cannot be used.

[0063]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(Basic Configuration of the Present Invention) In a sigma-delta modulator in which a filter including an inductor and a resistor to which superconducting technology is applied is used as an integrator, the limitation of the conventional sigma-delta modulator that the inductance Ls cannot be increased. Focusing on the inductance Ls, this problem can be considered to be caused by a small feedback amount Φ0 / Ls, that is, a small value of one magnetic flux quantum (Φ0).

This means that the problem can be solved by increasing the small feedback amount, that is, by setting the unit of the feedback amount to an integral multiple (nΦ0) of the magnetic flux quantum.

In the present invention, focusing on this point, Φ0
In such a case, the unit of feedback is increased by n times.

In order to increase the feedback amount, the present invention is configured as shown in FIG.
As shown in FIG. 1, also in the present invention, a low-pass filter using a superconducting inductance element 1 and a resistance element 2 and having a time constant of Ls / Rs, and an integrator connected to the inductance element 1 of the integrator. It is composed of over-damped Josephson elements 3 and 4. The Josephson element performs a comparison operation, and the generated flux quantum Φ0 is fed back to the inductance element 1 of the integrator to reduce the output of the integrator by a fixed value. The configuration is adopted.

Then, a delay means 10 for delaying the clock input, a flux quantum pair generating circuit 20 for increasing the flux quantum input from the inductance element 1 of the integrator n times and outputting the same, and a delay of the delay means 10 And an RS flip-flop 30 for operating with the output clock and converting a plurality of voltage pulses (corresponding to magnetic flux) output from the flux quantum pair generation circuit 20 into one. .

The delta-sigma modulator type A having the configuration of FIG.
The D converter gives the comparator output (the output of the Josephson element 4) to the flux quantum pair generation circuit 20, where it is n
This is doubled, and this is given to the RS flip-flop 30 and held. Once the RS flip-flop 30 is set, the state does not change no matter how many times the set input is input until it is reset.
Even when the output is a large number of voltage pulses (corresponding to magnetic flux), only the information that it has been set is held, and the clock signal for sampling is destructively read out by applying a predetermined delay by the delay means 10 (reset operation). ), And outputs the held information (“1”). If there is no set input, no output is made ("0").

The magnetic flux pair generation circuit 20 has a configuration as shown in FIG. 1B, and is composed of an RSFQ Josephson transmission line. As shown in the drawing, the RSFQ Josephson transmission line is composed of three Josephson elements 20a, 20b, and 20c, one end of which is grounded, and the other end of which is connected to the middle of the signal line at a required interval. The ladder has a ladder connection structure (ladder-type connection structure), which is not shown in the figure, but is normally DC biased.

The three Josephson devices 20a, 20b,
Reference numeral 20c denotes a structure in which a magnetic flux passing through the Josephson junction is formed on the substrate so as to pass through the Josephson junction of the adjacent Josephson element including the Josephson element 4 of the comparator. Is an over-damping type Josephson element, and 20b is an under-damping type Josephson element.

Therefore, when a single flux quantum (pulse) from the Josephson element of the comparator reaches the under-damped Josephson element 20b, the under-damped Josephson element switches and the Josephson junction The configuration is such that a voltage state is maintained while a single flux quantum (SFQ) pair continues to be generated for a certain time due to the influence of the capacitance of the portion.

An RSFQ Josephson line having such a configuration is described. The Josephson line in which a part of the internal junction is replaced by an under-damping type Josephson element is a quantization magnetic flux in this embodiment. Construct a pair generation circuit.

The sigma-delta modulator of the present invention has a structure using a filter configuration of a superconducting inductance element 1 and a resistance element 2 as an integrator. This follows the structure of FIG. 10 shown as a conventional example. I have. That is, FIG.
As described with reference to FIG. 0, one end of the resistance element 2 having a resistance value of Rs is connected to one end of the superconducting inductance element 1 having an inductance of Ls.
Employs an integrator (the current flowing through the inductance element 1 becomes an integrator output) having a configuration grounded to the other end. Further, two Josephson elements 3 and 4 each having one end connected to the other end of the inductance element 1 of the integrator are provided.

Each of the Josephson elements 3 and 4 is an over-damping type Josephson element. The other end of the Josephson element 3 is a clock input terminal, and the other end of the Josephson element 4 is grounded. ing.

Further, an analog signal which is a signal to be subjected to AD conversion is applied to the inductance element 1 from the one end side as a current signal. Further, a DC bias current from a bias current source Ibs is applied to the one end side of the inductance element 1 so that even if an input analog signal becomes negative, a negative area analog signal current may flow through the inductance element 1. I do not have it.
Thus, the Josephson elements 3 and 4 constituting the comparator are prevented from operating in the negative region.

The signal is integrated by an integrator including a superconducting inductance element 1 and a resistance element 2 (a current flowing through the inductance element 1 is output from the integrator), and every time a clock signal is input to a clock input terminal, a Josephson signal is output. The comparison operation is performed by the elements 3 and 4.

As described above, the Josephson element has a characteristic that a voltage pulse is output when the applied current is larger than the threshold value. And Josephson element 3,
At 4, the operation of outputting a voltage pulse (digital value "1") when the received integrator output is larger than the threshold value, and outputting nothing (digital value "0") when it is smaller than the threshold value (comparison operation). Also in the present invention, for the Josephson element 4, the single flux quantum (Φ0:
(Corresponding to the above-described time integration of the voltage pulse) is returned to the inductance element 1. For this reason, the effect of reducing the output of the integrator by a fixed value ((Φ0 / Ls): 1 magnetic flux quantum) is obtained as in the prior art.

In the present invention, the RSFQ Josephson transmission line provided after the comparator is provided in the Josephson line (quantized magnetic flux pair generation circuit 20) in which an under-damping type Josephson element is inserted. When a single flux quantum (pulse) arrives from the Josephson element constituting the comparator at the under-damped Josephson element, the under-damped Josephson element in the quantized magnetic flux pair generation circuit 20 is generated. Switch, and maintain a voltage state while continuing to generate a single flux quantum (SFQ) pair for a certain time due to the influence of the capacitance of this junction.

Therefore, the magnetic flux quantum generated by one comparison operation can be doubled in this (magnetic flux quantum pair generation).

That is, in the present invention, while the feedback from the comparator to the superconducting inductance element 1 is one flux quantum in the conventional configuration, in addition to this, a flux quantum pair generation circuit is additionally provided. By feeding back the flux quanta generated in step 20, a plurality of flux quanta are fed back, and the feedback amount can be made n times (n> 1) of the conventional example.

As a result, the value of the inductance is multiplied by n,
The time constant can be increased by n times.

Therefore, in the case of a sigma-delta modulator having a configuration in which a band-pass filter is used for an integrator, if the inductance is the same, an under-damping Josephson element is inserted as in the present invention. By using the Josephson line to take out the output of the comparator, the Josephson transmission line functions as the quantized magnetic flux pair generation circuit 20, so that n times the conventional feedback is possible.

Further, since the feedback amount is a magnetic flux quantum that is an integral multiple of the magnetic flux quantum Φ 0, it can be calculated only from the physical constants in view of Φ 0 = h / 2e (h: Planck constant, e: electron elementary charge). The amount
The accuracy of the feedback is not worse than in the prior art.

In this case, the output is also 1
In the case of a one-output mode with respect to the sampling clock, n voltage pulses are output, which is caused by an RSFQ (Rapid Single Flux Quantum) logic circuit (KK Likharev et al., IEEE Trans.on S
upercond. , Vol. 1, pp. The output is converted into a maximum of one pulse per sampling clock by using the RS flip-flop of 3-28.1991), so that the output can be digitally processed by a normal RSFQ logic circuit. .

The basic part of the present invention has been described above. By connecting the quantized magnetic flux pair generation circuit 20 through the buffer gate of the RSFQ, it is possible to output a large number of Φ0s with respect to the Φ0 input. (Φ0 does not return to the input due to the buffer circuit), and feedback using this is also possible.

The basic form of the present invention has been described above. Next, a specific configuration example will be described.

(Embodiment 1) FIG. 2 shows a configuration diagram of a 4Φ0 feedback (n = 4) primary sigma delta modulator. In FIG. 2, 1 is a superconducting inductance element having an inductance of Ls, and 2 is a resistance element having a resistance value of Rs, and these constitute an integrator (Ls / Rs integrator) using the filter in FIG. . Reference numerals 3 and 4 denote overdamping-type Josephson elements, which constitute the comparator in FIG. 20
a, 20b and 20c are Josephson elements, and 20a
20c and 20c are over-damping type Josephson elements. By connecting a resistor in parallel with the Josephson junction, an over-damping type Josephson element having no hysteresis characteristics is obtained. Reference numeral 20b denotes an under-damping type Josephson element, and a magnetic flux formed by a Josephson transmission line biased with DC only, which is configured by ladder-connecting the Josephson elements 20a to 20c to a series circuit of inductance elements. It is a pair generation circuit. The resistor inserted in parallel with the inductance element in the Josephson transmission line is a stabilizing resistor. When a magnetic flux pulse arrives, a magnetic flux pulse is induced in the magnetic flux pair generation circuit constituted by the Josephson transmission line, but by increasing the number of induced pulses by giving some Josephson elements a large hysteresis characteristic. Relaxation is ensured so that magnetic flux pulse generation is converged in a certain time. Gck is a pulse generation source, and DC / SFQ is a means for converting a clock pulse signal generated by the pulse generation source Gck into a single magnetic flux quantum (voltage pulse).
UF is a selection means for passing the converted magnetic flux pulse only in one direction. The magnetic flux pulse obtained through the selection means is used as a clock input of the comparator. A splitter SP for splitting the magnetic flux pulse into two is provided at a stage preceding the selecting means BUF, and the magnetic flux pulse split by the splitter SP is input to the reset terminal of the RS flip-flop 30 via the Josephson transmission line JTL. . The Josephson transmission line JTL functions as a transmission line for the magnetic flux pulse and also functions as a delay element. The RS flip-flop 30 plays the role of taking in the output of the magnetic flux pair generation circuit 20 and outputting it.

In this configuration, an analog signal which is a signal to be AD-converted is input to a Ls / Rs integrator together with a bias input, and an inductance L which is an output of the integrator is provided.
The current flowing through s flows into the over-damping type Josephson devices 3 and 4 which are comparators.

On the other hand, the clock pulse is generated by a clock oscillation source Gck, which is an external oscillator, and is a pulse (single flux quantum (SFQ) pulse, single flux quantum (SFQ) pulse, accompanied by a magnetic flux having a short width in the DC / SFQ circuit of the RSFQ logic circuit family. The magnetic flux is converted to a magnetic flux quantum Φ0) and flows as a current into the Josephson elements 3 and 4 constituting the comparator.

When the sum of the output of the integrator, the bias current, and the pulse current exceeds the critical current Ic of the junction, an SFQ pulse pair (single magnetic flux quantum pair) having magnetic fluxes in opposite directions is generated. The SFQ pulse pair moves left and right separately by the Lorentz force generated thereby. At this time, the SFQ pulse which has moved to the left subtracts the current of Φ0 / Ls from the current (integrator output) flowing through the inductance element 1 (feedback).

At the same time, when the SFQ pulse toward the right reaches the under-dumped Josephson element 20b in the Josephson transmission line constituting the magnetic flux pair generation circuit 20, the element is switched to a voltage state.

Since the Josephson element 20b is under-dumped, the capacitance component of the element is effective, and the voltage is maintained for a while. In the held state, a pair of SFQ pulses with magnetic flux quanta continues to be generated in the same manner as described above, and when it is generated, one moves to the right and the other moves to the left.

The time during which this voltage is maintained can be controlled by the resistances added in parallel to the left and right inductances L1 and Lr of the under-damped Josephson element 20b, the bias current, and the inductance for stabilization.

Here, the design is made to be three.
In this way, the SFQ pulse generated and moved by this element, which moves to the left, passes through the Josephson element which operates as a comparator, and subtracts the current of Φ0 / Ls from the output of the integrator as before.

Accordingly, the number of the SFQ pulse pairs generated by the under-dumped Josephson device and the number obtained by adding the first one, here, four flux quanta φ 0 are obtained through Ls.
This means that 4Φ0 / Ls has been fed back.

At this time, the SFQ pulse from the under-dumped Josephson device 20b to the right (4
) Arrive at the RS flip-flop 30, but the first SFQ pulse is captured by the RS flip-flop 30 that is reset by the clock input, but the second to fourth SFQ pulses are not captured, so that they are removed. As a result, one SFQ pulse is output from the RS flip-flop 30 ("1").

The sum of the output of the Ls / Rs integrator, the bias current, and the pulse current is the critical current Ic of the junction.
Does not occur, the SFQ pulse pair is not generated, and the clock pulse is discarded at the junction on the Josephson element 3 side of the comparator Josephson elements 3 and 4.

As a result, no SFQ pulse is output,
The digital output becomes "0".

FIG. 3 shows the result of the above simulation performed by a circuit simulator. In this case, a constant voltage is used as an input, but when the output of the integrator (inductance current) increases and exceeds a threshold value, the above-described operation occurs, and four SFQ pulses are generated at the output of the comparator to generate a magnetic flux. It can be seen that four quantum Φ0s are fed back and the output of the integrator is reduced by a constant value.

Thus, the sigma-delta operation can be realized with the output of the integrator kept at a constant value around the threshold value. In this case, a value of ± 20 [%] was obtained from the simulation for the operation margin. Furthermore, in simulation, compared with the conventional case of feedback of one flux quantum Φ0,
The SN ratio was improved by 18 [dB] (corresponding to 3 bits).

Although the case of 4Φ0 is shown here, the present invention enables feedback of an integral multiple of Φ0. Also, between the Josephson line including the under-dumped junction and the Josephson element forming the comparator,
It is also possible to insert an RSFQ circuit that does not include a buffer.

Further, by using a Josephson line including two or more under-dumped junctions, it is possible to feed back a larger number of magnetic flux quantities Φ 0.

In the above, in the sigma-delta modulator in which a filter composed of an inductance component and a resistance component to which the superconducting technology is applied is used as an integrator, the inductance Ls cannot be increased. The feedback amount Φ0 / Ls for reducing the magnetic flux by returning to
That is, one magnetic flux quantum (Φ0) has a small value, which means that the small feedback amount is increased, that is, the unit of the feedback amount is an integral multiple of the magnetic flux quantum (nΦ0). Since it can be solved by adopting a configuration that makes it possible to reduce the feedback amount to nΦ0 by a flux quantum pair generation circuit with a Josephson transmission line in which a Josephson element is mixed with an over-damping type and an under-damping type Josephson element, and the feedback amount is n
It employs a configuration that doubles. And high resolution (multi-bit), high speed,
The restriction that the inductance component Ls of the integrator, which is a factor that hinders the realization of the wide input band AD converter, is greatly relaxed, and the resolution (multi-bit), the speed, and the wide input band are increased. It is possible to provide an AD converter using a sigma-delta modulator that can be achieved.

The above is an example in which a low-pass filter composed of a resistor and an inductance is used as an integrator. In this case, there is a feature that SN in a low frequency region is improved.
There is a feature that high resolution (multiple bits), high speed, and wide input bandwidth can be achieved for an analog signal to be converted in an area where the analog signal is relatively low.

On the other hand, the SN is improved with respect to a high frequency, and high resolution (multiple bits), high speed, and wide input band are achieved for an analog signal to be AD-converted in a relatively high region. We need to be able to do things. Therefore, an example will be described below in which the resolution of an analog signal to be AD converted is relatively high, and high resolution (multiple bits), high speed, and wide input bandwidth can be achieved.

In this example, an example in which an n-fold flux quantum Φ0 can be fed back to the inductance of the integrator constituting the sigma-delta modulator will be basically described as a second embodiment.

Embodiment 2 FIG. 4 shows a configuration example of a bandpass sigma-delta modulator using the present invention. Example 1
The only difference is that the integrator is replaced by a resonator 50 including a resistance element 51, a superconducting inductance element 52, and a capacitor 53, and AD conversion for a passband signal is possible.

That is, when a resonator is formed, an input analog signal cannot pass unless its frequency band corresponds to the resonance frequency band of the resonator. Therefore, when the frequency band corresponds to the resonance frequency band of the resonator, the analog signal input passes through this resonator and is compared with the comparators by the Josephson devices 3 and 4, and when the input exceeds the critical current Ic, Generates a magnetic flux pulse and feeds it back to the superconducting inductance element 52.

On the other hand, as in the first embodiment, the clock pulse is generated by the clock oscillation source Gck, which is an external oscillator, and
In the DC / SFQ circuit of the SFQ logic circuit family, the pulse is converted into a pulse with a short magnetic flux (single magnetic flux quantum (SFQ) pulse, the magnetic flux is equal to the magnetic flux quantum Φ0), and the Josephson element 3 constituting the comparator , 4 as current.

When the sum of the integrator output, the bias current, and the pulse current exceeds the junction critical current Ic, an SFQ pulse pair (single flux quantum pair) with magnetic fluxes in opposite directions is generated. The SFQ pulse pair moves left and right separately by the Lorentz force generated thereby. At this time, the SFQ pulse which has moved to the left subtracts the current of Φ0 / Ls from the current (integrator output) flowing through the inductance element 1 (feedback).

At the same time, when the SFQ pulse directed to the right reaches the under-dumped Josephson element 20b in the Josephson transmission line constituting the magnetic flux pair generation circuit 20, the element is switched to a voltage state.

Since the Josephson element 20b is under-dumped, the capacitance component of the element is effective, and the voltage is maintained for a while. In the held state, a pair of SFQ pulses with magnetic flux quanta continues to be generated in the same manner as described above, and when it is generated, one moves to the right and the other moves to the left.

The time for which this voltage is maintained can be controlled by the resistances added in parallel to the left and right inductances Ll and Lr of the under-damped Josephson element 20b, the bias current, and the inductance for stabilization.

Here, the design is made so that there are three pieces.
In this way, the SFQ pulse generated and moved by this element, which moves to the left, passes through the Josephson element which operates as a comparator, and subtracts the current of Φ0 / Ls from the output of the integrator as before.

Accordingly, the number of the SFQ pulse pairs generated by the under-dumped Josephson device and the number obtained by adding the first one, here, four flux quanta Φ 0, are obtained through Ls.
This means that 4Φ0 / Ls has been fed back.

At this time, the SFQ pulse from the under-dumped Josephson element 20b to the right (total 4
) Arrive at the RS flip-flop 30, but the first SFQ pulse is captured by the RS flip-flop 30 that is reset by the clock input, but the second to fourth SFQ pulses are not captured, so that they are removed. As a result, one SFQ pulse is output from the RS flip-flop 30 ("1").

The sum of the output of the Ls / Rs integrator, the bias current, and the pulse current is the critical current Ic of the junction.
Does not occur, the SFQ pulse pair is not generated, and the clock pulse is discarded at the junction on the Josephson element 3 side of the comparator Josephson elements 3 and 4.

In the band-pass sigma-delta modulator according to the present embodiment, since a resonator is used, only a band near the resonance frequency passes for an input analog signal and a feedback. Therefore, if the input is a signal of the resonance frequency, the current fed back to the inductance is fed back only a component near this resonance frequency, and cancels the AC input to operate the bandpass sigma delta that maintains a constant value in the AC. be able to.

Although the case of 4Φ0 is shown here, the present invention enables feedback of an integral multiple of Φ0. Also, between the Josephson line including the under-dumped junction and the Josephson element forming the comparator,
It is also possible to insert an RSFQ circuit that does not include a buffer, which is an element having a function of passing only flux quanta going in one direction and blocking others.

Further, by using a Josephson line including two or more under-dumped junctions, it is possible to feed back a larger number of flux quantums Φ 0.

As described above, by using a resonator in place of an integrator using a filter, high resolution (multi-bit) and high speed can be achieved by a sigma-delta modulator capable of dealing with a higher frequency region. Thus, it is possible to realize an AD converter capable of widening an input band.

The resonator 50 can be formed of a distributed constant circuit such as a superconducting microstrip line including a superconducting inductance element.

Next, an example in which a larger number of magnetic flux quanta Φ 0 can be fed back to the superconducting inductance element of the integrator will be described.

(Embodiment 3) FIG. 5 shows a configuration example of a sigma-delta modulator using a band-pass filter to which the present invention is applied.

In the third embodiment, the second embodiment is used.
Are different from the Josephson elements 3 and 4 for comparison operation.
In other respects, in addition to the configuration of the second embodiment, a large number (four in this case) of magnetic flux Φ 0 is fed back to the superconducting inductance element 52 of the resonator 50 in a path other than the above. Also, the capacitance element 53 and the superconducting inductance element 5
2 and the input resistance element 51, a Josephson element 54
Further, the Josephson transmission line 60 is used for feedback to the superconducting inductance element 52, and the flux quantum of 4Φ0 generated by the flux quantum pair generation circuit 20 is used for the Josephson element 54 using the Josephson transmission line 60. The structure is further fed back to the superconducting inductance element 52.

4Φ0 generated by the flux quantum pair generation circuit 20
Is fed back from the Josephson element 54 to the superconducting inductance element 52 via the Josephson transmission line 60. In the superconducting inductance element 52, in addition to the flux quantum of 4Φ0 from the flux quantum pair generation circuit 20, This means that the flux quantum of 4Φ0 via the Song transmission line 60 has been fed back, and the flux quantum of 8Φ0 in total has been fed back.

As a result, the feedback amount can be made eight times that of the single flux quantum Φ 0, and the center frequency is 150 [MH].
z], the resolution can be improved by 1.6 bits.

An example in which the number of bits can be increased will be described as a fourth embodiment.

(Example 4) Superconducting inductance element 1
In the case of a configuration using a filter composed of a resistor and a resistance element 2 as an integrator, a configuration in which this integrator is provided in two stages is known as a double-loop sigma-delta modulator. The example which applied this invention to the modulator is shown. Reference numeral 9 denotes a first-stage integrator, 8 denotes a next-stage integrator, and the first-stage integrator 9 and the next-stage integrator 8 are connected by a Josephson element 71.

The fourth embodiment is different from the first embodiment in that the paths other than the comparison operation Josephson elements 3 and 4 are different from the first embodiment in that a large number (four in this case) is used. ) Is fed back to the superconducting inductance element 1 which is a component of the integrator using a filter.

The Josephson transmission line 60 is used for the feedback of the flux quantum to the superconducting inductance element 1, and the 4Φ 0 flux quantum generated by the flux quantum pair generation circuit 20 is used for the Josephson transmission line 60 using the Josephson transmission line 60. It is configured to feed back to superconducting inductance element 1 from 71.

In such a configuration, the magnetic flux quantum generated by the magnetic flux quantum pair generation circuit 20 is an integral multiple (n) of the magnetic flux quantum Φ0 which is a unit of the feedback amount generated by the comparator.
For example, if it is four times, the magnetic flux quantum of 4Φ0 generated by the magnetic flux quantum pair generation circuit 20 passes through the Josephson transmission line 60 and the superconducting inductance element of the integrator 9 in the first stage from the Josephson element 71. 1 in the superconducting inductance element 1 of the integrator 9 at the first stage.
This means that the flux quantum Φ0 is fed back through the Josephson transmission line 60.

Further, Φ 0, which is four times the same amount as that of the integrator 9 in the first stage, is fed back to the integrator 8 in the subsequent stage. Therefore, a total of eight flux quanta are used for feedback. Therefore, higher resolution (multiple bits), higher speed, and wider input band can be achieved.

(Embodiment 5) In order to further obtain a higher resolution, it is preferable to configure as shown in FIG. That is, the configuration shown in FIG. 7 uses a so-called double-loop sigma-delta modulator in which the basic structure uses a low-pass filter composed of an inductance element 1 and a resistance element 2 as an integrator and has such an integrator in a two-stage configuration. This is a sigma-delta modulator type AD converter having a configuration in which a comparator output composed of Josephson elements 3 and 4 is led to an RS flip-flop 30 through a normal Josephson transmission line JTL.

A configuration in which the above-described magnetic flux quantum pair generation circuit 20 is connected in multiple stages as a magnetic flux quantum feedback system (here, as an example, the magnetic flux quantum pair generation circuit 81)
a, 81b, 81c), and the magnetic flux quanta generated by the magnetic flux quantum pair generation circuits 81a, 81b, 81c are split by a splitter 82 for splitting (here, a splitter of 1: 4 splitting). Then, the flux quantums branched from each other are delayed by delay elements 86a, 86b, 86c and 86d so that they do not overlap, and are sequentially merged by merging gates 83a, 83b and 83c for merging the RSFQs, and then the integrator in the first stage The configuration is such that feedback is provided to the 9 inductance elements 1.

For this feedback, a Josephson element 84 is provided between the first and second integrators 9 and 8, and the magnetic flux quantum is fed back from the Josephson junction.

The flux quantum pair generation circuit 81a of the first stage receives the flux quantum from the comparator composed of the Josephson elements 3 and 4 output via the Josephson transmission line JTL via the buffer 85a, and the next stage. Flux quantum pair generation circuit 8
1b, the flux quantum from the first-stage flux quantum pair generation circuit 81a is given via a buffer 85b, and the next-stage flux quantum pair generation circuit 81c receives the flux quantum from the next-stage flux quantum pair generation circuit 81b. As a result of being provided via the buffer 85c, the multiplication is performed.

The buffers 85a, 85b and 85c are for passing only one of the generated flux quanta in the pair of flux quanta separated by the Lorentz force into and out of the pair of generated flux quanta. It is sorted and sent to the splitter 82.

In such a configuration, the output of the comparator (point A in FIG. 8) composed of the Josephson elements 3 and 4 is guided to the RS flip-flop 30 through the ordinary Josephson transmission line JTL, and the feedback of the flux quantum is performed. A flux quantum pair generation circuit 81a having a three-stage connection configuration provided as a system,
81b and 81c, the first-stage magnetic flux quantum pair generation circuit 81
a through the splitter 80.

Then, the magnetic flux quantum pair generation circuit 81a multiplies the magnetic flux quantum, and gives the multiplied magnetic flux quantum to the magnetic flux quantum pair generation circuit 81b in the next stage. Flux quantum pair generation circuit 8
1b multiplies the magnetic flux quantum and gives the multiplied magnetic flux quantum to the magnetic flux quantum pair generation circuit 81c in the next stage.

Then, the next-stage magnetic flux quantum pair generation circuit 81c multiplies the magnetic flux quantum.

The result of the multiplication is as shown at point B in FIG. Thus, the flux quantum pair generation circuits 81a, 81b, 81
By c, one magnetic flux quantum (point A in FIG. 8) is increased to a large number (point B in FIG. 8), and provided to the splitter 82.

The splitter 82 is a magnetic flux quantum pair generation circuit 20.
The flux quanta generated by passing through a, 20b, and 20c are branched (here, a splitter having a 1: 4 branch). For example, assuming that the generated flux quantum is m, as a result of splitting by the splitter 82, four groups of m flux quantum are obtained. Each of the branched elements is delayed by delay elements 82a, 82b, 82c, and 82d so as not to overlap each other, and is merged by merging gates 83a, 83b, and 83c for merging the RSFQs, and then the inductance element 1 of the integrator 8 in the first stage To give feedback.

That is, in the case of this configuration, one flux quantum output from the comparator is increased to a large number by passing through a multi-stage flux quantum pair generation circuit, and this is split into a plurality of pieces by the splitter, and the respective delay amounts are different. A pulse train composed of a large number of magnetic flux quanta is created by merging after delaying by the above, and this is fed back to the inductance element of the first-stage integrator 9 of the double loop, so that the current of the inductance element of the first-stage integrator 9 is obtained. Weaken as much as possible. Then, the current flowing through the inductance element of the integrator 8 at the next stage is reduced.

As a result, the inductance Ls of the inductance element of the integrator can be increased, so that the resolution and speed of the AD converter using the sigma-delta modulator can be increased, and the input band can be increased. become.

In the configuration shown in FIG. 7, a RSFQ 1: 4 splitter (circuit for sequentially outputting the same SFQ pulse train as the input SFQ pulse train from four output ports simultaneously) is fed back to the first-stage integrator 9. Is further connected, for example, to a splitter of 1: 2, so that the four .PHI.0 can be increased four times.times.2, that is, eight times. One flux quantum from the comparator, which has been increased through the flux quantum pair generation circuits 81a, 81b, and 81c, is actually fed back to the integrator by further increasing the number of generations in the flux quantum pair generation circuit by eight times. Is possible.

At this time, feedback to the first stage integrator 9 is performed through nine serially connected Josephson elements connected to the inductance element 1 of the first stage integrator 9. Is assigned to each of these eight series-connected Josephson elements, so that each of the eight series-connected Josephson elements can be injected by 4Φ0, and a 14-bit resolution can be obtained by such feedback. become.

(Embodiment 6) In the above, an example was shown in which a low-pass filter using an inductance element and a resistance element was used as an integrator, or a resonator-type filter using an inductance element and a capacitor was used. Can be realized by a configuration using a distributed constant line which is a circuit of inductance and capacitance.

In a distributed constant line, if matching is not achieved, resonance occurs due to input of a signal of a specific frequency (for example, wavelength / 2). Embodiment 2 A distributed constant line is formed by using this resonance phenomenon.
Used in place of the above resonator.

Specifically, the configuration is as shown in FIG. 9. 90 is a distributed constant line, 3 and 4 are Josephson elements forming a comparator, 10 is a delay element, 20 is a flux quantum pair generation circuit, 3
0 is an RS flip-flop. Reference numeral 91 denotes an impedance component, and reference numeral 92 denotes an inductance component. These components are used to break the impedance matching at the end of the distributed constant line 90 so that reflection occurs.

A signal to be converted into a digital signal is input from an analog signal source in the form of a current signal, and this signal is input to a distributed constant line 90 after a predetermined DC bias is applied by a DC current bias source.

The impedance constant of the input / output end of the distributed constant line 90 is mismatched, and the input current signal is reflected when passing through the distributed constant line 90. As a result, the signal of the resonance frequency component becomes It is resonated and multiplied, and frequency components other than the component of the resonance frequency are attenuated. As a result, the distributed constant line 90 without impedance matching functions as a resonator. In this case, an operation similar to that of the second embodiment is performed, and a configuration in which a large number of magnetic flux quanta are fed back to the distributed constant line 90 which is an inductance element of the resonator is realized. Ls can be increased. Therefore, it is possible to realize a sigma-delta modulator type AD converter capable of achieving high resolution (multiple bits), high speed, and wide input bandwidth.

Although various embodiments have been described above, the present invention is not limited to the above-described embodiments, and can be implemented with various modifications.

[0155]

As described in detail above, according to the present invention,
The restriction that the inductance component Ls of the integrator cannot be increased, which has hindered the realization of an AD converter that achieves high resolution (multi-bit), high speed, and wide input band by the sigma delta modulator, is greatly relaxed. A sigma-delta modulator capable of achieving higher resolution (multiple bits), higher speed, and wider input band can be obtained.

Therefore, according to the present invention, a superconducting A / D converter using a superconducting sigma delta modulator can be realized with a high conversion bit accuracy for the same sampling clock without largely changing the circuit structure. become.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the present invention, showing a basic configuration example of a superconducting sigma-delta modulator according to the present invention.

FIG. 2 is a diagram for explaining the present invention, and is a diagram showing a circuit configuration example of a superconducting sigma-delta modulator in Embodiment 1 according to the present invention.

FIG. 3 is a diagram showing a circuit simulation result (sigma-delta modulation operation) of the circuit of FIG. 2;

FIG. 4 is a diagram for explaining the present invention, and is a diagram illustrating a configuration example of a sigma-delta modulator according to a second embodiment of the present invention.

FIG. 5 is a diagram for explaining the present invention, and is a diagram illustrating a configuration example of a bandpass Sigma-Delta modulator according to a third embodiment of the present invention.

FIG. 6 is a diagram for explaining the present invention, and is a diagram showing a configuration example of a double-loop signal delta modulator which is Embodiment 4 of the present invention.

FIG. 7 is a diagram for explaining the present invention, and is a diagram illustrating a configuration example of a double-loop sigma-delta modulator according to a fifth embodiment of the present invention.

FIG. 8 is a diagram illustrating an operation of a sigma-delta modulator according to a fifth embodiment of the present invention.

FIG. 9 is a diagram for explaining the present invention, and is a diagram illustrating a configuration example of a bandpass sigma-delta modulator according to a sixth embodiment of the present invention.

FIG. 10 is a diagram showing a conventional example of a superconducting sigma-delta modulator.

FIG. 11 is a block diagram illustrating a basic configuration of a sigma-delta modulator.

FIG. 12 is a block diagram illustrating a configuration example of an AD converter using a superconducting sigma-delta modulator.

FIG. 13 is a diagram showing characteristics of under-damping type and over-damping type Josephson elements.

[Description of Signs] 1 ... Inductance element (Ls) 2 ... Resistance element (Rs) 3,4 ... Josephson element constituting comparator 8 ... Next stage integrator 9 ... First stage integrator 10 ... Delay element 20, 81a, to 81c: magnetic flux quantum pair generation circuit 20a, 20b: over-damping Josephson element 20b: under-damping Josephson element 30: RS flip-flop 53: capacitor

──────────────────────────────────────────────────続 き Continued on the front page (73) Patent holder 000005108 Hitachi, Ltd. 4-6-1 Kanda Surugadai, Chiyoda-ku, Tokyo (73) Patent holder 000005223 Fujitsu Limited 4-1-1 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kawasaki No. 1 (72) Inventor Tatsunori Hashimoto 1-14-3 Shinonome, Koto-ku, Tokyo Inside the Superconductivity Engineering Laboratory, International Superconducting Technology Research Center (72) Inventor Shuichi Nagasawa 1-14-3, Shinonome, Koto-ku, Tokyo No. Inside the Superconductivity Engineering Research Center, International Superconducting Technology Research Center (72) Inventor Haruhiro Hasegawa 1-14-3 Shinonome, Shintomo, Koto-ku, Tokyo Inside the Superconducting Technology Research Center, International Superconducting Technology Research Center (72) Inventor Hideo Suzuki 1-14-3 Shinonome, Koto-ku, Tokyo International Superconductivity Foundation (72) Inventor Kazunori Miyahara 1-1-14 Shinonome, Koto-ku, Tokyo, Japan Inside the Superconductivity Engineering Laboratory (72) Inventor Yoichi Enomoto, Koto, Tokyo 1-14-3 Shinonome, Ward Inside the Superconducting Engineering Laboratory, International Superconducting Technology Research Center (56) References JP-A-6-268270 (JP, A) US Patent 5,140,324 (US, A) US Patent 5,327,130 (US U.S. Pat. No. 5,1988,815 (US, A) U.S. Pat. No. 5,341,136 (US, A) X. Przbysz et. a l. , Two-Loop Modulator for Sigma-Delta to Digital Converter, IEEE TRANSACTIONS ON APP LIED SUPERCONDUCTI VITY, U.S.A., 1995. 5 NO. 2,2248-2251 J.P. X. Przybysz et. a l. , JOSEPHSON SIGMA-DELTA MODULATOR FOR HIGH DYNAMIC RA NGE A / D CONVERTER, IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTITY, USA, March 1993, V.O. 3, NO. 1,2732-2735 (58) Fields investigated (Int.Cl. ⁷ , DB name) H03M 3/02 ZAA H03M 1/12 ZAA

Claims (3)

(57) [Claims] 1. An integrator comprising an inductance element to which a resistance element or a capacitance element is connected, and a Josephson element which is over-damped, and an output from the inductance element of the integrator is provided to the Josephson element. A pulse generation operation characteristic of the Josephson element is used as a comparison operation.The comparator includes a comparator that performs a comparison operation in synchronization with a clock signal. In a superconducting sigma-delta modulator in which the generated magnetic flux quantum uses the effect of reducing the current of the inductance element by a constant value as feedback, a direct current biased Joseph is provided in a subsequent stage of the Josephson element constituting the comparator. Connect the transmission line The Josephson transmission line has a configuration in which at least one of the Josephson elements of the Josephson transmission line is an under-damped Josephson element, and the magnetic flux quantum generated in the Josephson transmission line is fed back. A superconducting sigma-delta modulator. 2. A first integrator comprising a resistance element and an inductance element, and a Josephson element which is over-damped, and an output from the inductance element of the first integrator is provided to the Josephson element. A pulse generation operation characteristic of the Josephson element is used as a comparison operation, and a comparator that performs a comparison operation in synchronization with a clock signal is provided. In the superconducting sigma-delta modulator in which the magnetic flux quantum generated from the above uses the effect of reducing the current of the inductance element by a constant value as feedback, the superconducting sigma-delta modulator comprises a resistance element and an inductance element at the preceding stage of the first integrator. At least one set of second integrators connected via a Josephson element; A DC-biased Josephson transmission line is connected to the rear part of the Josephson element constituting the comparator, and the Josephson transmission line is connected to at least one of the Josephson elements constituting the Josephson transmission line. The son element is an under-damped Josephson element, and the magnetic flux quantum generated in the Josephson transmission line is fed back to the inductance element of the first integrator, and the inductance element of the second integrator is connected to the first element. And a feedback through a Josephson junction of a Josephson element connected between the first and second integrators. 3. An integrator comprising a capacitance element and an inductance element forming a resonance circuit together with an inductance, and an over-damped Josephson element, and an output from the inductance element of the integrator is output to the Josephson element. And a comparator for performing a comparison operation in synchronization with a clock signal by using the pulse generation operation characteristic of the Josephson element as a comparison operation, and providing the Josephson element by the comparison operation in the comparator. In the superconducting sigma-delta modulator, wherein the effect that the flux quantum generated from reduces the current of the inductance element by a constant value is used as feedback, the integrator includes a series circuit of a resistance element and a Josephson element in an input stage. Joseph, which constitutes the comparator A DC-biased Josephson transmission line is connected to the rear part of the Sonson element, and this Josephson transmission line has at least one Josephson element of the Josephson element constituting the Josephson transmission line under-damped. A configuration in which a Josephson element is used, and a magnetic flux quantum generated in the Josephson transmission line is fed back to the inductance element of the integrator and fed back via the Josephson junction of the Josephson element in the input stage of the integrator. A superconducting sigma-delta modulator.