JP3327331B2 - Switching power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a normal load mode.
The present invention relates to a switching power supply having a multi-mode and a light-load mode (standby mode).

[0002]

2. Description of the Related Art A switching power supply used for a television, a video tape recorder, or the like waits for a normal (normal) mode such as reception, recording, and reproduction, and an instruction for reception, recording, and reproduction. It is configured to operate in the standby mode. FIG. 1 shows a conventional switching power supply of this type. In FIG. 1, a primary winding 3 having an inductance of an output transformer 2 is provided between one end 1a and the other end 1b of a DC power supply 1 composed of, for example, a rectifier circuit and a smoothing circuit.
And a series circuit of a main switch 4 composed of an FET and a current detection resistor 5 as current detection means. To form an output rectifying and smoothing circuit, a smoothing capacitor 8 is connected in parallel to a secondary winding 6 of the transformer 2 via a rectifying diode 7. The polarity of the secondary winding 6 and the polarity of the rectifier diode 7 are determined so that the rectifier diode 7 conducts while the main switch 4 is off. A load 11 is connected between a pair of DC output terminals 9 and 10 connected to the smoothing capacitor 8.

The switching power supply shown in FIG. 1 has a switch control circuit for controlling the output voltage Vo between the output terminals 9 and 10 to be constant by on / off control of the main switch 4. This switch control circuit includes a voltage feedback control signal forming circuit 12, a light emitting diode 13, a phototransistor 14, a current detecting resistor 5 as current feedback control signal forming means, a resistor 15 as adding means, and a switch. And a control signal forming circuit 16. The voltage feedback control signal forming circuit 12, the light emitting diode 13, and the phototransistor 14 form a voltage feedback control signal forming means.

The voltage feedback control signal forming circuit 12 includes voltage detecting resistors 17 and 18 as voltage detecting circuits connected between the output terminals 9 and 10, a resistor 19 for forming a reference voltage source, and a Zener diode. 1 and a transistor 21 as an error signal forming circuit, that is, an error amplifier.
The base of the transistor 21 is connected to a voltage dividing point of the voltage detecting resistors 17 and 18, and the emitter is connected to a Zener diode 20 as a reference voltage source. The Zener diode 20 is connected between the DC output terminals 9 and 10 via a resistor 19. Therefore, the collector current of the transistor 21 changes according to the difference between the detection voltage and the reference voltage. The light emitting diode 13 is connected between the output terminal 9 and the collector of the transistor 21 for converting the output of the voltage feedback control signal forming circuit 12 into an optical signal. Light emitting diode
The phototransistor 14 optically coupled to the node 13 is connected between the output line 23 of the first control power supply circuit 22 and the feedback control signal input line 24 of the switch control signal forming circuit 16. Since the current detection resistor 5 is connected to the feedback control signal input line 24 via the resistor 15, a composite feedback indicating the sum of the voltage feedback control signal I2 and the current feedback control signal indicating the drain current I1 of the main switch 4 is provided. The control voltage Vf can be obtained on the input line 24.

The switch control signal forming circuit 16 is shown in FIG.
As shown in FIG. 2B, the feedback control voltage Vf of the line 24 is compared with the reference voltage Vr to form an on / off control signal shown in FIG. That is, it is sent to the gate. In this example, the OFF period Toff of the main switch 4 in FIG. 2A is kept constant, and the ON period Ton of the main switch is controlled by the feedback control signal Vf. For example, when the output voltage Vo becomes higher than the target value, the voltage value of the feedback control signal Vf also becomes higher. Therefore, the time T1 from the rising time t1 of the triangular wave to crossing the reference voltage Vr is obtained.
on becomes shorter. Since the primary winding 3 has an inductance, the current I1 rises with an inclination during the ON period of the main switch 4, and the feedback control signal Vf shown in FIG. 2B is obtained.

In order to supply the driving power for the switch control signal forming circuit 16, the first control power supply circuit 22 described above is used.
In addition, a second control power supply circuit 26 and a starting resistor 27 are provided.

The first control power supply circuit 22 supplies a voltage of a first value to a part of the control signal forming circuit 16, that is, the first part, and also supplies the phototransistor 14 and the second control power supply circuit 26. A tertiary winding 28 electromagnetically coupled to the primary winding 3 and the secondary winding 6;
9 and a smoothing capacitor 30. The smoothing capacitor 30 is connected in parallel to the tertiary winding 28 via a diode 29, and the diode 29 has a directivity of being turned on by the tertiary winding 28 during the OFF period of the main switch 4. As a result, a voltage proportional to the voltage of the smoothing capacitor 8 is obtained in the tertiary winding 28 from the output controlled to be substantially constant.
Thereby, the capacitor 30 is charged. One end of the capacitor 30 is connected to the first power supply line 23, and the other end is connected to the other end 1 b of the DC power supply 1 and the switch control signal forming circuit 1.
6 are connected to the ground line 31. The first power supply line 23 is connected to the switch control signal forming circuit 16 and to one terminal 1 a of the DC power supply 1 via a starting resistor 27.

The second control power supply circuit 26 is a constant voltage control circuit for supplying a constant voltage from the line 32 to the rest of the switch control signal forming circuit 16, that is, the second portion. Voltage control transistor 33 and resistor 34
And a Zener diode 35 as a constant voltage source. The collector of the npn-type transistor 33 is connected to the first power supply line 23, its emitter is connected to the second power supply line 32, and this base is connected via the resistor 34 to the first power supply line 32.
Are connected to the power supply line 23. Zener-Dio
The gate 35 is connected to the base of the transistor 33 and the ground line 3.
1 are connected. Therefore, the second power supply line 32 has the second
Is obtained, and this is the switch control signal forming circuit 16
Supplied to Note that the second voltage on the line 32 is lower than the first voltage on the line 23.

This switching power supply device has a mode designating signal generator 36, a mode switching transistor 37, and a resistor 38 in order to improve the efficiency during standby.
And The mode designating signal generator 36 comprises a first series of first voltage levels consisting of a low level or a ground level when the load 11 is in a normal mode (normal state).
The first voltage level and the second voltage level higher than the first voltage level alternately in the standby mode in which the load 11 is sufficiently smaller than the value in the normal mode. A second mode designating signal consisting of the intermittent signal shown in FIG. In FIG. 3A, t
1 to t2 indicate the second voltage level period T2, and t2 to t3 indicate the first voltage level period T1. First voltage level period T1
Is set to be longer than the normal ON / OFF cycle of the main switch 4.

The collector of a transistor 37 as a mode switch is connected to a light emitting diode 1 via a resistor 38.
The emitter is connected to a lower output terminal 10 and the base is connected to a mode designating signal generator 36. Therefore, the transistor 37
The mode designation signal shown in FIG.
It is turned on to increase the current of the light emitting diode 13. As a result, the apparent output voltage becomes high, and the supply of the on / off control signal to the main switch 4 is stopped as shown in the section from t1 to t2 in FIG. FIG.
In the first voltage level period T1 of FIG.
Is turned off, and an on / off control signal is formed in the same manner as in the normal mode as shown in the section from t2 to t3 in FIG. 3B, and is supplied to the main switch 4. In the standby mode, if a pause period of the ON / OFF control is provided as shown at t1 to t2 in FIG. 3B, the number of times of switching of the main switch within a predetermined time can be reduced, and the switching loss of the main switch can be reduced. , And the efficiency can be improved.

[0011]

Incidentally, the conventional switching power supply device of FIG. 1 is configured to control the current of the light emitting diode 13 in the standby mode. The power supply is performed in the standby mode as well as in the normal mode. Therefore, the power loss of the switch control signal forming circuit 16 in the standby mode is large,
The efficiency of the switching power supply in standby mode is reduced.

Therefore, an object of the present invention is to provide a standby mode.
It is an object of the present invention to provide a switching power supply device capable of increasing the efficiency in a light or light load mode.

[0013]

SUMMARY OF THE INVENTION In order to solve the above problems and achieve the above object, the present invention provides a DC power supply having at least one switch for turning on and off the voltage of a DC power supply.
A DC converter circuit, a switch control signal forming circuit for forming a switch control signal for on / off control of the switch, and a switch control signal forming circuit for supplying the switch control signal to the switch; and a power supply for the switch control signal forming circuit. When a load connected to the control power supply circuit for supplying the power supply and the converter circuit is a normal load, a first mode designating signal consisting of a continuation of a first voltage level is generated. When the load is lighter than the normal load or when there is no load, the first voltage level and the second voltage level are alternately arranged, and the section of the first voltage level is the ON / OFF state of the switch during the normal load. A mode designating signal generating means for generating a second mode designating signal comprising an intermittent signal set longer than the off period, and a second voltage level from the mode designating signal generating means. When the output of is generated, comprises a power control means for limiting or cutting off the power supply from the control power supply circuit to a part of the switch control signal forming circuit, the switch control signal forming circuit, When the signal of the first voltage level is generated from the mode designating signal generating means, the switch is turned on / off, and the signal of the second voltage level is output from the mode designating signal generating means. The present invention relates to a switching power supply device characterized in that the switch is kept in an off state when the power is generated.

According to a second aspect of the present invention, first and second control power supply circuits are provided, and the second control power supply circuit is configured to supply a constant voltage. It is desirable that the power supply from the second control power supply circuit be limited or cut off when the output of the node designation signal generating means is at the second voltage level. Further, when the mode designating signal is at the second voltage level, the power supply to all of the control signal forming circuits can be limited or cut off. In addition, the power supply voltage of a part of the voltage feedback control signal forming circuit can be limited or cut off when the output of the mode designating signal generating means is at the second voltage level.
The converter circuit comprises a series circuit of a primary winding of a transformer and a switch, a secondary winding, and an output rectifying / smoothing circuit. A switch-on end point can be determined by a composite signal of the switch and the current feedback control signal. Further, a second control power supply circuit for supplying a stabilized second voltage can be provided. Claim 7
As shown in (1), the control signal forming circuit can be composed of a comparator, a sawtooth wave generating capacitor, and the like. Claim 8
As shown in (2), the power supply to the voltage control signal forming circuit can be limited or interrupted by also using the second control power supply circuit. Further, the transmission of the square wave pulse on the output line of the comparison circuit can be controlled by the mode designating signal.

[0015]

According to the present invention, power is supplied to part or all of the switch control signal forming circuit during the period when the mode designating signal is at the second voltage level in the light load or no load mode. Is limited or cut off, power loss in the switch control signal forming circuit can be reduced, and efficiency can be improved. Further, according to the fifth to ninth aspects of the invention, it is possible to easily, reliably and simply reduce the power loss at the time of light load or no load.

[0016]

Next, embodiments and examples of the present invention will be described with reference to FIGS. However, in FIGS. 4 to 10, substantially the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

[0017]

First Embodiment A switching power supply according to a first embodiment of the present invention shown in FIG. 4 is different from the switching power supply of FIG. 1 in that a mode setting light emitting diode 41, a phototransistor 42, and a control power supply cutoff are provided. It has the same configuration as that of FIG. 1 except that a power control means including a transistor 43 is added and an off-control transistor 44 is further added. The control circuit of the main switch comprises a voltage feedback control signal forming circuit 12, a light emitting diode 13, a phototransistor 14, resistors 5, 15, and a control signal forming circuit 16.

In this embodiment, the mode specifying signal generating means includes a mode specifying signal generator 36, a transistor 37, a resistor 38, a light emitting diode 41, and a phototransistor 42.
It is composed of Mode setting light emitting diode 41
Is connected to one DC output terminal 9, and the cathode is connected to the other DC output terminal 10 via a resistor 38 and a mode switching transistor 37. FIG.
The mode designating signal generator 36 generates a first mode designating signal of a first voltage level, that is, a low level or a ground level in the normal mode similarly to the case of FIG. Sometimes, a second mode designation signal having a low level (first voltage level) and a high level (second voltage level) alternately is generated. Therefore, the transistor 37 is turned off during the entire period in the normal mode and during the main switch operation period in the standby mode, and is turned on during the off period in the standby mode. Therefore, the mode setting light emitting diode 41 emits light intermittently in the standby mode. The collector of the mode setting phototransistor 42 is connected to one end of the capacitor 30, and the emitter is connected to the bases of the transistors 43 and 44. Npn-type transistor 43 as a control power cutoff switch for constituting power control means
Is connected to the base of the constant voltage control transistor 33 of the second control power supply circuit 26, and its emitter is connected to the ground line 31. Therefore, when the transistor 43 is turned on in the standby mode, the constant voltage control transistor 33 is turned off, and the power supply through the line 32 is cut off. Therefore, the transistor 33
Also functions as power control means in the standby mode.

The collector of an npn-type transistor 44 serving as an off-control switch is connected to the switch control signal forming circuit 16 by a line 45, and its emitter is connected to the ground line 31. The off control transistor 44 is turned on and off intermittently in the standby mode.
The switch control signal forming circuit 1 is turned off when the switch is on.
The formation of the on / off control signal for the main switch 4 at 6 is interrupted.

The control signal forming circuit 16 shown in FIG. 4 constitutes a switch control circuit, and is roughly divided as shown in FIG. 5 into a sawtooth wave generating circuit 51, a reference voltage generating circuit 52, a comparing circuit 53, and a driving circuit. 54, ON end time determination circuit 55,
An off hold circuit 56 is provided. The sawtooth wave generation circuit 51
Output of ON end time determination circuit 55 and OFF holding circuit 56
The sawtooth voltage V2 is generated in FIG. The reference voltage generating circuit 52 is controlled by the output of the ON end time determination circuit 55 and the output of the OFF holding circuit 56, and outputs the reference voltage V1 shown in FIG. The comparison circuit 53 compares the sawtooth voltage V2 with the reference voltage V1 and generates a comparison output for forming the control signal shown in FIG. The drive circuit 54 is controlled by the output of the comparison circuit 53 and outputs the square wave control signal shown in FIG.
To supply. The ON end time determination circuit 55 compares the feedback control signal Vf of the line 24 shown in FIG. 7E with the built-in reference voltage Vr, and the feedback control signal Vf is changed to the reference voltage Vr.
Is output as an end-of-on-time determination signal of the main switch 4. The ON end time t1 corresponds to the OFF start time. The OFF holding circuit 56 is a driving circuit 54
, And controls the sawtooth wave generation circuit 51 and the reference voltage generation circuit 52 in the same manner as the ON end time determination signal.

The first power supply line 23 is a part of the control signal forming circuit 16, that is, a sawtooth wave generating circuit 51 as a first part.
And the drive circuit 54. The second power supply line 32 includes a sawtooth wave generation circuit 51, a reference voltage generation circuit 52, a comparison circuit 53, a drive circuit 54, and an ON end time determination circuit 55 as the remainder of the control signal formation circuit 16, that is, the second portion.
It is connected to the.

FIG. 6 is a circuit diagram showing each part of FIG. 5 in detail. The sawtooth generation circuit 51 includes a sawtooth generation capacitor 61.
, A charging transistor 62, resistors 63 and 64, a Zener diode 65, and a discharging resistor 66.
One end of the capacitor 61 is connected to the first power supply line 23 via a transistor 62 forming a constant voltage charging circuit, and the other end is connected to the ground line 31.
A Zener diode 65 is connected as a constant voltage source between the base of the transistor 62 and the ground line 31, and a base current supply resistor 63 is connected between the second power supply line 32 and the base of the transistor 62. I have. Therefore, the capacitor 61 is connected to the Zener diode 6
The constant voltage charging is performed to a value obtained by subtracting the base-emitter voltage of the transistor 62 from the Zener voltage of 5. In FIG. 7, since the transistor 62 is turned on during the period from t0 to t1, the voltage V2 of the capacitor 61 becomes 5V. Since the transistor 62 is also turned off during the off period of the main switch 4 from t1 to t4 in FIG. 7, the capacitor 61 is connected via the discharge circuit forming resistor 66 connected in parallel with the capacitor 61.
And the voltage V2 gradually decreases as shown in FIG. Since the base of the transistor 62 is connected to the ON end time determination circuit 55 and the OFF holding circuit 56 via the resistor 64, the transistor 62
Are turned on during the on-period from t0 to t1, and turned off during the off-period from t1 to t4.

The reference voltage generating circuit 52 has two resistors 67,
68. One end of the series circuit of the two resistors 67 and 68 is connected to the second power supply line 32, and the other end is the output line 69 of the ON end time determination circuit 55 and the OFF holding circuit 56.
It is connected to the. The reference voltage V1 shown in FIG.
It is obtained at the connection point of the two resistors 67, 68 or the voltage dividing point 70. During the ON period Ton of the main switch 4 in FIG.
9 is open from the ground, the reference voltage V1 at the voltage dividing point 70 becomes about 6.5V. On the other hand, the off period Toff
Since the line 69 is connected to the ground, the reference voltage V1 becomes 3.5V.

The comparison circuit 53 has eight transistors 71,
72, 73, 74, 75, 76, 77, 78 and one resistor 79. The base of the pnp transistor 71 is connected to one end of a capacitor 61 that applies the sawtooth voltage V2, the emitter is connected to the second power supply line 32 via the pnp transistor 75, and the collector is np.
It is connected to the ground line 31 via the n-type transistor 73 and to the bases of the transistors 73 and 74. The base of the pnp transistor 72 is connected to a voltage dividing point 70 for applying the reference voltage V1, the emitter is connected to the second power supply line 32 via a transistor 75, and the collector is connected to the ground line via an npn transistor 74. 31 and to the base of an npn transistor 76. The collector of the transistor 76 is connected to the second power supply line 32 via a pnp transistor 78, and the emitter is connected to the ground line 31. The emitters of the pnp transistors 75, 77 and 78 are connected to the second power supply line 32.
Connected to each other. The base of transistor 75 is connected to the base of transistor 77 and to ground line 31 via resistor 79. The collector of the transistor 77 is connected to the ground line 31 via the resistor 79, and the base is connected to the base of the transistor 78.

In the comparison circuit 53, during the ON period Ton of FIG. 7, since V1> V2, the transistor 72 is off, and the transistor 76 in the comparison output stage is also off. This causes the collector of transistor 76 to go high. On the other hand, in the off period Toff, since V2> V1, the transistor 72 is turned on and the transistor 76 is turned on.
Also turns on. This causes the collector of transistor 76 to go low. The collector of the transistor 76 is connected to the transistor 44 of FIG. That is, the transistor 44 of FIG. 4 is connected in parallel to the transistor 76 of FIG.

The drive circuit 54 includes eight transistors 8
0, 81, 82, 83, 84, 85, 86, 87 and a resistor 88. pnp transistors 80, 82, 8
The four emitters are connected to the second power supply line 32, and their bases are connected to the ground line 31 via the resistor 79. The collector of the transistor 80 is connected to the collector of the npn transistor 81 and the base of the transistor 85. The base of npn-type transistor 81 is connected to the collector of transistor 76 of comparison circuit 53, and the emitter is connected to ground line 31. The collector of the npn transistor 83 is connected to the collector of the transistor 82 and the base of the transistor 87, the emitter is connected to the ground line 31, and the base is connected to the collector of the transistor 76 of the comparison circuit 53. The collector of the npn transistor 85 is connected to the collector of the transistor 84 and the base of the npn transistor 86. The collector of the transistor 86 is connected to the first power supply line 23,
The emitter is connected to the ground line 3 via the transistor 87.
1 and to the control signal output line 25 via a resistor 88. Control signal output line 2
In FIG. 5, a control signal of a square wave pulse shown in FIG.

The ON end time determination circuit 55 includes a comparator 89
, Reference voltage source resistors 90 and 91, and transistor 92
Consisting of The positive input terminal of the comparator 89 is connected to the feedback control signal line 24, and the negative input terminal is connected to the reference voltage line 93. A series circuit of two resistors 90 and 91 constituting a reference voltage source is connected between the second power supply line 32 and the ground line 31, and a reference voltage Vr is applied to a line 93 connected to these voltage dividing points. Output. The comparator 89 outputs the composite feedback control signal Vf as shown in FIG.
Is compared with a reference voltage Vr, and a feedback control signal V
When f reaches the reference voltage Vr, a high-level output shown in FIG. 7G is generated. The base of the npn transistor 92 is connected to the output terminal of the comparator 89, the collector is connected to the output line 69, and the emitter is connected to the ground line 31. Therefore, the transistor 92 is turned on when the feedback control signal Vf reaches the reference voltage Vr. Note that one power supply terminal of the comparator 89 is connected to the second power supply line 32, and the other power supply terminal is connected to the ground line 31.

The off hold circuit 56 comprises an npn transistor 94. The collector of the transistor 94 is connected to the line 69, and the emitter is connected to the ground line 31.
The base is connected to the collector of the transistor 81 of the drive circuit 54. Therefore, the driving circuit 5
4 off-hold circuit 5 only when transistor 81 is off
The transistor 94 of No. 6 is turned on. When the transistor 92 of the ON end time determination circuit 55 and the transistor 94 of the OFF holding circuit 56 are ON, the line 69 is at the ground level, the charging transistor 62 of the sawtooth wave generating circuit 51 is OFF, and the capacitor 61 is in the discharging state. become,
This voltage V2 gradually decreases as shown in the off period Toff of FIG. In the off period Toff, the reference voltage V1 drops to 3.5V. When the sawtooth voltage V2 becomes lower than the reference voltage V1 at the time point t4 in FIG. 7, the transistor 76 of the comparison circuit 53 is turned off, and the transistor 81 is turned on because the collector is at a high level. The 56 transistor 94 turns off.

[0029]

[Operation in Normal Mode] In the normal mode, the mode designation signal generator 36 shown in FIG. 4 generates a first mode designation signal having a low level, that is, a ground level.
Transistor 37 is off and transistors 43 and 4
4 is also off. Therefore, the switch control signal forming circuit 1
6 operates normally, and continuously generates the control signal shown in FIG. During a period Ton in which the main switch 4 is turned on under the control of the control signal shown in FIG. 7H, a closed circuit including the DC power supply 1, the primary winding 3, the main switch 4, and the current detecting resistor 5 is formed. The current I1 flows. Since the primary winding 3 has an inductance, the current I1 increases with a slope as shown in FIG. 7B, and the voltage V5 of the current detecting resistor 5 corresponds to the waveform of the current I1 in FIG. The current I changes as shown in FIG.
The feedback control signal Vf including the feedback information of 1 also increases with a slope as shown in FIG. The voltage Vf of the line 24 is the voltage V15 of the resistor 15 shown in FIG. 7D based on the current I2 flowing to the resistor 15 through the phototransistor 14 by the voltage feedback control, that is, the voltage feedback control signal and the voltage of the current detection resistor 5. V5, that is, an added value with the current feedback control signal. The combined feedback control signal Vf on line 24 is shown in FIG.
Is compared with the reference voltage Vr to determine the ON end time t1. At the end of turning on t1, the comparator 89
, A narrow high-level pulse is generated, which becomes the base-emitter voltage V _BE of the transistor 92 as shown in FIG. 7 (G), the transistor 92 is turned on, and the off-period Toff starts at the same time when the on-period Ton ends. I do. The off period Toff is held by the off holding circuit 56. Since the discharge speed of the capacitor 61 via the resistor 66 is constant, the off period Toff has a constant time width.

When the main switch 4 is turned off at t1,
The drain-source voltage V _DS of the main switch 4 is shown in FIG.
As shown in FIG. Since the converter circuit of this embodiment is formed in a flyback type, that is, a reverse type, the magnetic energy accumulated in the core of the transformer 2 during the ON period of the main switch 4 is released during the OFF period of the main switch 4 and the diode 7 And 29 conduct and the capacitor 8,
30 is charged. When the release of the stored energy in the transformer 2 ends at the time t2 in FIG. 7, the voltages of the windings 3, 6, and 28 of the transformer 2 oscillate, and the voltage of the main switch 4 also oscillates.

The output voltage V0 rises at time t3 in FIG.
FIG. 7 shows the voltage V15 of the resistor 15 based on the output voltage feedback control.
When the voltage rises as shown in FIG. 7D, the level of the feedback control signal Vf on the line 24 is shifted to t0 in FIG.
The feedback control signal Vf reaches the reference voltage Vr from t4 to t5, which is shorter than the period from t1 to t1, and the ON period Ton of the main switch 4 is shortened. Thus, an operation of returning the output voltage V0 to the reference value occurs. When the output voltage V0 drops below the reference value, the operation is the reverse of the above.

[0032]

[Operation in Standby Mode] Next, the operation in the standby mode will be described with reference to FIG. In the standby mode, the mode designating signal generator 36 generates a second mode designating signal, that is, a standby signal composed of the intermittent signal shown in FIG. This standby signal is the same as the signal shown in FIG. 3A, and includes a high-level second voltage level period T2 from t1 to t2 and a low-level or ground-level first voltage level period T1 from t2 to t3. Have alternately. t
In the second level period T2 from 1 to t2, the transistor 37 of FIG. 4 is turned on, the light emitting diode 41 emits light,
The phototransistor 42 is turned on, and the transistor 4
3 and 44 are turned on as shown in FIG. When the transistor 43 is turned on, the transistor 33 is turned on as shown in FIG.
As shown in (B), the second power supply line 32 is turned off.
Is interrupted. Therefore, power loss in each of the circuits 51 to 56 connected to the second power supply line 32 is reduced. When the transistor 44 in FIG. 4 is turned on, the collector of the transistor 76 in FIG. 6 is connected to the ground, and the drive circuit 54 is turned off.

In the period from t2 to t3 when the standby signal in FIG. 8 becomes the first voltage level of the low level or the ground level, the transistor 37 of FIG. 4 is turned off, so that the transistors 43 and 44 are also turned off. Operates in the same manner as in the normal mode. That is, even during the standby mode period, the output voltage V0 is generated as shown in FIG. 8A, the current I2 flows through the phototransistor 14 as shown in FIG. 8C, and the second control power supply Circuit 26
8B is turned on as shown in FIG. 8B, the main switch 4 is connected to the main switch 4 from the line 25 at t in FIG.
The control signal is supplied as shown at 2 to t3, and the main switch 4 is turned on and off.

As apparent from the above description, in the standby mode, since there is an on / off pause period of the main switch 4 as shown at t1 to t2 in FIG. 8, the number of times of switching of the main switch 4 per unit time decreases. Switching loss is reduced. Further, since the power supply to the control circuit, that is, the control signal forming circuit 16 is interrupted during the idle period, the power loss of the control signal forming circuit 16 during standby can be greatly reduced. In the standby mode, the load 11 has a light load or no load as compared with the normal mode, so that power can be continuously supplied from the capacitor 8 to the load 11 during the idle period t1 to t2.

[0035]

Second Embodiment Next, a switching power supply according to a second embodiment will be described with reference to FIG. However, in FIG. 9 and FIG. 10 to be described later, the same parts as those in FIGS. 1 and 4 are denoted by the same reference numerals, and description thereof will be omitted. FIG.
4 omits transistors 43 and 44 from the circuit of FIG. 4, and instead has a power control means 100, in which a phototransistor 42 'is connected, and which is part of a voltage feedback control signal forming means. The phototransistor 14 is connected to the output side of the switch 100, and a protective Zener diode 103 is provided. The other components are the same as those shown in FIG.

The power control means 100 comprises an NPN transistor 101, a resistor 102 and a phototransistor 42 '. The transistor 101 is connected to the first control power supply circuit 2
The resistor 102 is connected between the output line 23 and the control signal forming circuit 16, the second control power supply circuit 26, and the phototransistor 14. The resistor 102 is connected to the line 23 on the collector side of the transistor 101 and the base of the transistor 101. Is connected between. The phototransistor 42 'is connected between the base of the transistor 101 and the ground, that is, the other power supply terminal 1b, and is optically coupled to the mode designating light emitting diode 41 as in FIG. Note that the emitter of the phototransistor 42 'can be connected to the emitter of the transistor 101. In the standby mode, the light emitting diode 41 emits light and the phototransistor 4
2 ′ is turned on and the transistor 101 is turned off.
In the normal mode, the light emitting diode 41 does not emit light, the phototransistor 42 'is off, and the transistor 101 is on. The Zener diode 103 connected in parallel to the capacitor 30 is a phototransistor 4
2 ′, 14 and the transistor 101 are provided for protection.

In the switching power supply of FIG. 9, when the mode designating signal is at the first voltage level, the transistor 10
1 is turned on, power is supplied to all circuits connected thereto, and when the mode designating signal is at the second voltage level, all of the control signal forming circuits 16 connected to the transistor 101, the second The power supply to the control power supply circuit 26 and the phototransistor 14 which is a part of the voltage feedback control signal forming means is cut off. Therefore, according to the second embodiment, power saving in the standby mode is achieved at a higher level than in the first embodiment.

[0038]

Third Embodiment A switching power supply according to a third embodiment shown in FIG. 10 has the same configuration as that of FIG. 9 except that the connection of the phototransistor 14 in FIG. 9 is changed. That is, the phototransistor 14 has the first
Are connected directly to the control power supply circuit 22.

Also in the third embodiment, the power supply to all of the control signal forming circuit 16 is performed when the mode designating signal
It is cut off at the voltage level of, so that a great power saving effect can be obtained.

[0040]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) The configuration of the switch control signal forming circuit 16 for turning on / off the main switch 4 can be variously modified. For example, the width control of the PWM pulse or the intermittent generation of the PWM pulse can also be performed by controlling the charge or discharge of the capacitor 61. (2) The main switch 4 can be replaced with a semiconductor switch such as a bipolar transistor. Further, various transistors for control in FIGS. 4, 6, 9 and 10 can be replaced with semiconductor switches such as FETs. (3) A circuit configuration in which the optical coupling circuit between the light emitting diodes 13 and 41 and the phototransistor 14, 42 or 42 'is omitted and the light emitting diodes 13 and 41 are electrically coupled can be provided. (4) The secondary winding 6 is not provided independently.
Can also be used as the tertiary winding 28. (5) A quaternary winding for a standby load is provided in the transformer 2, and a rectifying and smoothing circuit is connected to the quaternary winding. A standby load lighter than the main load 11 can be connected to the rectifying and smoothing circuit. (6) If sufficient power can be saved only by turning off the transistor 33 of the second control power supply circuit 26 during the idle period T2 in the standby mode, the transistor 44 can be omitted. (7) The diode 7 can be a rectifying element based on a transistor or an FET, or a synchronous rectifying element or a circuit including a parallel circuit of a diode and a transistor or an FET. (8) The converter circuit can be configured to be of a forward type, that is, a type in which the diode 7 is turned on while the main switch 4 is on. (9) Various converter circuits, such as a half-bridge type, a full-bridge type, and a push-pull type, can be used without configuring the converter circuit by combining one main switch 4 and the transformer 2. (10) A configuration in which the transistors 75, 77, 78, 80, 82, 84 and the like forming the current mirror circuit in FIG. 6 can be omitted. (11) Instead of turning on / off the control power supply 26 by on / off control of the constant voltage control transistor 33, a dedicated switch for turning on / off the power supply is provided, for example, on the line 32 to turn on / off the control power supply. can do. (12) The voltage feedback control signal and the current feedback control signal can be added using an adder to produce a combined feedback control signal Vf. (13) In the normal mode of the mode designating signal, the first
Is set to a high level and the second voltage level in the standby mode is set to a low level, and the polarity of the element controlled based on this can be reversed. For example, when the mode designating signal is at the second low voltage level, the light emitting diode 41 is turned off and the phototransistor 42 or 4 is turned off.
The transistor 33 or 101 can be turned off by 2 ′. In this case, FIGS. 9 and 10
A phototransistor 42 'is directly connected between the line 23 and the control signal forming circuit 16 or the like, and the power supply can be cut off or controlled by the phototransistor 42'. (14) In FIGS. 4, 9 and 10, when the mode designating signal is at the second voltage level (high level), the transistor 3
3 and 101 are turned off, that is, cut off. Instead, the transistors 33 and 101 are controlled so that the current or voltage supplied to the control signal forming circuit 16 or the like is limited to a predetermined value or less.
1 can be controlled.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a conventional switching power supply device.

FIG. 2 is a waveform diagram showing a control signal and a feedback control signal of a main switch of FIG.

3 is a waveform diagram showing a standby signal of the switching power supply device of FIG. 1 and a control signal of a main switch at this time.

FIG. 4 is a circuit diagram showing a switching power supply according to the first embodiment of the present invention.

FIG. 5 is a block diagram showing a switch control signal forming circuit of FIG. 4;

FIG. 6 is a circuit diagram illustrating a switch control signal forming circuit of FIG. 4 in detail.

FIG. 7 is a waveform diagram showing a state of each unit in FIGS. 4 and 6 in a normal mode.

8 is a waveform chart showing a state of each unit in FIG. 4 in a standby mode.

FIG. 9 is a circuit diagram showing a switching power supply device according to a second embodiment of the present invention.

FIG. 10 is a circuit diagram showing a switching power supply according to a third embodiment of the present invention.

[Explanation of symbols]

 2 Transformer 3 Primary winding 4 Main switch 22 First control power supply circuit 26 Second control power supply circuit 33 Voltage control transistor 37 Standby control transistor 41 Standby light emitting diode 42 Standby phototransistor 43 Control power supply Transistor for off 44 Transistor for off control

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-2000-23458 (JP, A) JP-A-8-294274 (JP, A) JP-A 8-205399 (JP, A) JP-A-10-28375 (JP, A) JP-A-7-123341 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H02M 3/28

Claims (9)

(57) [Claims] 1. A DC-DC converter circuit having at least one switch for turning on / off a voltage of a DC power supply, and a switch control signal for turning on / off the switch, forming a switch control signal. A switch control signal forming circuit for supplying a control signal to the switch, a control power supply circuit for supplying power to the switch control signal forming circuit, and a load connected to the converter circuit is a normal load. A first mode designating signal consisting of a series of one voltage level is generated, and when the load is lighter or lighter than the normal load, the first voltage level and the second voltage level are changed. A second mode designating signal comprising an intermittent signal which is arranged alternately and wherein the section of the first voltage level is set longer than the ON / OFF cycle of the switch under a normal load. Means for generating a mode designating signal, and the control power supply circuit for a part of the switch control signal forming circuit when the output of the second voltage level is generated from the mode designating signal generating means. Power control means for limiting or interrupting the power supply from the power supply, and wherein the switch control signal forming circuit is adapted to generate the first voltage level signal when the mode designating signal generating means generates the signal of the first voltage level. A switching power supply device for controlling on / off of a switch and keeping the switch in an off state when a signal of the second voltage level is generated from the mode designation signal generating means. 2. A DC-DC converter circuit having at least one switch for turning on and off a voltage of a DC power supply, and forming a switch control signal for controlling on / off of the switch. A switch control signal forming circuit for supplying a control signal to the switch; a first control power supply circuit for supplying a first value voltage to a first portion of the switch control signal forming circuit; The first part of the signal forming circuit
And a second control power supply circuit for supplying a voltage having a second value lower than the value of the constant voltage and a first voltage when the load connected to the converter circuit is a normal load. A first mode designating signal consisting of a series of levels is generated, and when the load is lighter or lighter than the normal load, the first voltage level and the second voltage level are alternately arranged. A mode designation signal generating means for generating a second mode designation signal comprising an intermittent signal in which the section of the first voltage level is set longer than the ON / OFF cycle of the switch under a normal load. And supplying power from the second control power supply circuit to a second portion of the switch control signal forming circuit when an output of the second voltage level is generated from the mode designating signal generating means. To limit or block Power control means, wherein the switch control signal forming circuit controls on / off of the switch when the signal of the first voltage level is generated from the mode designating signal generating means, A switching power supply unit that keeps the switch in an off state when a signal of the second voltage level is generated from a node designation signal generating unit. 3. A DC-DC converter circuit having at least one switch for turning on and off a voltage of a DC power supply, and forming a switch control signal for controlling on / off of the switch. A switch control signal forming circuit for supplying a control signal to the switch, a control power supply circuit for supplying power to the switch control signal forming circuit, and a load connected to the converter circuit is a normal load. A first mode designating signal consisting of a series of one voltage level is generated, and when the load is lighter or lighter than the normal load, the first voltage level and the second voltage level are changed. A second mode designating signal comprising an intermittent signal which is arranged alternately and wherein the section of the first voltage level is set longer than the ON / OFF cycle of the switch under a normal load. A mode designating signal generating means for generating, and when the output of the second voltage level is generated from the mode designating signal generating means, the control power supply circuit for all of the switch control signal forming circuits. Power control means for limiting or interrupting the supply of power to the power supply, wherein the switch control signal forming circuit is configured to output the first voltage level signal when the mode designating signal generating means generates the signal of the first voltage level. A switching power supply device for controlling on / off of a switch and keeping the switch in an off state when a signal of the second voltage level is generated from the mode designation signal generating means. 4. A voltage feedback control signal forming means for detecting a voltage of the load, forming a voltage feedback control signal, and supplying the voltage feedback control signal to the switch control signal forming circuit in order to control the voltage of the load constant. The switching power supply according to claim 4, wherein a part of the voltage feedback control signal forming means is connected to the control power supply circuit via the power control means. 5. A series circuit of a primary winding having a transformer inductance connected between a pair of DC power supply terminals and a controllable switch, and a series circuit electromagnetically coupled to the primary winding.
A secondary winding, a rectifying / smoothing circuit connected to the secondary winding for supplying a DC voltage to a load, and a voltage feedback control signal for detecting an output voltage of the rectifying / smoothing circuit to form a voltage feedback control signal. A forming circuit, current detecting means for detecting a current flowing through the switch and outputting a current feedback control signal, and adding means for adding the voltage feedback control signal to the current feedback control signal to form a composite feedback control signal. Forming a switch control signal for controlling on / off of the switch so as to control the output voltage of the rectifying / smoothing circuit to be constant using the combined feedback control signal supplied from the adding means; A switch control signal forming circuit for supplying a control signal to the switch; a control power supply circuit for supplying power to the switch control signal forming circuit; When there is a first mode consisting of a continuous first voltage level - a de designation signal generated, wherein when the load is the light load or no load lighter than normal load,
A first voltage level and a second voltage level are alternately arranged, and a section of the first voltage level includes an intermittent signal set to be longer than an on / off cycle of the switch under a normal load. A mode designating signal generating means for generating a mode designating signal of the above-mentioned mode, and one of the switch control signal forming circuits when the output of the second voltage level is generated from the mode designating signal generating means. Power control means for limiting or interrupting the supply of power from the control power supply circuit to the power supply unit. The switch control signal forming circuit is configured to output the first voltage level from the mode designating signal generating means. The switch is turned on and off when a signal is being generated, and the switch is kept off when a signal of the second voltage level is being generated from the mode designating signal generating means. And a switching power supply device. 6. A series circuit of a primary winding having a transformer inductance connected between a pair of DC power supply terminals and a controllable switch, and a series circuit electromagnetically coupled to the primary winding.
A secondary winding, a rectifying / smoothing circuit connected to the secondary winding for supplying a DC voltage to a load, and a voltage feedback control signal for detecting an output voltage of the rectifying / smoothing circuit to form a voltage feedback control signal. A forming circuit, current detecting means for detecting a current flowing through the switch and outputting a current feedback control signal, and adding means for adding the voltage feedback control signal to the current feedback control signal to form a composite feedback control signal. Forming a switch control signal for controlling on / off of the switch so as to control the output voltage of the rectifying / smoothing circuit to be constant using the combined feedback control signal supplied from the adding means; A switch control signal forming circuit for supplying a control signal to the switch; and a first control voltage for supplying a first value voltage to a first portion of the switch control signal forming circuit. And a circuit, said switch control signal forming the first to the second portion of the circuit
And a second control power supply circuit for supplying a voltage of a second value that is lower than the value of the first voltage and a constant value. When the load is a normal load, the second control power supply circuit includes a continuous first voltage level. 1 when a mode designation signal is generated and the load is lighter or lighter than the normal load.
A first voltage level and a second voltage level are alternately arranged, and a section of the first voltage level includes an intermittent signal set to be longer than an on / off cycle of the switch under a normal load. A mode designating signal generating means for generating a mode designating signal of the following; and the second mode of the switch control signal forming circuit when the output of the second voltage level is generated from the mode designating signal generating means. Power control means for restricting or cutting off the power supply from the second control power supply circuit to the second part, wherein the switch control signal forming circuit comprises:
When the signal of the first voltage level is generated from the mode specifying signal generating means, the switch is controlled to be turned on and off, and the mode specifying signal generating means generates the signal of the second voltage level. A switching power supply, wherein the switch is kept in an off state when the switch is on. 7. The control signal forming circuit compares a reference voltage source, the combined feedback control signal and a reference voltage of the reference voltage source, and outputs a signal indicating the end of the on-time of the switch. A sawtooth-wave generating capacitor, a capacitor charging circuit that supplies a charging current to the sawtooth-wave generating capacitor, and stops supplying the charging current when a signal indicating the end of the on-time is generated. A discharging resistor connected in parallel to the sawtooth wave generating capacitor; and a voltage higher than the voltage of the sawtooth wave generating capacitor when the sawtooth wave generating capacitor is charged by the charging circuit. A reference voltage generating circuit for generating a reference voltage having a level lower than the voltage of the sawtooth wave generating capacitor when the wave generating capacitor is not charged by the charging circuit; A comparison circuit that compares the voltage of the wave generation capacitor with the reference voltage and generates a square wave pulse when the voltage of the sawtooth wave generation capacitor is lower than the reference voltage; and between the comparison circuit and the switch. A switch drive circuit connected to the switch for driving the switch on during the generation of the square wave pulse; and stopping and controlling the charging of the sawtooth wave generating capacitor by the charging circuit during the switch off period, and the reference voltage. 7. The switching power supply according to claim 5, further comprising: an off-hold circuit for maintaining a reference voltage of the generation circuit lower than a voltage of the sawtooth wave generation capacitor. 8. The first control power supply circuit according to claim 1, wherein
A constant voltage diode for a reference voltage connected via a resistor between a first power supply line for supplying the first voltage of the control power supply circuit and a ground, and an npn-type constant voltage control transistor The collector of the constant voltage control transistor is connected to a line for supplying the first voltage, and the emitter is connected to a second power supply line for outputting a voltage of a second value. The power control means has a power control transistor connected between the base of the constant voltage control transistor and ground, and the power control means is connected to the constant voltage diode. 7. The switching power supply according to claim 6, wherein the transistor for use is turned on when the output of the second voltage level is generated from the mode designating signal generating means. 9. An off-control transistor connected between an output line of the comparison circuit and ground, wherein the off-control transistor is connected to the second signal from the mode designating signal generation signal means. 9. The switching power supply according to claim 7, wherein the switching power supply is turned on when a voltage level output is being generated, and prevents the generation of the square wave pulse.