JP3328138B2 - Clock receiving circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock receiving circuit of a multiplex transmission apparatus having a function of detecting disconnection in a clock receiving section.

[0002]

2. Description of the Related Art Conventionally, multiplex transmission devices (for example, IMU
In the clock receiving circuit of the X device (interface / max device), the 64 k + 8 k bipolar clock is terminated by the transformer unit 1 as shown in FIG. The alarm was monitored and a clock was sent to the PG (pulse generator) unit 7. In the clock receiving circuit, the input level of the 64k + 8k bipolar clock is a predetermined value, for example, 0.63V _{0-p (0volt-peak).}
Because they are defined in ~1.1V _0-p, if thread holds the level of the comparator unit 3 is 0.63V, upon receiving the lower input level, the output of the comparator unit 3 is at "L" level The state is fixed, and the disconnection detection unit 5 detects the fixed state at the “L” level, and an input alarm is generated.

[0003]

However, in the above-mentioned conventional clock receiving circuit, the output level is 0.65V _{0-p and} the threshold level (0.63V) as shown in FIG. When noise or the like occurs at the peak level of the 64k + 8k bipolar clock due to environmental problems or the like, the peak level becomes a value lower than the threshold level in the noise portion, as shown in FIG.
As shown in (1), since the comparator unit 3 outputs an "L" level signal in the noise-corresponding portion, so-called pulse cracking occurs, and there is a problem that a normal pulse is not generated in the PG unit 7. Further, in the above-described conventional clock receiving circuit, since the disconnection detection unit 5 detects the fixed state of the signal level within a certain time and generates an input alarm, the disconnection detection unit 5 generates the input alarm within a certain time (the above-described case). In a situation where "L" level and "H" level are repeated within one pulse (in the example, no alarm is generated, and an abnormal pulse is generated despite no alarm generation. was there. The present invention has been made in view of the above circumstances, and provides a clock receiving circuit that does not cause pulse cracking even when a peak level becomes lower than a threshold level due to noise. It aims at improvement.

[0004]

According to a first aspect of the present invention, there is provided a clock receiving circuit configured to receive a clock from a transformer unit and receive a clock from the transformer unit with reference to a predetermined threshold level. An input level monitoring comparator for sending an L level or H level signal to the disconnection detector with respect to the input clock, and a value lower than a threshold level of the input level monitoring comparator while receiving the clock from the transformer. And a clock conversion comparator section for converting the input clock into a clock and sending the converted clock to the pulse generator section.

In the clock receiving circuit configured as described above, the output from the transformer section is received by the input level monitoring comparator section and the clock conversion comparator section, and the threshold level of the clock conversion comparator section is input. Since the input level is set lower than the threshold level of the level monitoring comparator section, even if the input level is low and affected by noise, no pulse cracking occurs in the clock conversion comparator section. A clock is generated.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the clock receiving circuit according to the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram of a clock receiving circuit according to the present invention, and FIG. 2 is an operation time chart of the clock receiving circuit of the present invention. In the clock receiving circuit according to this embodiment,
An input level monitoring comparator unit 13 and a clock conversion comparator unit 15 are connected to a transformer unit 11 that receives a 64k + 8k bipolar clock. The input level monitoring comparator 13 sets the threshold level to 0.63 V and is connected to the disconnection detector 17 to monitor the input level as in the conventional case.

On the other hand, the clock conversion comparator 15
Is set to a threshold level lower than that of the input level monitoring comparator unit 13 (0.3 V in this example). The PG unit 19 is connected to the clock conversion comparator unit 15. The PG unit 19 generates a predetermined clock based on the clock received from the clock conversion comparator unit 15, and sends the generated clock to another circuit.

In the clock receiving circuit configured as described above, a bipolar clock of 64k + 8k is supplied to the transformer unit 1.
The input level is monitored by an input level monitoring comparator unit 13 having a threshold level of 0.63 V and a disconnection detection unit 17 detecting the output. Therefore, similarly to the conventional case, for example, when the input level from the transformer unit 11 becomes, for example, 0.63 V or less, the input level monitoring comparator unit 13 outputs an “L” level signal, which is maintained for a certain period of time. When the state is changed, that is, when the state is fixed, the disconnection detecting unit 17 generates an alarm.

If the output level is close to the threshold level (0.63 V), such as 0.65 V _0-p , if noise occurs at the peak level of the 64k + 8k bipolar clock due to environmental problems or the like. , The peak level becomes a value lower than the threshold level in the noise portion, and the input level monitoring comparator 13 generates a pulse crack. In this case as well, the same reason as in the prior art, that is, since the “L” level and the “H” level are repeated within a certain time (in other words, because the state is not fixed for a certain time), the disconnection detection unit 17 Do not generate an alarm.

On the other hand, the clock conversion comparator 15
Is that the threshold level is set at 0.3 V, so that even if noise occurs as shown in FIG. 2A, the peak level does not become lower than the threshold level in the noise portion. A normal clock without pulse cracks shown in FIG. 2 (B) is generated. Then, the normally generated clock is sent to the PG unit 19, and the PG unit 19 that has received the clock generates a predetermined clock based on the normal clock and sends it to another circuit.

As described above, according to the clock receiving circuit described above, the output from the transformer section 11 is supplied to the input level monitoring comparator section 13 and the clock conversion comparator section 1.
5 and the threshold level of the input level monitoring comparator unit 13 is set to the prescribed 0.63 V, while the threshold level of the clock conversion comparator unit 15 is set to a lower value, for example, 0.3 V. Therefore, while the input level can be monitored by the input level monitoring comparator unit 13 as in the related art, 64k + 8k
Even when the input level of the bipolar clock is low and is affected by noise, the clock conversion comparator unit 1 with the threshold level set low.
5, a normal clock can be generated.

In the above-described embodiment, an IMUX device has been described as an example.
As long as the clock receiving unit has a disconnection detection function by voltage monitoring or the like, it can be applied to other multiplex transmission devices.

[0013]

As described above in detail, according to the clock receiving circuit of the present invention, the input level monitoring comparator section and the clock conversion comparator section are connected to the transformer section, and the clock conversion comparator section is connected to the transformer section. Since the threshold level is set lower than the threshold level of the input level monitoring comparator section, pulse cracking occurs in the clock conversion comparator section even when the input level is low and affected by noise. Therefore, a normal clock can be generated. As a result, the reliability of the clock receiving circuit can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of a clock receiving circuit according to the present invention.

FIG. 2 is an operation time chart of the clock receiving circuit of the present invention.

FIG. 3 is a block diagram of a conventional clock receiving circuit.

FIG. 4 is an operation time chart of a conventional clock receiving circuit.

[Explanation of symbols]

 11 Transformer 13 Input level monitoring comparator section 15 Clock conversion comparator section 17 Disconnection detection section 19 Pulse generator section

Claims (1)

(57) [Claims] 1. A transformer section, and an input level monitoring comparator for receiving a clock from the transformer section and sending an L level or H level signal with respect to the input clock to a disconnection detection section based on a predetermined threshold level And a unit for receiving a clock from the transformer unit and having a threshold level lower than the threshold level of the input level monitoring comparator unit, converting the input clock into a clock and sending it to the pulse generator unit. A clock receiving circuit, comprising: a clock conversion comparator unit.