JP3333219B2 - Compound semiconductor light emitting device - Google Patents
Compound semiconductor light emitting deviceInfo
- Publication number
- JP3333219B2 JP3333219B2 JP30014491A JP30014491A JP3333219B2 JP 3333219 B2 JP3333219 B2 JP 3333219B2 JP 30014491 A JP30014491 A JP 30014491A JP 30014491 A JP30014491 A JP 30014491A JP 3333219 B2 JP3333219 B2 JP 3333219B2
- Authority
- JP
- Japan
- Prior art keywords
- type
- epitaxial growth
- layer
- growth layer
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
- H10W72/07553—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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- Led Device Packages (AREA)
- Led Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】この発明は、例えば電光表示板、
センサ光源等に用いられる高輝度、高効率の化合物半導
体発光素子(LED素子)に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a high-brightness, high-efficiency compound semiconductor light emitting device (LED device) used for a sensor light source or the like.
【0002】[0002]
【従来の技術】図1は、従来の化合物半導体発光素子を
示すものであり、図1(a)はその平面図、図1(b)
はその側面図である。N型化合物半導体基板1の上には
N型エピタキシャル成長層2が形成され、このN型エピ
タキシャル成長層2の上にはP型エピタキシャル成長層
3が形成され、これらのP型エピタキシャル成長層3お
よびN型エピタキシャル成長層2により、PN接合が形
成されている。P型エピタキシャル成長層3の上には図
1(a)に示すように、PEP(Photo Engraving Proc
ess )工程によりP型電極4がパタ−ニングされる。こ
の後、オ−ミック性を向上させるための熱処理が行わ
れ、前記P型電極4と導電性ワイヤ−5の一端とが接続
される。この導電性ワイヤ−5の他端は電極端子6に接
続される。前記N型化合物半導体基板1の下にはN型電
極7が形成され、このN型電極7は導電性ステム8に接
続される。さらに、これら全体がモ−ルド樹脂9により
覆われている。前記P型電極4はAu−Be合金からな
っており、N型電極7はAu−Ge合金からなってい
る。2. Description of the Related Art FIG. 1 shows a conventional compound semiconductor light emitting device. FIG. 1 (a) is a plan view and FIG. 1 (b).
Is a side view thereof. An N-type epitaxial growth layer 2 is formed on an N-type compound semiconductor substrate 1, and a P-type epitaxial growth layer 3 is formed on the N-type epitaxial growth layer 2. These P-type epitaxial growth layer 3 and N-type epitaxial growth layer 2, a PN junction is formed. As shown in FIG. 1A, PEP (Photo Engraving Proc) is formed on the P-type epitaxial growth layer 3.
The P-type electrode 4 is patterned by the ess) process. Thereafter, a heat treatment for improving ohmic properties is performed, and the P-type electrode 4 and one end of the conductive wire 5 are connected. The other end of the conductive wire 5 is connected to the electrode terminal 6. An N-type electrode 7 is formed below the N-type compound semiconductor substrate 1, and the N-type electrode 7 is connected to a conductive stem 8. Further, the entirety is covered with a mold resin 9. The P-type electrode 4 is made of an Au-Be alloy, and the N-type electrode 7 is made of an Au-Ge alloy.
【0003】[0003]
【発明が解決しようとする課題】ところで、Au系合金
はPN接合近傍で発生された光の波長に対して吸収体と
なる。このため、P型電極4は図1(a)に示す如くパ
タ−ニングされ、P型エピタキシャル成長層3のうちP
型電極4から露出された面から光が取り出される。この
露出されたP型エピタキシャル成長層3の表面にはフロ
スト処理により凹凸が形成されており、光が均一に放射
されるようにしている。The Au-based alloy becomes an absorber for the wavelength of light generated near the PN junction. Therefore, the P-type electrode 4 is patterned as shown in FIG.
Light is extracted from the surface exposed from the mold electrode 4. Irregularities are formed on the exposed surface of the P-type epitaxial growth layer 3 by frost processing so that light is uniformly emitted.
【0004】しかしながら、PN接合近傍で発生した光
の放射面としてのP型エピタキシャル成長層3の表面に
発生波長に対して吸収体となるP型電極4を設けている
ため、この電極4の面積により発光効率および輝度が左
右されるという問題を有していた。However, since the P-type electrode 4 serving as an absorber for the generated wavelength is provided on the surface of the P-type epitaxial growth layer 3 as a radiation surface of the light generated near the PN junction, the area of the electrode 4 depends on the area of the electrode 4. There is a problem that the luminous efficiency and the luminance are affected.
【0005】上記の問題を改善するために、P型電極の
面積を小さくすることが考えられる。しかし、この電極
近傍のキャリア注入条件とその周辺のキャリア注入条件
とが異なるため、PN接合近傍において発光むらが生じ
たり、電極近傍しか発光しないことがあった。In order to improve the above problem, it is conceivable to reduce the area of the P-type electrode. However, since the carrier injection condition near the electrode and the carrier injection condition around the electrode are different, uneven light emission may occur near the PN junction, or light may only emit near the electrode.
【0006】また、P型電極の厚さを薄くすることも考
えられる。この場合、P型エピタキシャル成長層の露出
面積を一定とし、P型電極4を厚くした場合と同程度の
輝度を得られる範囲で充分な薄膜化を行った。しかし、
この薄膜化した電極は連続膜としての均一性が悪いた
め、電極としての信頼性が低く、実用化できないもので
あった。It is also conceivable to reduce the thickness of the P-type electrode. In this case, the exposed area of the P-type epitaxial growth layer was kept constant, and the film was sufficiently thinned in a range where the same luminance as in the case where the P-type electrode 4 was thickened was obtained. But,
Since the thinned electrode has poor uniformity as a continuous film, its reliability as an electrode is low and cannot be put to practical use.
【0007】一方、上記従来の半導体発光素子において
は、P型エピタキシャル成長層3の上にP型電極4が形
成された後、オ−ミック性を向上させるための熱処理が
行われる。この際、P型電極4におけるAu等の重金属
がP型エピタキシャル成長層3にド−ピングされ、この
P型エピタキシャル成長層3に重金属の高濃度拡散領域
が形成される。このため、このエピタキシャル成長層3
において光が吸収され、化合物半導体発光素子の発光効
率および輝度が低下するという問題を有していた。On the other hand, in the above-described conventional semiconductor light emitting device, after the P-type electrode 4 is formed on the P-type epitaxial growth layer 3, a heat treatment for improving ohmic properties is performed. At this time, a heavy metal such as Au in the P-type electrode 4 is doped into the P-type epitaxial growth layer 3, and a heavy metal diffusion region is formed in the P-type epitaxial growth layer 3. Therefore, the epitaxial growth layer 3
However, there is a problem that light is absorbed and the luminous efficiency and luminance of the compound semiconductor light emitting device are reduced.
【0008】この発明は上記のような事情を考慮してな
されたものであり、その目的はPN接合近傍における内
部発光の均一性を向上し、放射光がP型電極およびP型
エピタキシャル成長層の不純物によって吸収されること
なく、発光効率および輝度を向上することが可能な化合
物半導体発光素子を提供することにある。The present invention has been made in view of the above circumstances, and has as its object to improve the uniformity of internal light emission near a PN junction and to radiate light to a P-type electrode and an impurity in a P-type epitaxial growth layer. An object of the present invention is to provide a compound semiconductor light emitting device capable of improving luminous efficiency and luminance without being absorbed by light.
【0009】[0009]
【課題を解決するための手段】この発明は、上記課題を
解決するため、化合物半導体基板の上にエピタキシャル
成長により設けられた第1導電型の第1のエピタキシャ
ル成長層と、前記第1のエピタキシャル成長層の上に設
けられ、表面に凹凸を有する第2導電型の第2のエピタ
キシャル成長層と、前記第2のエピタキシャル成長層の
上の全面に設けられた発光波長に対して50%以上の透
過率を有する酸化物又は高分子系材料の第1の透明電極
と、前記化合物半導体基板の下に設けられた発光波長に
対して50%以上の透過率を有する酸化物の第2の透明
電極とを具備し、前記第2のエピタキシャル成長層は前
記第1の透明電極と接する側の表面の不純物濃度が1×
1019 atoms/cm3 以下であり、前記化合物半導体基
板は前記第1のエピタキシャル成長層と接する側の表面
の不純物濃度が1×1019 atoms/cm3 以下に設定さ
れている。In order to solve the above-mentioned problems, the present invention provides a first epitaxial growth layer of a first conductivity type provided on a compound semiconductor substrate by epitaxial growth, and a first epitaxial growth layer of the first conductivity type. A second epitaxial growth layer of a second conductivity type, which is provided on the second epitaxial growth layer and has an unevenness on the surface; and an oxide having a transmittance of 50% or more with respect to the emission wavelength provided on the entire surface of the second epitaxial growth layer. And a first transparent electrode made of a material or a polymer-based material and an emission wavelength provided below the compound semiconductor substrate.
A second transparent electrode made of an oxide having a transmittance of 50% or more, and the second epitaxial growth layer has an impurity concentration of 1 × on a surface in contact with the first transparent electrode.
10 19 atoms / cm 3 or less, and the impurity concentration of the surface of the compound semiconductor substrate on the side in contact with the first epitaxial growth layer is set to 1 × 10 19 atoms / cm 3 or less.
【0010】[0010]
【作用】この発明は、第1導電型の第1のエピタキシャ
ル成長層の上に第2導電型の第2のエピタキシャル成長
層を設けている。この第2のエピタキシャル成長層の上
に発光波長に対して50%以上の透過率を有する第2導
電型の第1の電極を設けているため、この第1の電極に
よる光の吸収を抑制できる。さらに、前記第2のエピタ
キシャル成長層は第1の電極と接する側の表面の不純物
濃度を1×1019 atoms/cm3 以下としている。この
ため、第2のエピタキシャル成長層および化合物半導体
基板の不純物による光の吸収が抑制される。また、前記
第1の電極は第2のエピタキシャル成長層上の全面に設
けられているため、第1のエピタキシャル成長層および
第2のエピタキシャル成長層の接合部近傍における内部
発光の均一性が向上する。According to the present invention, a second conductive type second epitaxial growth layer is provided on a first conductive type first epitaxial growth layer. Since the first electrode of the second conductivity type having a transmittance of 50% or more with respect to the emission wavelength is provided on the second epitaxial growth layer, light absorption by the first electrode can be suppressed. Further, the second epitaxial growth layer has an impurity concentration of 1 × 10 19 atoms / cm 3 on the surface in contact with the first electrode. It is as follows. Therefore, light absorption by impurities in the second epitaxial growth layer and the compound semiconductor substrate is suppressed. In addition, since the first electrode is provided on the entire surface of the second epitaxial growth layer, the uniformity of internal light emission near the junction between the first epitaxial growth layer and the second epitaxial growth layer is improved.
【0011】[0011]
【実施例】以下、図面を参照してこの発明の一実施例に
ついて説明する。An embodiment of the present invention will be described below with reference to the drawings.
【0012】図2(a)乃至図2(f)は、AlGaA
s/GaAs系の赤外発光素子の製造工程を示すもので
ある。先ず、P型GaAs基板10には濃度1×1018
atoms/cm3 のSi(シリコン)がド−プされる。こ
のP型GaAs基板10の上には図2(b)に示すよう
に濃度1×1018 atoms/cm3 のSiがド−プされた
P型AlGaAsエピタキシャル成長層11が形成され
る。このエピタキシャル層11の厚さは50〜100μ
m程度である。このエピタキシャル層11の上には図2
(c)に示すように濃度5×1018 atoms/cm3 のS
iがド−プされたN型AlGaAsエピタキシャル成長
層12が形成され、このエピタキシャル層12の厚さは
50〜100μm程度である。前記エピタキシャル層1
1とエピタキシャル層12との接合面にPN接合が形成
される。このエピタキシャル層12の表面上には図2
(d)に示すようにフロスト処理により凹凸13が形成
される。前記N型エピタキシャル層12の上には図2
(e)に示すようにSnを濃度3%でド−プした厚さ5
000オングストロ−ムのIn2 O3 層15がスパッタ
リング法により堆積される。このIn2 O3 層15によ
り発光波長に対して50%以上の透過率を有する上部透
明電極16が形成される。前記P型GaAs基板10の
下には図2(f)に示すようにZnを濃度5%でド−プ
した厚さ1μmのIn2 O3 層17がスパッタリング法
により堆積され、このIn2 O3 層17により下部透明
電極18が形成される。このように構成した発光素子1
9を300μm角のペレット20状に切断する。FIGS. 2A to 2F show AlGaAs.
3 illustrates a process for manufacturing an s / GaAs-based infrared light emitting device. First, the P-type GaAs substrate 10 has a concentration of 1 × 10 18.
atoms / cm 3 Of Si (silicon) is doped. As shown in FIG. 2B, the P-type GaAs substrate 10 has a concentration of 1 × 10 18 atoms / cm 3. A P-type AlGaAs epitaxial growth layer 11 doped with Si is formed. The thickness of the epitaxial layer 11 is 50 to 100 μm.
m. On top of this epitaxial layer 11, FIG.
As shown in (c), the concentration is 5 × 10 18 atoms / cm 3 S
An N-type AlGaAs epitaxial growth layer 12 doped with i is formed, and the thickness of the epitaxial layer 12 is about 50 to 100 μm. The epitaxial layer 1
A PN junction is formed at the junction surface between the semiconductor device 1 and the epitaxial layer 12. On the surface of the epitaxial layer 12, FIG.
As shown in FIG. 3D, the unevenness 13 is formed by the frost process. On the N-type epitaxial layer 12, FIG.
As shown in (e), a thickness of 5% when Sn is doped at a concentration of 3%.
A 2000 Å In 2 O 3 layer 15 is deposited by sputtering. The In 2 O 3 layer 15 forms an upper transparent electrode 16 having a transmittance of 50% or more with respect to the emission wavelength. The P-type GaAs de of Zn as shown in FIG. 2 (f) below the substrate 10 at a concentration of 5% - In 2 O 3 layer 17 having a thickness of 1μm was flop is deposited by sputtering, the In 2 O The lower transparent electrode 18 is formed by the three layers 17. Light-emitting element 1 thus configured
9 is cut into pellets 20 of 300 μm square.
【0013】図3(a)は、AlGaAs/GaAs系
の赤外発光素子を示す平面図であり、図3(b)は、そ
の側面図である。前記の300μm角のペレット20状
に切断された発光素子19における上部透明電極16に
はAu等からなる導電性ワイヤ21の一端22が接続さ
れ、この導電性ワイヤ21の他端23は電極端子24に
接続される。前記発光素子19における下部透明電極1
8には導電性ステム25の一端26が図示せぬ導電性マ
ウント材、例えばAgペ−ストによって接続され、発光
素子19全体が透光性モ−ルド樹脂29によって覆われ
る。この透光性モ−ルド樹脂29から前記導電性ステム
25の他端27が突出している。FIG. 3A is a plan view showing an AlGaAs / GaAs infrared light emitting device, and FIG. 3B is a side view thereof. One end 22 of a conductive wire 21 made of Au or the like is connected to the upper transparent electrode 16 of the light emitting element 19 cut into a pellet 20 of 300 μm square, and the other end 23 of the conductive wire 21 is an electrode terminal 24. Connected to. Lower transparent electrode 1 in light emitting element 19
To 8, one end 26 of a conductive stem 25 is connected by a conductive mounting material (not shown), for example, an Ag paste, and the entire light emitting element 19 is covered with a light-transmitting mold resin 29. The other end 27 of the conductive stem 25 protrudes from the translucent mold resin 29.
【0014】上記実施例によれば、上部および下部透明
電極16、18を発光波長に対して50%以上の透過率
を有するIn2 O3 層15、17によって形成してい
る。このため、N型AlGaAsエピタキシャル成長層
12から放射される光が上部透明電極16によって殆ど
吸収されることがなく、発光効率および輝度を向上でき
る。また、フロスト処理により、N型AlGaAsエピ
タキシャル成長層12の表面上に凹凸13を形成してい
るため、この凹凸13により発生された光が乱反射さ
れ、球状分散される。従って、N型AlGaAsエピタ
キシャル成長層12から放射される光の均一性を向上で
きる。さらに、上部透明電極16をN型AlGaAsエ
ピタキシャル成長層12上の全面に設けているため、P
N接合近傍における内部発光の均一性を向上できる。ま
た、従来の電極を形成するにはPEP工程が必要であっ
たが、N型AlGaAsエピタキシャル成長層12上の
全面に上部透明電極16を設けているから、この発明で
は不要となり製造コストを低減できる。According to the above embodiment, the upper and lower transparent electrodes 16 and 18 are formed by the In 2 O 3 layers 15 and 17 having a transmittance of 50% or more with respect to the emission wavelength. For this reason, the light emitted from the N-type AlGaAs epitaxial growth layer 12 is hardly absorbed by the upper transparent electrode 16, and the luminous efficiency and the luminance can be improved. In addition, since the unevenness 13 is formed on the surface of the N-type AlGaAs epitaxial growth layer 12 by the frost treatment, the light generated by the unevenness 13 is irregularly reflected and spherically dispersed. Therefore, the uniformity of light emitted from the N-type AlGaAs epitaxial growth layer 12 can be improved. Further, since the upper transparent electrode 16 is provided on the entire surface of the N-type AlGaAs epitaxial growth layer 12,
The uniformity of internal light emission near the N junction can be improved. Further, a PEP step was required to form a conventional electrode, but since the upper transparent electrode 16 is provided on the entire surface of the N-type AlGaAs epitaxial growth layer 12, the present invention becomes unnecessary and the manufacturing cost can be reduced.
【0015】尚、上記実施例において、N型AlGaA
sエピタキシャル成長層の上には不純物を添加したIn
2 O3 層を直接設けたが、先ず不純物を添加しない厚さ
数百オングストロ−ムのIn2 O3層を堆積し、このI
n2 O3 層の上に濃度5%のSnが添加された厚さ50
00オングストロ−ム程度のIn2 O3 層を堆積し、こ
の後、温度400℃で30分間シンタ−処理を行うこと
により、発光波長に対して50%以上の透過率を有する
上部透明電極を形成しても良い。In the above embodiment, the N-type AlGaAs
On the s epitaxial growth layer, an impurity-doped In
Although the 2 O 3 layer was directly provided, an In 2 O 3 layer having a thickness of several hundred angstroms without adding impurities was deposited first.
A thickness of 50 with Sn at a concentration of 5% added on the n 2 O 3 layer
An upper transparent electrode having a transmittance of 50% or more with respect to the emission wavelength is formed by depositing an In 2 O 3 layer of about 00 angstroms and then performing sintering at a temperature of 400 ° C. for 30 minutes. You may.
【0016】このような製造方法によっても前記実施例
と同様の効果を得ることができ、しかも不純物を添加し
ない厚さ数百オングストロ−ムのIn2 O3 層を堆積さ
せることにより、N型AlGaAsエピタキシャル成長
層の表面不純物濃度を前記実施例のそれより低くするこ
とができる。The same effect as in the above embodiment can be obtained by such a manufacturing method. In addition, by depositing an In 2 O 3 layer having a thickness of several hundred angstroms to which no impurity is added, N-type AlGaAs can be obtained. The surface impurity concentration of the epitaxial growth layer can be made lower than that of the above embodiment.
【0017】尚、上記実施例により製造された赤外発光
素子の光量および輝度をさらに向上させるには、前記下
部透明電極面にAl(アルミニウム)を蒸着させる工程
または前記ペレット周辺にミラ−を設ける工程を追加す
ると良い。Alを蒸着させると、PN接合から発した光
がこのAlにより反射され、上部透明電極における光量
が増加する。ミラ−を設けると、赤外発光素子の側面に
発した光がミラ−により反射され、赤外発光素子の輝度
が向上される。上記の追加工程における効果は上部透明
電極が発光波長に対して50%の透過率を有することに
より顕著となる。In order to further improve the light quantity and the brightness of the infrared light emitting device manufactured by the above embodiment, a step of depositing Al (aluminum) on the lower transparent electrode surface or providing a mirror around the pellet. It is good to add a process. When Al is deposited, light emitted from the PN junction is reflected by the Al, and the amount of light at the upper transparent electrode increases. When the mirror is provided, light emitted to the side surface of the infrared light emitting element is reflected by the mirror, and the luminance of the infrared light emitting element is improved. The effect of the above additional step becomes significant when the upper transparent electrode has a transmittance of 50% with respect to the emission wavelength.
【0018】図4は、この発明における上記実施例の効
果を示したものであり、エピタキシャル層上に透明電極
を全面形成および部分形成したAlGaAs/GaAs
系の赤外発光素子において、透明電極の透過率と発光効
率との関係を示したものである。前記部分形成とは透明
電極の面積がエピタキシャル層のそれの50%としたも
のである。図4に示すように、発光波長に対する透過率
が50%の透明電極を用いた場合、これを部分形成した
場合においても、従来の電極を用いた発光素子と同等の
発光効率が得られ、全面形成した場合は、部分形成した
場合に比べて200%の発光効率の向上が見られる。FIG. 4 shows the effect of the above embodiment of the present invention, in which AlGaAs / GaAs having a transparent electrode formed entirely and partially on an epitaxial layer.
FIG. 3 shows the relationship between the transmittance of a transparent electrode and the luminous efficiency in a system infrared light emitting device. The term "partial formation" means that the area of the transparent electrode is 50% of that of the epitaxial layer. As shown in FIG. 4, when a transparent electrode having a transmittance of 50% with respect to the emission wavelength is used, even when the transparent electrode is partially formed, the same luminous efficiency as a light emitting element using a conventional electrode can be obtained. When it is formed, the luminous efficiency is improved by 200% as compared with the case where it is partially formed.
【0019】図5は、SIMS(Secondary Ion Mass S
pectroscopy )分析により不純物濃度と深さとの関係を
示したものである。AlGaAs/GaAs系の赤外発
光素子の製造工程において、エピタキシャル層の上には
不純物を添加しない厚さ数百オングストロ−ムのIn2
O3 層が堆積される。このIn2 O3 層の上に濃度5%
のSnが添加された厚さ5000オングストロ−ム程度
のIn2 O3 層が堆積される。この後、温度600℃で
30分間のシンタ−が行われた発光素子および温度40
0℃で30分間のシンタ−が行われた発光素子をそれぞ
れ本発明Iおよび本発明IIとする。また、AuGeから
形成された電極を用いたLEDを従来例とする。これら
の本発明IおよびIIおよび従来例を同時にSIMS分析
し、エピタキシャル層の不純物の表面濃度とその深さと
の関係を調べた。この結果、従来の電極およびこの発明
の透明電極の形成条件によって、不純物の表面濃度が異
なることが分かる。本発明IおよびIIの不純物濃度は従
来例のそれに比べて低い。特に、本発明IIでは浅い部分
において不純物濃度が1×1019 atoms/cm3 以下と
なっている。FIG. 5 shows a SIMS (Secondary Ion Mass S
This shows the relationship between impurity concentration and depth by spectroscopy) analysis. In the manufacturing process of an AlGaAs / GaAs infrared light emitting device, several hundred angstroms of In 2 having a thickness of several hundred angstroms to which no impurity is added is formed on the epitaxial layer.
O 3 layer is deposited. 5% concentration on this In 2 O 3 layer
In addition, an In 2 O 3 layer having a thickness of about 5000 Å to which Sn is added is deposited. Thereafter, the light-emitting element was sintered at a temperature of 600 ° C. for 30 minutes and a temperature of 40 ° C.
Light-emitting elements which have been sintered at 0 ° C. for 30 minutes are referred to as present invention I and present invention II, respectively. An LED using an electrode formed of AuGe is a conventional example. Simultaneous SIMS analysis of the present inventions I and II and the conventional example were conducted to examine the relationship between the surface concentration of impurities in the epitaxial layer and the depth thereof. As a result, it can be seen that the surface concentration of impurities differs depending on the conditions for forming the conventional electrode and the transparent electrode of the present invention. The impurity concentrations of the present inventions I and II are lower than those of the conventional example. In particular, in the present invention II, the impurity concentration is 1 × 10 19 atoms / cm 3 in a shallow portion. It is as follows.
【0020】図6は、エピタキシャル層の表面不純物濃
度と発光効率との関係を示したものである。これより、
表面不純物濃度が1×1019 atoms/cm3 以上になる
と発光効率が低下することが分かる。この発光効率の低
下はエピタキシャル層の表面不純物から生ずる高濃度拡
散層で光が吸収されるためである。FIG. 6 shows the relationship between the surface impurity concentration of the epitaxial layer and the luminous efficiency. Than this,
Surface impurity concentration is 1 × 10 19 atoms / cm 3 It can be seen that the luminous efficiency decreases when the above is reached. This decrease in luminous efficiency is because light is absorbed by the high-concentration diffusion layer generated from surface impurities of the epitaxial layer.
【0021】上記のように、AlGaAs/GaAs系
の赤外発光素子は発光波長に対する透過率が50%以上
の透明電極を全面形成し、エピタキシャル層の表面不純
物濃度を1×1019 atoms/cm3 以下とし、P型Ga
As基板はP型AlGaAsエピタキシャル成長層と接
する側の表面の不純物濃度を1×1019 atoms/cm3
以下とすると、発光効率が大きく向上する。従って、こ
の発明の透明電極の形成条件により、高濃度拡散層によ
る光の吸収を回避でき、発光効率が向上することは明ら
かである。尚、この発明は上記実施例に限定されるもの
ではなく、以下のような変更が可能である。As described above, the AlGaAs / GaAs infrared light emitting device has a transparent electrode having a transmittance of 50% or more with respect to the emission wavelength formed on the entire surface, and the surface impurity concentration of the epitaxial layer is 1 × 10 19 atoms / cm 3. Below,
The As substrate has an impurity concentration of 1 × 10 19 atoms / cm 3 on the surface in contact with the P-type AlGaAs epitaxial growth layer.
When the following is set, the luminous efficiency is greatly improved. Therefore, it is clear that light absorption by the high concentration diffusion layer can be avoided and the luminous efficiency is improved by the conditions for forming the transparent electrode of the present invention. The present invention is not limited to the above embodiment, and the following modifications are possible.
【0022】前記上部透明電極はSnが濃度3%でド−
プされているが、この上部透明電極がN型AlGaAs
エピタキシャル成長層とオ−ミック接合を形成するド−
プ材であれば種々変更可能であり、ド−プ濃度3%もド
−プ材により変更しても良い。また、下部透明電極にお
いても同様に変更できる。また、上部透明電極の材料は
In2 O3 を用いているが、Sn2 O型の酸化物または
ポリチアジル等の高分子系材料を用いたものでも良い。The upper transparent electrode is doped with Sn at a concentration of 3%.
The upper transparent electrode is made of N-type AlGaAs.
Doping for forming an ohmic junction with the epitaxial growth layer
Various changes can be made as long as the doping material is used, and the doping concentration of 3% may be changed depending on the doping material. The same can be applied to the lower transparent electrode. Although the upper transparent electrode is made of In 2 O 3 , it may be made of a polymer material such as Sn 2 O-type oxide or polythiazyl.
【0023】また、前記基板およびエピタキシャル成長
層にはP型GaAs基板およびP型、N型AlGaAs
エピタキシャル成長層を用いて赤外発光素子を構成して
いるが、以下の組み合わせを用いることも可能である。Further, a P-type GaAs substrate and P-type and N-type AlGaAs are formed on the substrate and the epitaxial growth layer.
Although the infrared light emitting device is configured using the epitaxial growth layer, the following combinations may be used.
【0024】N型GaAs基板の上にLPE法(液相エ
ピタキシャル成長法)によりN型、P型GaAsエピタ
キシャル成長層を順次形成することにより、発光波長が
940nm程度の赤外発光素子を構成できる。By sequentially forming an N-type and a P-type GaAs epitaxial growth layer on the N-type GaAs substrate by the LPE method (liquid phase epitaxial growth method), an infrared light emitting device having an emission wavelength of about 940 nm can be formed.
【0025】N型GaAs基板の上にVPE法(気相エ
ピタキシャル成長法)によりN型、P型GaAsPエピ
タキシャル成長層を順次形成することにより、発光波長
が650nm程度の赤色発光素子を構成できる。By sequentially forming an N-type and a P-type GaAsP epitaxial growth layer on an N-type GaAs substrate by a VPE method (vapor phase epitaxial growth method), a red light-emitting element having an emission wavelength of about 650 nm can be formed.
【0026】N型GaP基板の上にLPE法によりN
型、P型GaPエピタキシャル成長層を順次形成するこ
とにより、発光波長が700nm乃至555nmの赤色
乃至緑色発光素子を構成できる。前記N型、P型GaP
エピタキシャル成長層にZn、Oをド−パントしたもの
は赤色発光素子を構成し、Nをド−パントしたものは黄
色乃至緑色発光素子を構成し、Teをド−パントしたも
のは緑色発光素子を構成する。An NPE is formed on an N-type GaP substrate by the LPE method.
By sequentially forming the p-type and p-type GaP epitaxial growth layers, a red to green light emitting device having an emission wavelength of 700 nm to 555 nm can be formed. N-type and P-type GaP
A layer in which Zn and O are doped in the epitaxial growth layer constitutes a red light emitting element, a layer in which N is doped is a yellow to green light emitting element, and a layer in which Te is doped constitutes a green light emitting element. I do.
【0027】N型GaP基板の上にVPE法によりN
型、P型GaAsPエピタキシャル成長層を順次形成す
ることにより、発光波長が630nm乃至590nmの
橙色乃至黄色発光素子を構成できる。発光波長はAsの
組成比によって異なる。An N-type GaP substrate is coated with N by a VPE method.
By sequentially forming the p-type and p-type GaAsP epitaxial growth layers, an orange to yellow light emitting device having an emission wavelength of 630 nm to 590 nm can be formed. The emission wavelength differs depending on the composition ratio of As.
【0028】N型GaAs基板の上にLPE法によりN
型、P型InGaAlPエピタキシャル成長層およびP
型GaAlAsエピタキシャル成長層を順次形成するこ
とにより、発光波長が560nm乃至620nmの緑色
乃至橙色発光素子を構成できる。発光波長はAlの組成
比によって異なる。On an N-type GaAs substrate, NPE is formed by the LPE method.
-Type, P-type InGaAlP epitaxial growth layer and P
By sequentially forming the type GaAlAs epitaxial growth layers, a green to orange light emitting device having a light emission wavelength of 560 nm to 620 nm can be formed. The emission wavelength varies depending on the Al composition ratio.
【0029】N型SiC基板の上にLPE法によりN
型、P型SiCエピタキシャル成長層を順次形成するこ
とにより、発光波長が470nm程度の青色発光素子を
構成できる。An NPE is formed on an N-type SiC substrate by the LPE method.
A blue light emitting device having a light emission wavelength of about 470 nm can be formed by sequentially forming the p-type and p-type SiC epitaxial growth layers.
【0030】N型ZnSe基板の上にLPE法によりN
型、P型ZnSeエピタキシャル成長層を順次形成する
ことにより、発光波長が480nm程度の青色発光素子
を構成できる。上記各構成において、上部および下部透
明電極は前述した実施例と同様である。An NPE is formed on an N-type ZnSe substrate by the LPE method.
By sequentially forming the p-type and p-type ZnSe epitaxial growth layers, a blue light emitting device having an emission wavelength of about 480 nm can be formed. In each of the above structures, the upper and lower transparent electrodes are the same as in the above-described embodiment.
【0031】[0031]
【発明の効果】以上説明したようにこの発明によれば、
表面に凹凸を有する第2導電型の第2のエピタキシャル
成長層上の全面に発光波長に対して50%以上の透過率
を有する酸化物又は高分子系材料の第1の透明電極を設
け、化合物半導体基板の裏面に発光波長に対して50%
以上の透過率を有する酸化物の第2の透明電極を設けて
いる。第2のエピタキシャル成長層は第1の透明電極と
接する側の表面の不純物濃度を1×1019 atoms/cm
3 以下とし、化合物半導体基板は第1のエピタキシャル
成長層と接する側の表面の不純物濃度を1×1019 ato
ms/cm3 以下としている。従って、第1のエピタキシ
ャル成長層及び第2のエピタキシャル成長層の接合部近
傍における内部発光の均一性を向上し、放射光が第1の
透明電極及び第2のエピタキシャル成長層の不純物によ
って吸収されることなく、発光効率および輝度を向上す
ることができる。As described above, according to the present invention,
A first transparent electrode of an oxide or a polymer material having a transmittance of 50% or more with respect to an emission wavelength is provided on the entire surface of the second epitaxial growth layer of the second conductivity type having irregularities on the surface; 50% of the emission wavelength on the back of the substrate
A second transparent electrode made of an oxide having the above transmittance is provided. The second epitaxial growth layer has an impurity concentration of 1 × 10 19 atoms / cm on the surface in contact with the first transparent electrode.
3 or less, and the compound semiconductor substrate has an impurity concentration of 1 × 10 19 ato on the surface in contact with the first epitaxial growth layer.
ms / cm 3 or less. Therefore, the uniformity of the internal light emission near the junction between the first epitaxial growth layer and the second epitaxial growth layer is improved, and the emitted light is not absorbed by the impurities of the first transparent electrode and the second epitaxial growth layer. Luminous efficiency and luminance can be improved.
【図1】図1(a)は、従来の化合物半導体発光素子を
示す平面図、図1(b)はその側面図。FIG. 1A is a plan view showing a conventional compound semiconductor light emitting device, and FIG. 1B is a side view thereof.
【図2】図2(a)乃至図2(f)は、この発明の一実
施例によるAlGaAs/GaAs系の赤外発光素子の
製造工程を示す断面図。2 (a) to 2 (f) are cross-sectional views showing steps of manufacturing an AlGaAs / GaAs infrared light emitting device according to an embodiment of the present invention.
【図3】図3(a)は、この発明の一実施例によるAl
GaAs/GaAs系の赤外発光素子を示す平面図、図
3(b)は、その側面図。FIG. 3 (a) is an illustration of an Al according to an embodiment of the present invention.
FIG. 3B is a plan view showing a GaAs / GaAs infrared light emitting device, and FIG.
【図4】透明電極の透過率と発光効率との関係を示した
図。FIG. 4 is a diagram showing the relationship between the transmittance of a transparent electrode and the luminous efficiency.
【図5】SIMS分析により不純物濃度と深さとの関係
を示す図。FIG. 5 is a diagram showing a relationship between impurity concentration and depth by SIMS analysis.
【図6】エピタキシャル層の表面不純物濃度と発光効率
との関係を示す図。FIG. 6 is a diagram showing a relationship between a surface impurity concentration of an epitaxial layer and luminous efficiency.
10…P型GaAs基板、11…P型AlGaAsエピタキ
シャル成長層、12…N型AlGaAsエピタキシャル成
長層、13…凹凸、15…In2 O3 層、16…上部透明電
極、17…In2 O3 層、18…下部透明電極、19…発光素
子、20…ペレット、21…導電性ワイヤ、24…電極端子、
25…導電性ステム、29…モ−ルド樹脂10: P-type GaAs substrate, 11: P-type AlGaAs epitaxial growth layer, 12: N-type AlGaAs epitaxial growth layer, 13: unevenness, 15: In 2 O 3 layer, 16: upper transparent electrode, 17: In 2 O 3 layer, 18 ... lower transparent electrode, 19 ... light emitting element, 20 ... pellet, 21 ... conductive wire, 24 ... electrode terminal,
25 ... conductive stem, 29 ... mold resin
Claims (3)
成長により設けられた第1導電型の第1のエピタキシャ
ル成長層と、 前記第1のエピタキシャル成長層の上に設けられ、表面
に凹凸を有する第2導電型の第2のエピタキシャル成長
層と、 前記第2のエピタキシャル成長層の上の全面に設けられ
た発光波長に対して50%以上の透過率を有する酸化物
又は高分子系材料の第1の透明電極と、 前記化合物半導体基板の下に設けられた発光波長に対し
て50%以上の透過率を有する酸化物の第2の透明電極
とを具備し、 前記第2のエピタキシャル成長層は前記第1の透明電極
と接する側の表面の不純物濃度が1×1019 atoms/c
m3 以下であり、前記化合物半導体基板は前記第1のエ
ピタキシャル成長層と接する側の表面の不純物濃度が1
×1019 atoms/cm3 以下であることを特徴とする化
合物半導体発光素子。1. A first conductive type first epitaxial growth layer provided on a compound semiconductor substrate by epitaxial growth, and a second conductive type first conductive growth layer provided on the first epitaxial growth layer and having irregularities on its surface. A second epitaxially grown layer, and an oxide provided on the entire surface of the second epitaxially grown layer and having a transmittance of 50% or more with respect to an emission wavelength .
Or a first transparent electrode of a polymer material, and an emission wavelength provided under the compound semiconductor substrate.
A second transparent electrode made of an oxide having a transmittance of 50% or more. The second epitaxial growth layer has an impurity concentration of 1 × 10 19 atoms / surface on the surface in contact with the first transparent electrode. c
m 3 or less, and the compound semiconductor substrate has an impurity concentration of 1 on the surface in contact with the first epitaxial growth layer.
Compound semiconductor light-emitting device characterized by × is 10 19 atoms / cm 3 or less.
Sn2 O型の酸化物、及びポリチアジル(SN)x 等の
高分子系材料のうちの1つからなることを特徴とする請
求項1記載の化合物半導体発光素子。2. The first transparent electrode includes an In 2 O 3 layer,
2. The compound semiconductor light emitting device according to claim 1, wherein the compound semiconductor light emitting device is made of one of a Sn 2 O type oxide and a polymer material such as polythiazyl (SN) x .
のエピタキシャル成長層はP型、前記第2のエピタキシ
ャル成長層はN型であることを特徴とする請求項1記載
の化合物半導体発光素子。3. The semiconductor device according to claim 1, wherein the semiconductor substrate is P-type,
2. The compound semiconductor light emitting device according to claim 1, wherein the epitaxially grown layer is P-type and the second epitaxially grown layer is N-type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30014491A JP3333219B2 (en) | 1991-11-15 | 1991-11-15 | Compound semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30014491A JP3333219B2 (en) | 1991-11-15 | 1991-11-15 | Compound semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05136458A JPH05136458A (en) | 1993-06-01 |
| JP3333219B2 true JP3333219B2 (en) | 2002-10-15 |
Family
ID=17881274
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30014491A Expired - Fee Related JP3333219B2 (en) | 1991-11-15 | 1991-11-15 | Compound semiconductor light emitting device |
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| Country | Link |
|---|---|
| JP (1) | JP3333219B2 (en) |
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|---|---|---|---|---|
| JP3318698B2 (en) * | 1994-09-30 | 2002-08-26 | ローム株式会社 | Semiconductor light emitting device |
| US6876003B1 (en) | 1999-04-15 | 2005-04-05 | Sumitomo Electric Industries, Ltd. | Semiconductor light-emitting device, method of manufacturing transparent conductor film and method of manufacturing compound semiconductor light-emitting device |
| DE19943406C2 (en) * | 1999-09-10 | 2001-07-19 | Osram Opto Semiconductors Gmbh | Light emitting diode with surface structuring |
| DE102007022947B4 (en) * | 2007-04-26 | 2022-05-05 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelectronic semiconductor body and method for producing such |
| JP5198793B2 (en) * | 2007-05-10 | 2013-05-15 | ソニー株式会社 | Semiconductor device and manufacturing method thereof |
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- 1991-11-15 JP JP30014491A patent/JP3333219B2/en not_active Expired - Fee Related
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| Publication number | Publication date |
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