JP3334414B2 - Semiconductor etching method and thin film forming method using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to cleaning a processed semiconductor surface which affects device characteristics in a compound semiconductor device manufacturing process and forming a thin film on the cleaned semiconductor surface.

[0002]

2. Description of the Related Art In manufacturing a compound semiconductor device, a process of forming a thin film (semiconductor, metal, insulating film) on a semiconductor is indispensable. However, the conventional etching method performed before forming a thin film cannot sufficiently remove impurities and defects introduced into the semiconductor surface during device shape processing. FIG. 10 is a view for explaining an example of a case where a thin film is formed on a semiconductor substrate processed by a conventional method, and shows a step of stacking (buried growth) a semiconductor in a processed portion (recess) on the semiconductor substrate. It is shown. In the figure, 10
Is a semiconductor substrate, 11 is a plasma gas for dry etching, 12 is a mask for dry etching, 13 is an impurity,
14 is a defect, 15 is a strongly acidic etching solution, and 16 is a stacked (buried growth) semiconductor layer. Semiconductor substrate 10
Is dry-etched with the plasma gas 11 except for the portion covered with the mask 12 formed with a pattern for processing the surface shape (b). The semiconductor substrate 10 processed at that time
Defects 14 are introduced due to adhesion of impurities 13 from the atmosphere or damage from plasma particles on the surface of the semiconductor device (c). Etching with a strongly acidic solution 15 for the purpose of removing the impurities 13 and the defects 14 to clean the surface is performed (d). However, with this etching method, the impurities 13 and the defects 14 on the surface can be removed. And sufficient cleaning could not be achieved (e). When a semiconductor is laminated on such a processed surface that has not been sufficiently cleaned by burying growth or the like, the impurities 13 and defects 14 that cannot be removed remain at the interface 17 between the laminated material 16 and the semiconductor substrate 10 ( f). As described above, conventionally, wet etching using a strongly acidic solution has been used for cleaning the processed semiconductor substrate surface, but high-density impurities and defects remain at the regrowth interface 17. Cleaning could not be achieved. Although a method of performing an ammonium persulfide solution (NH ₄ S _x ) treatment after the above-described strong acid etching has been conventionally performed, the impurity and defect density at the regrowth interface are slightly reduced by the etching method, but device characteristics still remain. Impurities and defects to the extent of affecting remain. Here, the NH ₄ S _x solution treatment is intended for surface passivation (surface protection) after strong acidic etching. In order to achieve high performance or high-density integration of a device, a clean layered material / semiconductor interface is necessary. However, if there are residual impurities or defects as described above, the target performance or It becomes impossible to manufacture a highly integrated device, which directly leads to performance degradation, reliability reduction, and yield reduction of the device, which has been a problem.

[0003]

SUMMARY OF THE INVENTION The present invention has been proposed to improve the above-mentioned drawbacks, and an object of the present invention is to provide an etching method for reducing the density of impurities and defects at a thin film / semiconductor interface and to use the etching method. An object of the present invention is to provide a method for forming a thin film that reduces the density of impurities and defects at the interface between the thin film and the semiconductor.

[0004]

According to the method of etching a compound semiconductor of the present invention, the surface of the compound semiconductor is dry etched.
A first step of forming a shape by notching,
After the process, the surface of the processed compound semiconductor is mixed with a solution containing a group VI element , a gas containing Se, or a H ₂ S gas.
A second step of contacting the scan, characterized in that it comprises a third step of contacting said processed semiconductor surface immediately after the second step to a strongly acidic gas or solution. That is, in a process of manufacturing a semiconductor device by processing a compound semiconductor by means such as dry etching and laminating a thin film (semiconductor or insulator, metal) on the processed surface, the processed surface is sulfur (S) or selenium. A step of contacting a gas or a solution containing a Group VI element such as (Se) with the step of contacting the etched surface with a strongly acidic gas or a solution immediately after the step to clean the processed surface; A semiconductor, an insulator, or a metal is laminated on the processed surface. As a gas or a solution containing a group VI element, there is an H ₂ Se or NH ₄ S _X solution.

The method of forming a thin film on a compound semiconductor according to the present invention comprises the steps of: contacting the surface of the compound semiconductor with a gas containing a group VI element before forming the thin film; A thin film forming method for performing etching including a step of contacting with a neutral gas, wherein the two steps are performed in an apparatus for forming the thin film. That is, in a process of manufacturing a semiconductor device by processing a compound semiconductor by means such as dry etching and laminating a thin film (semiconductor or insulator or metal) on the processed surface, in an apparatus for laminating the thin film, Contacting the processed surface with a gas containing a group VI element such as sulfur (S) or selenium (Se) before laminating the thin film; and contacting the processed surface with a strongly acidic gas immediately after the step. The processing step cleans the processing surface, and thereafter, a semiconductor, an insulator, and a metal are laminated on the processing surface in the same apparatus. As a gas containing a group VI element, there is H ₂ Se or H ₂ S.

Conventionally, NH ₄ S _X treatment has been used for the purpose of passivating a semiconductor surface after etching with a strongly acidic solution. Therefore, conventionally the "etching with strong acid solution" is a combination of "subsequent NH ₄ S _X processing", but as in the present invention, "treatment with a gas or a solution containing a Group VI element,""subsequent strongly acidic There was no combination of "etching with gas or solution". Further, the conventional NH ₄ S _X treatment has not been used for any purpose other than passivation of the semiconductor surface.

[0007]

According to the present invention, by bringing the surface of a compound semiconductor into contact with a gas or a solution containing a Group VI element,
A group VI element bonds to a dangling bond on the surface of the compound semiconductor. As a result, the charge state around the impurity and the defect on the compound semiconductor surface changes, and the bonding force between the impurity and the compound semiconductor surface or between the defect and the compound semiconductor is weakened. Impurities and defects can be easily removed from the compound semiconductor surface by a subsequent step of bringing the compound semiconductor surface into contact with a strongly acidic gas or solution. Therefore, a clean compound semiconductor surface can be obtained. That is,
In the state where the group VI element is bonded to the dangling bond, etching with a strongly acidic gas or solution is performed.
Cleaning of the compound semiconductor surface can be achieved. As is conventional, after performing etching with strong acid gas or solution, it cleaned be subjected to a treatment with NH ₄ S _X, etc. can not be achieved.

[0008]

Next, an embodiment of the present invention will be described. Embodiment 1 FIG. 1 is a view for explaining a first embodiment of the present invention. In FIG. 1, reference numeral 20 denotes a semiconductor (for example, InP) substrate, 21 denotes a plasma gas for dry etching, 22 denotes a mask for dry etching, and 23 denotes a mask for dry etching. Impurity, 24 defect, 25 NH
₄ S _X solution, 26 sulfuric acid, 27 sulfur, 28 has a laminated (buried growth) semiconductor (e.g., InP).

Next, a process of manufacturing a buried (BH) laser diode (LD), which is one of the InP-based compound semiconductor devices, will be described as an example. In the manufacturing process of the BH laser, a semiconductor is laminated (e.g., buried growth) on a portion (recess) processed on the semiconductor substrate. First, dry etching is performed to process the surface shape of the semiconductor substrate 20 (b). . At this time, the adhesion of the impurity 23 and the introduction of the defect 24 occur from the atmosphere on the surface of the processed semiconductor substrate 20 (c). In order to remove these impurities 23 and defects 24 and clean the surface, the substrate is first immersed in an NH ₄ S _X solution 25 for 1 hour (d). Thereafter, etching is performed with sulfuric acid 26 at room temperature for 1 minute (e). The impurities 23 and defects 24 on the substrate surface processed by this etching can be removed. Then, it is immersed again in the NH ₄ S _X solution 25 for 1 hour (f). The surface of the substrate 20 thus cleaned is covered with sulfur 27 (g). If InP is buried on this surface, the sulfur layer 27 on the substrate surface prevents impurities from being mixed at the time of temperature rise before regrowth in the reactor for regrowth. Interface impurities and defects can be reduced. Since the sulfur layer 27 is separated from the substrate surface at the temperature at which regrowth is performed, it does not remain at the above-mentioned interface (h).

The effects of the above steps are shown in FIGS. FIG. 2 shows an analysis of impurities (oxygen) near the buried growth layer / InP substrate interface measured by secondary ion mass spectrometry (SIMS). In the figure, 30 is an InP substrate, 31 is a buried growth layer, 32 is a buried growth layer / substrate interface, 33 is a distribution of oxygen when buried and grown by a conventional process, and 34 is a distribution of oxygen according to the present invention. In the case of the conventional process, there is accumulation of impurities (oxygen) at a concentration of 10 ¹⁹ / cm ^{3 at} the interface. On the other hand, according to the process of the present invention, the accumulation of impurities (oxygen) at the interface is reduced.
The same applies to other impurities (sulfur, silicon, etc.) and defects.

FIG. 3 shows the impurity concentration near the buried growth layer / InP substrate interface measured by the secondary ion mass spectrometry (SIMS) method and the defect density measured by the capacitance voltage (CV) method. FIG. 6 compares the method and the method according to the present invention. Line 41 is sulfur, 42 is oxygen, 4
3 indicates silicon, 44 indicates defects, and the respective densities. By the etching method according to the present invention, the impurity density is reduced by about two digits and the defect density is reduced by about one digit.

FIG. 4A is an explanatory view of the BH-LD. In the drawing, reference numeral 50 denotes a processing substrate, 51 denotes a buried growth layer, 52 denotes an active layer (light emitting portion), and 53 denotes an active layer (light emitting portion) when a laser diode is driven. ) Is a current that flows in the vertical direction and contributes to the operation of the laser diode, and 54 is a leak current that flows through the interface between the buried growth layer and the processing substrate beside the active layer without flowing through the active layer. The leakage current 54 does not contribute to the operation of the LD when driving it and leads to a loss of current, and becomes large when there are many impurities and defects at the interface.

FIG. 4B shows the current / light output characteristics of the BH-LD. The straight line 55 indicates the characteristics of the BH-LD at room temperature according to the conventional process, and the reference numeral 56 indicates the BH-LD at a high temperature (100 ° C.). Properties, 57 is the properties of the BH-LD according to the invention at room temperature,
Reference numeral 58 denotes the characteristics of the BH-LD at a high temperature (100 ° C.). In the conventional BH-LD, a large amount of impurities and defects are accumulated at the buried growth layer / processed substrate interface as described above, so that the leakage current, that is, the current loss increases.
When the optical output of the H-LD rises, the current (threshold current) increases and the optical output decreases, and the H-LD does not operate at high temperatures (100 ° C.). On the other hand, in the BH-LD according to the present invention, impurities and defects at the interface are reduced, so that leakage current, that is, current loss can be suppressed, threshold current is reduced, light output is increased, and high temperature (100 ° C.) Operation is achieved. Thus, according to the present invention, a high performance (low threshold, high output, high temperature operation) LD is realized.

Embodiment 2 FIG. 5 is a view for explaining a second embodiment of the present invention. In FIG. 5, reference numeral 60 denotes a semiconductor (for example, InP) substrate, 61 denotes a plasma gas for dry etching, and 62 denotes a mask for dry etching. , 63 are impurities, 64 is a defect, 65 is a broken line showing the inside of the growth reactor, and 66 is hydrogen selenide (H ₂ S
e) gas, 67 is hydrochloric acid gas, 68 is selenium, 69 is a semiconductor (for example, InP) laminated (buried and grown).

In the step of laminating (embedding and growing) a semiconductor in a portion (recess) processed on a semiconductor substrate in a process of manufacturing an InP-based compound semiconductor device, in FIG. Dry etching is performed (b). At this time, the adhesion of impurities 63 and the introduction of defects 64 from the atmosphere occur on the surface of the processed semiconductor substrate 60 (c). These impurities 63
In order to remove the defects and defects 64 and to clean the surface, the substrate is left in an atmosphere of H ₂ Se 66 in a reaction furnace 65 for performing burying growth before burying InP on the processed substrate (d). . Subsequently, etching is performed with hydrochloric acid gas 67 in the reaction furnace 65 (e). By this gas etching, impurities 63 and defects 64 on the surface of the substrate 60 before regrowth can be removed (f). If InP is regrown after the etching, impurities and defects at the interface between the buried growth layer 69 and the substrate 60 can be reduced (g). According to the present invention, as described in the first embodiment, impurities and defects accumulated at the semiconductor interface, which cannot be suppressed by the prior art, are reduced (FIGS. 2 and 3). , The leakage current at the time of driving the BH-LD caused by the
Higher LD characteristics can be realized (FIG. 4).

Embodiment 3 FIG. 6 is a view for explaining a third embodiment of the present invention. In FIG. 6, reference numeral 70 denotes a semiconductor (for example, GaAs) substrate;
Is a plasma gas for dry etching, 72 is a mask for dry etching, 73 is an impurity, 74 is a defect, and 75 is N
The H ₄ S _X solution, 76 is hydrochloric acid, 77 is sulfur, 78 is silicon oxide, and 79 is gold.

Metal / insulating film / semiconductor (MIS) In the process of manufacturing a diode device, when an insulating film (silicon oxide) is laminated on a processed portion (concave portion) on a semiconductor substrate, as shown in FIG. Dry etching is performed for processing the surface shape of the substrate 70 (b).
At this time, the attachment of impurities 73 and the introduction of defects 74 from the atmosphere occur on the surface of the processed semiconductor substrate 70 (c).
In order to remove these impurities 73 and defects 74 and clean the surface, the silicon oxide is immersed in an NH ₄ S _X solution 75 for 1 hour at room temperature before silicon oxide is stacked on the substrate 70 (d). Thereafter, etching is performed with hydrochloric acid 76 at room temperature for 1 minute (e). Thereafter, this immersion in the NH ₄ S _X solution 75 → etching with hydrochloric acid 76 is repeated three times. By this etching, impurities 73 and defects 74 on the semiconductor surface before lamination can be removed (f). After the etching, silicon oxide 78
Is performed, the laminated silicon oxide 78 becomes the substrate 70
Impurities 73 and defects 74 at the interface can be reduced (g). If a metal (gold) 79 is laminated on the silicon oxide 78, an MIS structure is formed.

FIG. 7 shows the effect. FIG. 7 shows the capacitance-voltage characteristics of the MIS diode. Curve 80 is an ideal feature
Curve (eg Physics of Semiconductor devices,
second edition: SM Sze, John Wiley & Sons.N
Y, p.371, Fig. 7 (b)], 81 is that obtained by the conventional process, and 82 is that obtained by the present invention. According to the conventional process, many impurities and defects are accumulated at the silicon oxide / substrate interface, and electrons are captured by the impurities and the electrons do not sufficiently respond to a voltage change.
No capacity characteristics can be obtained. This hinders the use of the diode in high frequency devices. On the other hand, in the MIS diode according to the present invention, there are few impurities and defects at the interface, few electrons are captured, and the electrons respond to the voltage change, so that the voltage-capacity change occurs ideally. As described above, a high-performance (high-frequency) electronic device can be realized by using the process according to the present invention.

Embodiment 4 FIG. 8 is a view for explaining a fourth embodiment of the present invention. In the figure, reference numeral 90 denotes a semiconductor (for example, GaAs) substrate;
Is a plasma gas for dry etching, 92 is a mask for dry etching, 93 is an impurity, 94 is a defect, and 95 is N
The H ₄ S _X solution, 96 is hydrochloric acid, 97 is sulfur, and 98 is laminated gold.

In the process of manufacturing a metal / semiconductor (Schottky) diode device, when metal (gold) is laminated on a portion (recess) processed on a semiconductor substrate, first, as shown in FIG. Dry etching is performed for shape processing (b). At this time, the attachment of the impurity 93 and the introduction of the defect 94 from the atmosphere occur on the surface of the processed semiconductor substrate 90 (c). In order to remove these impurities 93 and defects 94 and clean the surface, the substrate is immersed in an NH ₄ S _X solution 95 at room temperature for one hour before gold (Au) is laminated (d). Thereafter, etching is performed for 1 minute with hydrochloric acid 96 (e). By this etching, impurities 93 and defects 94 on the semiconductor surface before lamination can be removed.
Thereafter, the substrate is immersed again in an NH ₄ S _X solution 95 for one hour (f) to remove a surface natural oxide film and interface states generated by exposure to the air during the manufacturing process and to clean the cleaned semiconductor surface with sulfur 97. Cover (g). After that, by laminating Au 98, impurities and defects at the interface of metal 98 / substrate 90 can be reduced (h). Here, the sulfur 97 at the interface serves as a dangling bond on the surface of the semiconductor substrate 90 and plays a role of electrically inactivating the surface level that affects the device characteristics, thereby improving the device (Schottky diode) characteristics. [Jia-Fa Fan, H. Oigawa, a
nd Y. Nannichi: Jpn. J. Appi. Phys. Vol. 27 (198
8) p. L2125-L2127].

FIG. 9 shows the effect. FIG. 9 shows voltage-current characteristics of the Schottky diode. 101 is an ideal characteristic curve [for example, Physics of Semiconductor device]
ces, second edition: SM Sze, John Wiley & Sons.
NY, p.254], 102 is that according to the conventional process, and 103 is that according to the present invention. In the case of the conventional process, current generated via impurities or defects at the metal / semiconductor interface increases, and good characteristics cannot be obtained. This hinders the use of Schottky diodes in high frequency devices. On the other hand, according to the present invention, ideal characteristics can be obtained because there are few impurities and defects at the interface. As described above, a high-performance (high-frequency) electronic device can be realized by using the process according to the present invention.

In this embodiment, the compound semiconductor is I
Although described in the case of InP and GaAs which are II-V compound semiconductors, other binary semiconductors such as AlAs and GaSb which are other III-V compound semiconductors and AlG
ternary mixed crystal such as aAs, InGaAs, InGaP, I
Naturally, it is also possible in the case of a quaternary mixed crystal such as nGaAsP or AlInGaAs. Naturally, it is also possible to use IIS-VI compound semiconductors such as ZnS, CdSe, and ZnSSe. The gas or solution containing a group VI element may be another gas or solution containing a group VI element, or [hydrogen sulfide (H ₂ S) or the like]. As the strongly acidic gas or solution, a strongly acidic gas or solution such as hydrochloric acid, or a strongly acidic mixed solution or gas of sulfuric acid, hydrogen peroxide and water may be used. Further, in the above-described embodiment, an example in which the present invention is applied to cleaning of a processed substrate surface is described. However, the present invention is not limited to this. It goes without saying that it is effective.

[0023]

As described above , according to the present invention,
By the second step, the dangling hole on the surface of the compound semiconductor is formed.
Group is bonded to the group VI element. Thereby, the compound semiconductor
Charge state around impurities and defects on the body surface
And compound with impurities and compound semiconductor surface or defects
The bonding force of the semiconductor is weakened. Subsequent third step
Easily removes impurities and defects from the compound semiconductor surface.
You can leave. Therefore, a clean compound semiconductor surface is not obtained.
It is. That is, the group VI element is bonded to the dangling bond.
Etch with a strongly acidic gas or solution
Cleaning can achieve compound semiconductor surface cleaning.
You. As a result, if the etching according to the present invention is used, a clean laminated material / semiconductor interface free from impurities and defects can be obtained, and a high-performance device can be manufactured with high yield.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a first embodiment of the present invention,
(A) to (h) show a step of laminating (embedding) a semiconductor in a processed portion (recess) on a semiconductor substrate.

FIG. 2 shows the distribution of impurities (oxygen) near the buried growth layer / InP substrate interface measured by the secondary ion mass spectrometry (SIMS) method.
(B) shows an impurity distribution.

FIG. 3 shows impurities and impurities near the buried growth layer / InP substrate interface measured by secondary ion mass spectrometry (SIMS).
FIG. 4 shows a comparison of the defect density between the conventional etching method and the present invention.

4A and 4B are explanatory diagrams relating to a BH-LD, wherein FIG. 4A shows a boundary surface and FIG. 4B shows characteristics.

FIG. 5 is a diagram illustrating a second embodiment of the present invention,
(A) to (g) show a step of stacking (buried growth) a semiconductor in a processed portion (concave portion) on a semiconductor substrate.

FIG. 6 is a diagram illustrating a third embodiment of the present invention,
(A) to (h) show a process of manufacturing a metal / insulating film / semiconductor (MIS) diode device.

FIG. 7 shows a capacitance-voltage characteristic of a MIS diode.

FIG. 8 is a diagram illustrating a fourth embodiment of the present invention,
(A) to (h) show a process of manufacturing a metal / semiconductor (Schottky) diode device.

FIG. 9 shows voltage-current characteristics of a Schottky diode.

FIG. 10 shows a step of laminating (embedding) a semiconductor in a portion (recess) processed on a semiconductor substrate by a conventional method, and (a) to (f) show each step.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Semiconductor substrate 11 Dry etching plasma gas 12 Dry etching mask 13 Impurity 14 Defect 15 Strong acidic etching solution 16 Stacked (buried growth) semiconductor layer 20 Semiconductor (for example, InP) substrate 21 Dry etching plasma gas 22 Dry etching Mask 23 impurity 24 defect 25 NH₄S_XSolution 26 Sulfuric acid 27 Sulfur 28 Stacked (buried growth) semiconductor (for example, In
P) 30 InP substrate 31 buried growth layer 32 buried growth layer / substrate interface 33 oxygen distribution when buried growth is performed by a conventional process 34 oxygen distribution according to the present invention 41 sulfur density 42 oxygen density 43 silicon density 44 defect density 50 processing substrate 51 buried growth layer 52 active layer (light emitting part) 53 active layer (light emitting part) when driving laser diode
The current that flows vertically and contributes to the operation of the laser diode
Flow 54 Buried growth layer beside active layer without flowing through active layer
Leakage current flowing at the interface between the processed substrate 55 Characteristics of the BH-LD at room temperature in the conventional process 56 Characteristics of the BH-LD at a high temperature (100 ° C.) 57 Characteristics of the BH-LD according to the present invention at room temperature 58 BH-LD At high temperature (100 ° C.) 60 Semiconductor (eg, InP) substrate 61 Dry etching plasma gas 62 Dry etching mask 63 Impurities 64 Defects 65 Dashed line 66 H showing inside of growth reactor₂Se 67 Hydrochloric acid gas 68 Selenium 69 Semiconductor (for example, In
P) 70 Semiconductor (for example, GaAs) substrate 71 Dry etching plasma gas 72 Dry etching mask 73 Impurity 74 Defect 75 NH₄S_XSolution 76 hydrochloric acid 77 sulfur 78 silicon oxide 79 gold 80 idealCharacteristic curve 81 Conventional processCharacteristic curve  82 According to the InventionCharacteristic curve  Reference Signs List 90 semiconductor (for example, GaAs) substrate 91 plasma gas for dry etching 92 mask for dry etching 93 impurity 94 defect 95 NH₄S_XSolution 96 hydrochloric acid 97 sulfur 98 stacked gold 101 idealCharacteristic curve  102 By conventional processCharacteristic curve  103 according to the inventionCharacteristic curve

Claims (2)

(57) [Claims] In a method for etching a compound semiconductor, a surface of the compound semiconductor is dry-etched.
A first step of shaping and, after the first step,
Processed compound semiconductor surface and solution containing group VI element
Or a gas containing Se or H ₂ S gas
Second step and third contacting said processed semi <br/> conductor surface immediately after the second step to a strongly acidic gases or solution
A method for etching a semiconductor, comprising the steps of: 2. A method for forming a thin film on a compound semiconductor, comprising: contacting the surface of the compound semiconductor with a gas containing a group VI element before forming the thin film; A thin film forming method for performing etching including a step of contacting the thin film with a gas, wherein the two steps are performed in an apparatus for forming the thin film.