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JP3339247B2 - Signal transmission circuit for IGBT gate drive circuit - Google Patents
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JP3339247B2 - Signal transmission circuit for IGBT gate drive circuit - Google Patents

Signal transmission circuit for IGBT gate drive circuit

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Publication number
JP3339247B2
JP3339247B2 JP07803595A JP7803595A JP3339247B2 JP 3339247 B2 JP3339247 B2 JP 3339247B2 JP 07803595 A JP07803595 A JP 07803595A JP 7803595 A JP7803595 A JP 7803595A JP 3339247 B2 JP3339247 B2 JP 3339247B2
Authority
JP
Japan
Prior art keywords
circuit
signal
signal transmission
gate drive
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP07803595A
Other languages
Japanese (ja)
Other versions
JPH08280168A (en
Inventor
和成 吉原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Original Assignee
Meidensha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp filed Critical Meidensha Corp
Priority to JP07803595A priority Critical patent/JP3339247B2/en
Publication of JPH08280168A publication Critical patent/JPH08280168A/en
Application granted granted Critical
Publication of JP3339247B2 publication Critical patent/JP3339247B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Electronic Switches (AREA)
  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、インバータを構成する
電力用半導体素子として用いられるIGBT(絶縁ゲー
トバイポーラトランジスタ)のゲート駆動回路へ信号を
伝送する信号伝送回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal transmission circuit for transmitting a signal to a gate drive circuit of an IGBT (insulated gate bipolar transistor) used as a power semiconductor device constituting an inverter.

【0002】[0002]

【従来の技術】現在、IGBTのゲート駆動回路へ信号
を伝送するには、信号回路とパワー回路をフォトカプラ
により電気的に絶縁する信号伝送方式が多く用いられて
おり、その回路構成の一例を図4に示す。フォトカプラ
PCの一次側は、オープンコレクタのTTL,トランジ
スタ等よりなるロジック回路(ゲート回路)IC1を接
続する構成とし、二次側に伝達した信号を、ゲート抵抗
を通してIGBTのゲート端子に入力して高速スイッチ
ングさせる。フォトカプラPCの入力回路には、コンデ
ンサC1や抵抗R1〜R3によるノイズ対策回路を設けて
おり、信号伝送経路が長くなった場合などに侵入するノ
イズに対するマージンを高めて、動作の安定化を図って
いる。ツェナーダイオードZD1もノイズ対策の一つで
ある。なお、フォトカプラPCの発光部と直列に制限抵
抗R4を接続している。
2. Description of the Related Art At present, in order to transmit a signal to a gate drive circuit of an IGBT, a signal transmission system in which a signal circuit and a power circuit are electrically insulated by a photocoupler is often used. As shown in FIG. The primary side of the photocoupler PC, the configuration of connecting the open-collector TTL, the logic circuit (gate circuit) IC 1 formed of a transistor and the like, and inputs the signals transmitted to the secondary side, through the gate resistor to the gate terminal of the IGBT To perform high-speed switching. The input circuit of the photocoupler PC, which provided a noise suppression circuit according to the capacitor C 1 and resistor R 1 to R 3, to increase the margin for noise entering the like when the signal transmission path is long, stable operation It is trying to make it. Zener diode ZD 1 is also one of the noise measures. Note that a limiting resistance R 4 in the light emitting portion and the series of the photocoupler PC.

【0003】[0003]

【発明が解決しようとする課題】しかし、フォトカプラ
PCの一次側がオープンコレクタ方式の信号伝送回路で
は、オフ信号入力時に信号伝送路のa−b間はオープン
となるため、コンデンサC1の放電経路が減り、充電に
比べて放電が遅くなる。この結果、図5(c)に示すよ
うにフォトカプラPCの一次電圧は、オンに比べオフ時
定数が大きくなり、入力信号に対するフォトカプラPC
のオフはオンに比べて遅くなる。もしも、図5(d)の
ようにオフ信号入力後、信号伝送路にノイズが侵入した
場合、図5(e)に示すように信号に重畳されたノイズ
がオンレベルを越えてインバータ回路の誤動作を引き起
こす可能性が高くなる。図5(b)のようにオフ時定数
が小さければ、図5(f)のようにノイズだけでオンレ
ベルには達せず、誤動作は防止される。
[0006] However, in the signal transmission circuit of the primary side is open collector method photocoupler PC, for between a-b of the signal transmission line when the OFF signal input is open, the discharge path of the capacitor C 1 And discharge is slower than charge. As a result, as shown in FIG. 5C, the primary voltage of the photocoupler PC has a larger OFF time constant than that of the photocoupler PC, and the photocoupler PC responds to the input signal.
OFF is slower than ON. If noise enters the signal transmission line after the OFF signal is input as shown in FIG. 5D, the noise superimposed on the signal exceeds the ON level and the inverter circuit malfunctions as shown in FIG. 5E. Is more likely to cause If the off time constant is small as shown in FIG. 5B, the noise does not reach the on level due to noise alone as shown in FIG.

【0004】そこで本発明は、上記課題を解決し、オフ
時間を短縮でき、その結果ノイズ耐量の向上が図れるI
GBTゲート駆動回路用の信号伝送回路を提供すること
を目的とする。
Therefore, the present invention solves the above-mentioned problems, and can reduce the off-time, thereby improving the noise immunity.
It is an object to provide a signal transmission circuit for a GBT gate drive circuit.

【0005】[0005]

【課題を解決するための手段】本発明は、フォトカプラ
の一次側はオープンコレクタ方式で信号を伝送するとと
もに、フォトカプラの入力回路にノイズ対策としてCR
回路を設けたIGBTゲート駆動回路用の信号伝送回路
において、信号発生側の2線間にトランジスタを、オフ
信号時にオンしてオフ側に直接電位を引くように設けて
コンデンサの放電を促進させるようにしたことを特徴と
する。
According to the present invention, the primary side of a photocoupler transmits a signal by an open collector system, and the input circuit of the photocoupler uses a CR as a countermeasure against noise.
In a signal transmission circuit for an IGBT gate drive circuit provided with a circuit, a transistor is provided between two lines on the signal generating side so as to be turned on at the time of an off signal and to directly pull a potential to the off side.
It is characterized in that discharge of the capacitor is promoted .

【0006】[0006]

【作用】オフ時にはコンデンサの放電経路にバイパス回
路が形成されたり、強制的に電位の引き下げが行われ
る。オン時には、これらの回路は動作的に関連外とな
り、速やかに動作する。即ち、オンの時定数は変えず
に、オフの放電時定数のみ小さくすることができるよう
になり、ノイズ耐量が向上する。
When turned off, a bypass circuit is formed in the discharge path of the capacitor or the potential is forcibly reduced. When turned on, these circuits are operatively unrelated and operate quickly. That is, only the off time constant can be reduced without changing the on time constant, and the noise immunity is improved.

【0007】[0007]

【実施例】以下、本発明を図面に示す実施例に基づいて
説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the embodiments shown in the drawings.

【0008】本発明によるIGBTゲート駆動回路用の
信号伝送回路の実施例1を図1に示す。図中、PCはフ
ォトカプラ、IC1はこのフォトカプラPCの一次側に
接続したオープンコレクタ方式のロジック回路(ゲート
回路)である。信号伝送路の信号発生側に抵抗R1を設
け、フォトカプラ入力側にノイズに対するマージンを高
めるCR回路を設けている。また、フォトカプラPCの
発光部と直列に抵抗R4を接続している。
FIG. 1 shows a first embodiment of a signal transmission circuit for an IGBT gate drive circuit according to the present invention. In the figure, PC is a photo-coupler, IC 1 is a logic circuit of the open collector connected to the primary side of the photocoupler PC (gate circuit). The resistor R 1 to the signal generator side of the signal transmission path is provided, it is provided with a CR circuit to increase the margin for noise in the photocoupler input. Also, by connecting a resistor R 4 to the light-emitting portion and the series of the photocoupler PC.

【0009】前記CR回路は、抵抗R3,R21,R22
コンデンサC1,ツェナーダイオードZD1,ダイオード
1により構成している。抵抗R21,R22は、従来例
(図4)の抵抗R2を2分割したもので、その分割点と
コンデンサC1の端子の間にダイオードD1を接続してい
る。このダイオードD1は、コンデンサC1の放電時に抵
抗R3,R21のバイパス回路となるものであり、抵抗R
21,R22は適切な抵抗値に選定する。
The CR circuit includes resistors R 3 , R 21 , R 22 ,
It comprises a capacitor C 1 , a Zener diode ZD 1 , and a diode D 1 . The resistors R 21 and R 22 are obtained by dividing the resistor R 2 of the conventional example (FIG. 4) into two , and the diode D 1 is connected between the dividing point and the terminal of the capacitor C 1 . The diode D 1 forms a bypass circuit for the resistors R 3 and R 21 when the capacitor C 1 is discharged.
21, R 22 is selected in a suitable resistance value.

【0010】次に、動作について述べる。オン信号入力
時には、ダイオードD1を省いた従来例と同じ回路とな
り、速やかにオンする。オフ時には、コンデンサC1
放電はダイオードD1と抵抗R22を放電経路として行わ
れる。この結果、オンの時定数は変わらず、オフの放電
時定数のみ小さくなり、ノイズ耐量が向上する。
Next, the operation will be described. When the ON signal input, be the same circuit as the conventional example omitting diode D 1, immediately turns on. During off, discharge of the capacitor C 1 is carried out a diode D 1 and a resistor R 22 as a discharge path. As a result, the ON time constant does not change, and only the OFF discharge time constant decreases, and the noise immunity improves.

【0011】実施例2を図2に示す。実施例2では、ツ
ェナーダイオードZD1のカソード側の信号伝送路間に
PNPトランジスタTr1を設け、そのベース・エミッ
タ間にダイオードD2を接続している。信号伝送路(ツ
ェナーダイオードZD1側)の挿入抵抗(実施例1の抵
抗R3)は、抵抗R31及びR32の並列合成抵抗とし、抵
抗R32を前記ダイオードD2と直列にしている。また、
信号伝送路間の抵抗R2は、実施例1の抵抗R21,R22
の直列合成抵抗である。
Embodiment 2 is shown in FIG. In Example 2, the PNP transistor Tr 1 is provided between the cathode-side signal transmission path of the Zener diode ZD 1, it connects the diode D 2 between its base and emitter. The insertion resistance (the resistance R 3 in the first embodiment) of the signal transmission path (the zener diode ZD 1 side) is a parallel combined resistance of the resistances R 31 and R 32 , and the resistance R 32 is connected in series with the diode D 2 . Also,
Resistance R 2 between the signal transmission line, the resistance R 21 of Example 1, R 22
Is the series combined resistance of

【0012】上記構成の回路においては、オン信号入力
時には抵抗R31,R32の並列合成抵抗が信号伝送路の挿
入抵抗となり、実施例1と同じ時定数で速やかにオンす
る。オフ時にはコンデンサC1の放電に伴う抵抗R31
電圧降下分がトランジスタTr1のエミッタ・ベース間
に加わり、トランジスタTr1がオンする。このトラン
ジスタTr1のオンにより電位が強制的にオフ側に引き
下げられる。つまり、オフ動作が速くなり、ノイズ耐量
の向上に有効である。
In the circuit having the above configuration, when an ON signal is input, the parallel combined resistance of the resistors R 31 and R 32 becomes an insertion resistance of the signal transmission line, and is quickly turned on with the same time constant as in the first embodiment. During off voltage drop of the resistor R 31 with the discharge of the capacitor C 1 is applied between the emitter and base of the transistor Tr 1, the transistor Tr 1 is turned on. This potential by turning on the transistor Tr 1 is forcibly pulled off side. That is, the off operation becomes faster, which is effective for improving the noise immunity.

【0013】実施例3を図3に示す。実施例3では、信
号発生側の信号伝送路にNPNトランジスタTr0を設
け、そのベース・コレクタ間に抵抗R0を接続するとと
もに、ベースにロジック回路(ゲート回路)IC0を介
して信号を供給する回路構成とし、フォトカプラ入力側
は従来例(図4)と同じ回路構成としている。
Embodiment 3 is shown in FIG. In the third embodiment, an NPN transistor Tr 0 is provided on the signal transmission line on the signal generation side, a resistor R 0 is connected between the base and collector , and a signal is supplied to the base via a logic circuit (gate circuit) IC 0. The photocoupler input side has the same circuit configuration as the conventional example (FIG. 4).

【0014】上記構成の回路においては、オン信号入力
時にはトランジスタTr0がオフ状態となり、実施例
1,2と同じ時定数で速やかにオンする。オフ時にはト
ランジスタTr0がオンしてコンデンサC1の放電が促進
されるとともに、電位が強制的にオフ側に引かれる。こ
れにより、オフ動作が速くなって、ノイズ耐量が向上す
る。
In the circuit having the above configuration, when the ON signal is input, the transistor Tr 0 is turned off, and is turned on quickly with the same time constant as in the first and second embodiments. With discharge of the capacitor C 1 transistor Tr 0 is turned on is promoted during off, the potential is forcibly pulled off side. As a result, the off operation becomes faster, and the noise immunity is improved.

【0015】[0015]

【発明の効果】以上のように本発明によれば、オフ信号
入力時にコンデンサの放電を促進させる回路を設けて、
オフ動作を速めるようにしたので、オフ信号入力後の侵
入ノイズがオンレベルまで達しにくくなり、いわゆるノ
イズ耐量を向上できる。しかも、オン時の時定数を変え
ずにオフ時間を短縮することができる。特に、オフ信号
時にトランジスタでオフ側に直接電位を引く回路とした
場合は、バイパス回路を形成する場合に比べてオフ時間
の短縮効果が高く、ノイズ耐量の向上も顕著となる。
As described above, according to the present invention, a circuit for accelerating the discharge of a capacitor when an off signal is input is provided.
Since the off operation is accelerated, intrusion noise after the input of the off signal is less likely to reach the on level, and so-called noise immunity can be improved. In addition, the off-time can be reduced without changing the on-time constant. In particular, in the case of a circuit in which a transistor directly pulls the potential to the off side at the time of an off signal, the effect of shortening the off time is higher than in the case of forming a bypass circuit, and the noise immunity is significantly improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明によるIGBTゲート駆動回路用の信号
伝送回路の実施例1を示す回路図。
FIG. 1 is a circuit diagram showing Embodiment 1 of a signal transmission circuit for an IGBT gate drive circuit according to the present invention.

【図2】本発明によるIGBTゲート駆動回路用の信号
伝送回路の実施例2を示す回路図。
FIG. 2 is a circuit diagram showing Embodiment 2 of a signal transmission circuit for an IGBT gate drive circuit according to the present invention.

【図3】本発明によるIGBTゲート駆動回路用の信号
伝送回路の実施例3を示す回路図。
FIG. 3 is a circuit diagram showing a third embodiment of a signal transmission circuit for an IGBT gate drive circuit according to the present invention.

【図4】IGBTゲート駆動回路用の信号伝送回路の従
来例を示す回路図。
FIG. 4 is a circuit diagram showing a conventional example of a signal transmission circuit for an IGBT gate drive circuit.

【図5】信号伝送回路の信号伝送状況を説明するための
波形図であって、(a)は信号、(b)はフォトカプラ
入力(理想回路)、(c)はフォトカプラ入力(従来例
の回路)、(d)は侵入ノイズ、(e)はノイズ侵入時
のフォトカプラ入力(理想回路)、(f)はノイズ侵入
時のフォトカプラ入力(従来例の回路)。
5A and 5B are waveform diagrams for explaining a signal transmission state of a signal transmission circuit, where FIG. 5A is a signal, FIG. 5B is a photocoupler input (ideal circuit), and FIG. 5C is a photocoupler input (conventional example). (D) shows intrusion noise, (e) shows a photocoupler input when noise enters (ideal circuit), and (f) shows a photocoupler input when noise enters (conventional circuit).

【符号の説明】[Explanation of symbols]

PC…フォトカプラ IC1…オープンコレクタ方式のロジック回路 R1〜R4,R21,R22,R31,R32…抵抗 C1…コンデンサ ZD1…ツェナーダイオード D1,D2…ダイオード Tr0,Tr1…トランジスタPC ... logic circuit R 1 optocoupler IC 1 ... open collector ~R 4, R 21, R 22 , R 31, R 32 ... resistance C 1 ... capacitor ZD 1 ... Zener diode D 1, D 2 ... diode Tr 0 , Tr 1 ... transistor

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI H03K 17/78 H03K 17/56 Z ──────────────────────────────────────────────────続 き Continued on front page (51) Int.Cl. 7 Identification code FI H03K 17/78 H03K 17/56 Z

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 フォトカプラの一次側はオープンコレク
タ方式で信号を伝送するとともに、フォトカプラの入力
回路にノイズ対策としてコンデンサCと抵抗Rからなる
CR回路を設けたIGBTゲート駆動回路用の信号伝送
回路において、信号発生側の信号伝送回路間にトランジスタのコレクタ
・エミッタを接続し、そのトランジスタのベース・コレ
クタ間に抵抗を接続するとともに、ベースにゲート回路
を介して信号を供給する回路に構成し、 オン信号入力時には、トランジスタをオフし、オフ信号
時には、トランジスタをオンして直接電位をオフ側に引
くようにし、コンデンサの放電を促進するようにした
とを特徴とするIGBTゲート駆動回路用の信号伝送回
路。
1. A signal transmission for an IGBT gate drive circuit in which a primary side of a photocoupler transmits a signal in an open collector system and a CR circuit including a capacitor C and a resistor R is provided in an input circuit of the photocoupler as a countermeasure against noise. In the circuit, the collector of the transistor between the signal transmission circuits on the signal generation side
・ Connect the emitter and base transistor
Connect a resistor between the
Constitute the circuit for supplying a signal through, at the time of ON signal input, and turns off the transistor, the off signal
Sometimes, the transistor is turned on and the potential is directly turned off.
A signal transmission circuit for an IGBT gate drive circuit, characterized in that the discharge of the capacitor is promoted .
JP07803595A 1995-04-04 1995-04-04 Signal transmission circuit for IGBT gate drive circuit Expired - Fee Related JP3339247B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP07803595A JP3339247B2 (en) 1995-04-04 1995-04-04 Signal transmission circuit for IGBT gate drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07803595A JP3339247B2 (en) 1995-04-04 1995-04-04 Signal transmission circuit for IGBT gate drive circuit

Publications (2)

Publication Number Publication Date
JPH08280168A JPH08280168A (en) 1996-10-22
JP3339247B2 true JP3339247B2 (en) 2002-10-28

Family

ID=13650568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP07803595A Expired - Fee Related JP3339247B2 (en) 1995-04-04 1995-04-04 Signal transmission circuit for IGBT gate drive circuit

Country Status (1)

Country Link
JP (1) JP3339247B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101814266B (en) * 2010-04-27 2011-12-07 四川长虹电器股份有限公司 Method for driving IGBT in PDP display screen line driving chip
JP7484383B2 (en) * 2020-04-27 2024-05-16 株式会社Gsユアサ Switch driver circuit

Also Published As

Publication number Publication date
JPH08280168A (en) 1996-10-22

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