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JP3339736B2 - Defect detection method for inner layer circuit of multilayer printed wiring board - Google Patents
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JP3339736B2 - Defect detection method for inner layer circuit of multilayer printed wiring board - Google Patents

Defect detection method for inner layer circuit of multilayer printed wiring board

Info

Publication number
JP3339736B2
JP3339736B2 JP31572093A JP31572093A JP3339736B2 JP 3339736 B2 JP3339736 B2 JP 3339736B2 JP 31572093 A JP31572093 A JP 31572093A JP 31572093 A JP31572093 A JP 31572093A JP 3339736 B2 JP3339736 B2 JP 3339736B2
Authority
JP
Japan
Prior art keywords
inner layer
printed wiring
wiring board
multilayer printed
layer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP31572093A
Other languages
Japanese (ja)
Other versions
JPH07167758A (en
Inventor
弘実 田所
洋児 横須賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Resonac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd, Resonac Corp filed Critical Hitachi Chemical Co Ltd
Priority to JP31572093A priority Critical patent/JP3339736B2/en
Publication of JPH07167758A publication Critical patent/JPH07167758A/en
Application granted granted Critical
Publication of JP3339736B2 publication Critical patent/JP3339736B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Sampling And Sample Adjustment (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、多層プリント配線板の
内層回路の欠陥検出方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting a defect in an inner layer circuit of a multilayer printed wiring board.

【0002】[0002]

【従来の技術】近年プリント配線板は、IC、LSI等
の半導体デバイスの高集積化や高機能化が進むにともな
い、複雑化、高密度化してきている。一方、プリント配
線板の用途は拡大しており、公共性の高い大型システム
にも広く採用されている。このためプリント配線板に求
められる信頼性は一層高いものが要求されるようになっ
ている。
2. Description of the Related Art In recent years, printed wiring boards have become more complicated and denser as semiconductor devices such as ICs and LSIs have become more highly integrated and sophisticated. On the other hand, the use of printed wiring boards is expanding, and they are widely used in large public systems. For this reason, higher reliability is required for printed wiring boards.

【0003】多層プリント配線板における層間は、通常
エポキシ樹脂基材やポリイミド樹脂基材等にドリルで穴
あけし、スルーホールめっきを行って電気的に接続され
ている。この基材に穴あけした時に発生する熱で樹脂が
内層銅はく切断面に溶融固着してスミアというものが発
生することがある。また、主に内層に使用される銅はく
の延性が悪いと、クラックがはいり、断線することがあ
る。
[0003] The layers in a multilayer printed wiring board are usually electrically connected by drilling a hole in an epoxy resin base material or a polyimide resin base material and performing through-hole plating. Resin may be melt-fixed to the cut surface of the inner copper foil by heat generated when drilling holes in the base material, and smear may occur. If the ductility of the copper foil mainly used for the inner layer is poor, cracks may be formed and the wire may be broken.

【0004】このようなクラツクやスミアは、外部から
見えないため、プリント配線板にテストクーポンを設け
ておき、このテストクーポンを切り出し、エポキシ樹脂
に注型し、スルーホールめっきと内層銅はくとの接続部
を、順次荒い研磨紙から細かな研磨紙を使用して研磨
し、微細なアルミ粉等を使用して仕上げ研磨を行い、顕
微鏡を用いて観察している。
[0004] Since such cracks and smears cannot be seen from the outside, a test coupon is provided on a printed wiring board, the test coupon is cut out and poured into an epoxy resin, and through-hole plating and inner layer copper foil are applied. Are sequentially polished from rough abrasive paper to fine abrasive paper, finish polished using fine aluminum powder or the like, and observed using a microscope.

【0005】観察に先立ち、仕上げ研磨後の試料を、ア
ンモニア及び過酸化水素の濃度が、混合体積比で25%
アンモニア水30、30%過酸化水素水1、及び、純水
60からなるソフトエッチング液に浸漬した後に、観察
している。
Prior to the observation, the sample after the final polishing was adjusted so that the concentration of ammonia and hydrogen peroxide was 25% by volume.
Observation was made after immersion in a soft etching solution comprising ammonia water 30, 30% hydrogen peroxide solution 1 and pure water 60.

【0006】[0006]

【発明が解決しようとする課題】ところが、ソフトエッ
チング液に浸漬する時間のコントロールが難しく、エッ
チングが進み過ぎて、スルーホール銅めっきと内層銅は
くの境界線が出てしまうことがあり、欠陥とめっき境界
線との判別ができず、欠陥を見落としてしまうことがあ
った。
However, it is difficult to control the time of immersion in the soft etching solution, and the etching proceeds excessively, so that the boundary between the through-hole copper plating and the inner layer copper foil may appear. And the plating boundary line could not be determined, and the defect was sometimes overlooked.

【0007】本発明は、多層プリント配線板の内層回路
の欠陥検出にあたり、スルーホール銅めっきと内層銅は
くの境界線をださないソフトエッチング方法を提供する
ことを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a soft etching method for detecting a defect in an inner layer circuit of a multilayer printed wiring board without forming a boundary between the through-hole copper plating and the inner layer copper foil.

【0008】[0008]

【課題を解決するための手段】本発明は、アンモニア及
び過酸化水素の濃度が、混合体積比で25%アンモニア
水25〜35、30%過酸化水素水4〜8、及び、純水
60からなるソフトエッチング液を、試料表面に塗布し
た後、水洗することを特徴とする。塗布量は、綿棒で塗
布できる程度でよく、塗布後水洗するまでの時間は、1
0秒程度でよい。
According to the present invention, the concentration of ammonia and hydrogen peroxide is determined by mixing 25% aqueous ammonia 25 to 35%, 30% aqueous hydrogen peroxide 4 to 8 and pure water 60 by mixing volume ratio. The method is characterized in that a soft etching solution is applied to the surface of a sample and then washed with water. The amount of application may be such that it can be applied with a cotton swab.
It may be about 0 seconds.

【0009】[0009]

【作用】アンモニアと過酸化水素を含むエッチング液
は、銅を酸化してアンミン錯体を形成して、銅を溶解す
る。溶解速度は、クラックやスミアのような欠陥がある
箇所、めっき境界線、正常箇所の順に小さくなる。過酸
化水素が多いエッチング液を表面に塗布するにとどめ
て、溶解が過度にならないようにし、めっき境界線が現
われる前に水洗することにより、欠陥部がエッチングで
拡大された状態で、エッチングを終了させ、欠陥部のみ
を容易に検出する。過酸化水素が少ないエッチング液
は、作用がおだやかであるため、平均して銅を溶解する
ので、このような差をつけられない。
The etching solution containing ammonia and hydrogen peroxide oxidizes copper to form an ammine complex and dissolves copper. The dissolution rate becomes smaller in the order of a portion having a defect such as a crack or smear, a plating boundary line, and a normal portion. Etching is finished with the defect enlarged by etching by applying an etching solution with a large amount of hydrogen peroxide to the surface, preventing excessive dissolution and washing before the plating boundary line appears Then, only the defective portion is easily detected. An etching solution containing a small amount of hydrogen peroxide has a mild effect and dissolves copper on average, so that such a difference cannot be made.

【0010】[0010]

【実施例】ガラスエポキシ樹脂基材、4層プリント配線
板から、スルーホール部を含むように試験片を切り出し
た。この試験片を、注型リングに立て、エポキシ樹脂を
注型し、室温で硬化させた後、試料片をリングから取出
し、研磨紙で研磨し、アルミナ粉で精密研磨した。
EXAMPLE A test piece was cut out of a glass epoxy resin substrate and a four-layer printed wiring board so as to include a through hole. The test piece was set on a casting ring, cast with an epoxy resin, and cured at room temperature. Then, the sample piece was taken out of the ring, polished with abrasive paper, and precision polished with alumina powder.

【0011】次に、体積比で、25%アンモニア水3
0、純水60、30%過酸化水素水5のソフトエッチン
グ液を作り、この液を綿棒にて塗布し10秒後に水洗、
乾燥して、顕微鏡上にセットし、観察した。その結果、
めっき境界線は現われず、クラックのみ拡大されて観察
できた。
Next, 25% ammonia water 3
A soft etching solution of 0, pure water 60, and 30% hydrogen peroxide solution 5 was prepared, and this solution was applied with a cotton swab.
It was dried, set on a microscope, and observed. as a result,
No plating boundary line appeared, and only the cracks were magnified and observed.

【0012】比較例 体積比で、25%アンモニア水30、純水60、30%
過酸化水素水1のソフトエッチング液を作り、この液
に、実施例と同じ試験片を20秒間浸漬し、水洗、乾燥
して、顕微鏡上にセットし、観察した。その結果、スル
ーホールめつきと内層銅はくとの境界線が出てしまい、
スミアなどを発見することが不可能であった。
Comparative Example 25% ammonia water 30 by volume ratio, pure water 60, 30%
A soft etching solution of a hydrogen peroxide solution 1 was prepared, and the same test piece as in the example was immersed in the solution for 20 seconds, washed with water, dried, set on a microscope, and observed. As a result, the boundary between the through-hole plating and the inner layer copper foil appears,
It was impossible to find smears.

【0013】[0013]

【発明の効果】以上に説明した通り、本発明による多層
プリント配線板の内層回路の欠陥検出方法によれば、め
っき境界線が現われないので、内層銅はくやスルーホー
ルめっきと内層銅はく間に発生する欠陥を確実に検出で
きる。
As described above, according to the method for detecting a defect of an inner layer circuit of a multilayer printed wiring board according to the present invention, since no plating boundary line appears, the inner layer copper foil and the through-hole plating and the inner layer copper foil are removed. Defects occurring in between can be reliably detected.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭55−122874(JP,A) 特開 昭63−274881(JP,A) 特開 昭64−52089(JP,A) 特開 平4−56391(JP,A) (58)調査した分野(Int.Cl.7,DB名) G01N 1/32 H05K 3/00 H05K 3/46 JICSTファイル(JOIS)──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-55-122874 (JP, A) JP-A-63-274881 (JP, A) JP-A-64-52089 (JP, A) JP-A-4- 56391 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) G01N 1/32 H05K 3/00 H05K 3/46 JICST file (JOIS)

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 アンモニア及び過酸化水素の濃度が、混
合体積比で25%アンモニア水25〜35、30%過酸
化水素水4〜8、及び、純水60からなるソフトエッチ
ング液を、試料表面に塗布した後、水洗することを特徴
とする多層プリント配線板の内層回路の欠陥検出方法。
1. A soft etching solution comprising 25% aqueous ammonia 25 to 35%, 30% aqueous hydrogen peroxide 4 to 8 and pure water 60 at a mixed volume ratio of ammonia and hydrogen peroxide is applied to the sample surface. A method for detecting defects in an inner layer circuit of a multilayer printed wiring board, wherein the method is carried out after the coating is performed.
JP31572093A 1993-12-16 1993-12-16 Defect detection method for inner layer circuit of multilayer printed wiring board Expired - Fee Related JP3339736B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31572093A JP3339736B2 (en) 1993-12-16 1993-12-16 Defect detection method for inner layer circuit of multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31572093A JP3339736B2 (en) 1993-12-16 1993-12-16 Defect detection method for inner layer circuit of multilayer printed wiring board

Publications (2)

Publication Number Publication Date
JPH07167758A JPH07167758A (en) 1995-07-04
JP3339736B2 true JP3339736B2 (en) 2002-10-28

Family

ID=18068731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31572093A Expired - Fee Related JP3339736B2 (en) 1993-12-16 1993-12-16 Defect detection method for inner layer circuit of multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JP3339736B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6301595B2 (en) * 2013-06-14 2018-03-28 日本特殊陶業株式会社 Wiring board and method for manufacturing multilayer wiring board
CN116623182B (en) * 2023-05-29 2026-02-17 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Interfacial alloy compound etching solution, etching method and sample preparation method

Also Published As

Publication number Publication date
JPH07167758A (en) 1995-07-04

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