JP3344396B2 - Lead terminal and semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead terminal and a semiconductor device using the lead terminal.

[0002]

2. Description of the Related Art As a semiconductor device having a semiconductor element sandwiched between two lead terminals, a package structure as shown in FIG. 5 is known. In this type of conventional semiconductor device, the first lead terminal 101 and the second lead terminal 103 are provided with protrusions 121 and 123, and the protrusions 121 and 123 are provided.
The semiconductor element 131 is joined by the solder 133 in such a manner as to be sandwiched between the semiconductor element 131 and the solder 123. Thus, the convex portion 121
And 123, the solder 133 also adheres to the side surfaces of the protrusions 121 and 123, so that the amount of solder that can be supplied between the lead terminals 101 and 103 and the semiconductor element 131 can be increased, and the adhesive strength of the solder can be increased. Can be increased.

[0003]

By the way, as described above, the protrusions 121 are formed at the tips of the lead terminals 101 and 103.
And 123, the solder connection strength can be sufficiently increased when the amount of solder supplied in the package assembling step (assembly step) is optimal. However, if the supplied amount of solder is too large, the solder 133 may adhere to the side surface of the semiconductor element 131, or extra solder 133 may be scattered and adhere to the semiconductor element and its periphery in a granular manner. For this reason, there is a possibility that an electric short circuit may occur inside the semiconductor device, characteristics may be degraded, or a defect may be caused in a production process.

On the other hand, if the amount of supplied solder in the assembling step is small, it is not possible to obtain sufficient adhesive strength by soldering. In addition, when the amount of supplied solder is small, the electrical contact resistance increases, the conduction resistance (ON resistance) of the semiconductor device increases, and a problem arises in that high-efficiency operation cannot be performed.

[0005] Therefore, in order to obtain a semiconductor device having a package structure with sufficiently high mechanical adhesive strength and good electrical characteristics, it is very difficult to control the amount of solder supplied in the assembling process. There was a problem.

[0006] The present invention has been made in view of the above,
An object of the present invention is to provide a lead terminal in which the amount of supplied solder at the time of soldering can be easily controlled.

Another object of the present invention is to provide a semiconductor device in which the amount of solder supplied when a semiconductor element is joined to a lead terminal can be easily controlled.

It is still another object of the present invention to provide a semiconductor device having a low electrical contact resistance and a high mechanical adhesive strength by increasing a supply amount of solder in an assembling process. It is.

Still another object of the present invention is to provide a semiconductor device having low on-resistance (conduction resistance), high efficiency, and high reliability.

[0010]

In order to solve the above-mentioned problems, a first feature of the present invention is that a first main electrode formed on the entire surface of a first main surface of a semiconductor chip and a second main electrode are formed. The present invention relates to a lead terminal used for a package on which a semiconductor element having a second main electrode formed on the entire surface is mounted. That is, in the lead terminal according to the first aspect of the present invention, the flow of solder from the chip connection surface to the back surface of the first main electrode near the periphery of the first wide portion to be soldered is performed. A chip connecting portion having a path, an inner lead connected to the chip connecting portion, and an outer lead continuous with the inner lead. Here, the “semiconductor element” includes a power diode, a power bipolar transistor (power BJT), a power MOSFET, an insulated gate bipolar transistor (IGBT), a power static induction transistor (power SIT), and a static induction thyristor. Semiconductor devices such as (SI thyristors) and GTO thyristors are suitable. Therefore, the “first main electrode” is one of an anode electrode and a cathode electrode in a power diode, an SI thyristor and a GTO thyristor, and one of an emitter electrode and a collector electrode in a power BJT and an IGBT. Power MOSF
In ET and power SIT, it means either the source electrode or the drain electrode. On the other hand, the “second main electrode” is a power diode, SI thyristor, GTO, or the like.
In a thyristor, one of an anode electrode and a cathode electrode that does not become the first main electrode; in a power BJT or IGBT, one of an emitter electrode or a collector electrode that does not become the first main electrode; In the case of the power SIT, it means either the source electrode or the drain electrode which is not the first main electrode. That is, in power diodes, SI thyristors and GTO thyristors, if the first main electrode is an anode electrode, the second main electrode is a cathode electrode, and in power BJTs and IGBTs, the first main electrode is If it is an emitter electrode, the second main electrode is a collector electrode. In a power MOSFET or power SIT, if the first main electrode is a source electrode, the second main electrode is a drain electrode.

According to the lead terminal according to the first aspect of the present invention, the solder flow passage provided in the lead terminal allows excess solder in the assembling process to be removed from the surface of the first wide portion to be soldered. To the back side. Therefore, even if the amount of solder in the assembling process is large,
It is possible to prevent the solder from adhering to the side surface of the semiconductor element, or to prevent the excess solder from being scattered and adhering to the semiconductor element and its periphery in a granular manner. As a result, the occurrence of an electrical short circuit inside the semiconductor device can be avoided, and the occurrence of a defect that causes deterioration in characteristics or a defect in the production process can be prevented. Further, since the excess solder can escape to the back side of the first wide portion, it is easy to control the amount of solder supplied in the assembling process.

[0012] In the lead terminal according to the first aspect of the present invention, the solder flow passage may be constituted by, for example, a through crack provided in the vicinity of a peripheral portion of the chip connecting portion. By using through cracks as solder flow paths,
The fine holes in the through cracks suck out the solder by capillary action, and can effectively release excess solder from the front surface of the first wide portion to the back surface side.

In the lead terminal according to the first aspect of the present invention, a projection may be provided at the center of the chip connection surface of the chip connection portion, and a depression may be provided at the corresponding back surface. . By protruding the surface on which soldering is performed, the contact area between the lead terminal and the solder can be increased, so that the bonding strength with the member to be soldered can be increased and the concave portion on the back surface side can be formed. Therefore, it is possible to prevent excess solder from accumulating and flowing out to other parts. In this case, the solder flow passage can be provided in a peripheral portion of the convex portion.

Further, in the lead terminal according to the first aspect of the present invention, the chip connecting portion has a first wide portion, a narrow portion continuous with the first wide portion, and a continuous portion with the narrow portion. The second wide portion may be connected to the inner lead by soldering. Alternatively, the chip connecting portion, the inner lead, and the outer lead may be formed continuously and integrally. When integrally formed, the chip connecting portion is composed of a first wide portion and a first narrow portion continuous with the first wide portion, and the inner lead is continuous with the first narrow portion. The outer lead is composed of a wing-shaped portion and a second narrow portion continuous with the wing-shaped portion.
And a second wide portion continuous with the third narrow portion.

A second feature of the present invention relates to a semiconductor device comprising a semiconductor element and first and second lead terminals sandwiching the semiconductor element. That is, the second aspect of the present invention
In the semiconductor device according to the first aspect, the first lead terminal 1
Has a first chip connection part, a first inner lead connected to the first chip connection part, and a first outer lead continuous with the first inner lead. The second lead terminal includes a second chip connecting portion having a solder flow path, a second inner lead connected to the second chip connecting portion, and a second outer lead continuous with the second inner lead. Have. Solder is inserted between the first main electrode and the first chip connection portion, between the second main electrode and the second chip connection portion, and inside the solder flow passage. here,
"Semiconductor element" includes power diode, power B
JT, power MOSFET, IGBT, power SIT,
Semiconductor devices such as SI thyristors and GTO thyristors are suitable. Therefore, the “first main electrode” is one of an anode electrode and a cathode electrode in a power diode, an SI thyristor and a GTO thyristor, and one of an emitter electrode and a collector electrode in a power BJT and an IGBT. In a power MOSFET or a power SIT, it means either a source electrode or a drain electrode. On the other hand, the “second main electrode” is a power diode, an SI thyristor or a GTO thyristor, one of an anode electrode and a cathode electrode which is not the first main electrode, and a power BJT or IGB.
At T, one of the emitter electrode and the collector electrode which does not become the first main electrode, the power MOSFE
In T and power SIT, it means either the source electrode or the drain electrode which is not the first main electrode. Which one is referred to as the first main electrode and which is referred to as the second main electrode is merely a matter of definition and can be arbitrarily selected according to design specifications.

According to the semiconductor device of the second aspect of the present invention, the solder flow path allows excess solder at the time of joining the semiconductor element to escape from the joining surface (front surface) of the second chip connecting portion to the opposite side. be able to. For this reason, in the package assembling process, even if the amount of solder is increased, it is possible to prevent a defect that the solder adheres to the side surface of the semiconductor element or that excess solder is scattered and adheres to the semiconductor element and its periphery in a granular manner. . As a result, the occurrence of an electrical short circuit inside the semiconductor device is avoided,
It is possible to prevent the occurrence of defects that cause deterioration in characteristics and defects in the production process. In addition, since excess solder can be released from the bonding surface side of the second chip connection portion to the opposite side, it is easy to control the amount of solder supplied during the package assembling process.

In the semiconductor device according to the second aspect of the present invention, each of the solder flow paths can be formed by a through crack provided in the vicinity of a peripheral portion of the second chip connection portion. By using the through cracks as the solder flow passages, the fine holes of the through cracks suck out the solder by capillary action, and the excess solder is effectively removed from the joining surface side of the second chip connecting portion to the opposite side. You can escape.

Further, in the semiconductor device according to the second feature of the present invention, a convex portion is provided at the center of the chip connecting surface of the second chip connecting portion, and a concave portion is provided at the corresponding back surface side. It may be provided. By protruding the surface to be soldered, it is possible to increase the contact area between the second chip connection portion and the solder, so that the bonding strength with the member to be soldered can be increased,
The excess solder can be stored in the concave portion on the back surface side of the second chip connection portion, and can be prevented from flowing out to another portion. In this case, the solder flow passage provided in the second chip connection portion can be provided in the periphery of the projection.

Further, in the semiconductor device according to the second aspect of the present invention, the second chip connecting portion includes a first wide portion, a narrow portion continuous with the first wide portion, and a narrow portion connected to the first wide portion. A continuous second wide portion may be used, and the second wide portion may be connected to the second inner lead by soldering. Alternatively, the first chip connecting portion, the first inner lead, and the first outer lead may be formed continuously and integrally. When integrally formed, the first chip connecting portion includes a first wide portion and a first narrow portion continuous with the first wide portion, and the first inner lead is formed of the first inner lead. The first outer lead is composed of a wing portion continuous with the narrow portion and a second narrow portion continuous with the wing portion, and the first outer lead has a third narrow portion continuous with the second narrow portion. , And a second wide portion that is continuous with the third narrow portion.

Further, in the semiconductor device according to the second aspect of the present invention, a solder flow path (here, "first solder flow path") is defined at the first chip connecting portion of the first lead terminal. ) May be provided. In other words, if the second lead terminal is configured to have two solder flow passages, the "second solder flow passage" provided at the second chip connection portion, the first
Further, the solder can be effectively sucked out by the capillary phenomenon in a vertically symmetric manner from the second solder flow passage. For this reason, excess solder can be uniformly and effectively released from the joining surface side of the first and second chip connecting portions to the opposite side.

[0021]

Next, an embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the dimensional relationships and ratios of the respective members are different from actual ones. Therefore, specific dimensions of each member should be determined in consideration of the following description. In addition, it is needless to say that dimensional relationships and ratios are different between drawings.

(First Embodiment) As shown in FIG.
In the semiconductor device (power diode) according to the first embodiment of the present invention, a semiconductor element 51 is sandwiched between a first lead terminal 1 and a second lead terminal 3. A diode chip 51 as a semiconductor element includes a first main electrode (anode electrode) 5 formed on the entire first main surface of the semiconductor chip.
It is a pn junction type diode chip having a second main electrode (cathode electrode) 53 formed on the entire surface of the second and second main surfaces.

The first lead terminal 1 includes a first chip connecting portion 32a having a first solder flow passage 7a and a first inner lead 33 connected to the first chip connecting portion 32a.
a and a first outer lead 35a continuous with the first inner lead 33a. Second lead terminal 3
Are a second chip connecting portion 32b having a second solder flow passage 7b, a second inner lead 33b connected to the second chip connecting portion 32b, and a second outer lead connected to the second inner lead 33b. And a lead 35b. First
Between the main electrode 52 and the first chip connecting portion 32a,
The solder 41 is inserted between the main electrode 53 and the second chip connection portion 32b, and inside the first solder flow passage 7a and the second solder flow passage 7b. Then, the semiconductor element 51, the first chip connecting portion 32a, the first inner lead 33a, the second chip connecting portion 32b, and the second inner lead 33b are connected to the resin sealing body 55 by a well-known transfer molding method. It is sealed.

First lead terminal 1 and second lead terminal 3
Are metal plate materials patterned into a predetermined shape by punching or etching, for example, aluminum (Al), copper (Cu), Cu-Fe, Cu-Cr,
Copper alloys such as Cu-Ni-Si, Cu-Sn, Ni-F
e, a nickel-iron alloy such as Fe-Ni-Co, or a composite material of copper and stainless steel can be used.
Further, these metals may be formed by plating nickel (Ni), gold (Au), or the like.

A first lead terminal 1 and a second lead terminal 3 used in the semiconductor device according to the first embodiment of the present invention
At the start of the assembling process, both have the same shape as shown in FIGS. 2 (a) and 2 (b). That is, both the first lead terminal 1 and the second lead terminal 3 include the chip connecting portions 32 a and 32 b and the inner leads 33.
a, 33b and the outer leads 35a, 35b are formed integrally and continuously. More specifically, as shown in FIG. 2A, the first chip connecting portion 32a includes a first wide portion 11a and a first narrow portion 20a continuous with the first wide portion 11a. First inner lead 33a
Is a wing portion 15a continuous with the first narrow portion 20a.
And a second narrow portion 21a continuous with the wing portion 15a. Then, the first outer lead 35a is connected to the third narrow portion 23a continuous with the second narrow portion 21a.
And a second wide portion 2 continuous with the third narrow portion 23a.
5a. On the other hand, as shown in FIG.
The chip connecting portion 32b includes a first wide portion 11b and a first narrow portion 20b continuous with the first wide portion 11b. The second inner lead 33b includes a wing portion 15b continuous with the first narrow portion 20b and a wing portion 15b.
And a second narrow portion 21b that is continuous with the second narrow portion 21b. And
The second outer lead 35b is connected to the second narrow portion 21b.
A third narrow portion 23b continuous with the third narrow portion 2
3b and a second wide portion 25b continuous with 3b.

When the assembly process is completed,
As shown in FIG. 1, the first lead terminal 1 includes first inner leads 33 a arranged inside a resin sealing body 55,
The first outer leads 35 a are led out from the left side surface of the resin sealing body 55, guided to the bottom surface along the left side surface, and bent below the bottom surface of the resin sealing body 55. On the other hand, the second lead terminal 3 is led out of the second inner lead 33b disposed inside the resin sealing body 55, the right side of the resin sealing body 55, and guided to the bottom surface along the right side, And a second outer lead b bent below the bottom surface of the resin sealing body 55. First
The first wide portions 11a and 11b of the second chip connecting portions 32a and 32b function as regions where the first and second main electrodes 52 and 53 of the diode chip 51 are joined by the solder 41. For this reason, as shown in FIG.
In the central portions of the wide portions 11a and 11b, convex portions 13a and 13b are formed so that the surfaces to be soldered protrude toward the first and second main electrodes 52 and 53, respectively. A recess 43 is formed. On the other hand, as shown in FIG. 1, the second wide portions 25a, 25, which are ends of the first outer lead 35a and the second outer lead 35b,
“b” is disposed on the bottom surface of the resin sealing body 55 and functions as a soldering electrode for soldering the power diode to an electrode or the like of a printed circuit board.

The second narrow portions 21a and 21b are formed by a first inner lead 33a and a second inner lead 33b.
Is formed as a band-shaped portion having a width smaller than that of the first wide portions 11a and 11b so that the bending process can be performed satisfactorily. The wing-shaped portions 15a, 15b provided on the second narrow portions 21a, 21b are engaged with the first inner leads 33a and the second inner leads 33b to improve the bonding force to the resin sealing body 55. Functions as a unit. Third narrow portions 23a and 23b constituting first outer lead 35a and second outer lead 35b
Is vertically drawn out from the side surface of the resin sealing body 55, is bent at a right angle along the side surface of the resin sealing body 55, and is further bent at a right angle along the bottom surface of the resin sealing body 55. Have been.

First and second chip connecting portions 32a, 32
The protrusions 13a, 13b provided on the joint surfaces (front surfaces) of the first wide portions 11a, 11b of FIG. 2b are relatively positioned by providing a recess 43 in the center region of the back surface of the corresponding first wide portions 11a, 11b. It was formed in a typical way. That is,
By pressing the central regions of the first wide portions 11a, 11b from one main surface (back surface) side to the other main surface (front surface) side, the central regions of the first wide portions 11a, 11b are partially formed. At the other main surface. In the first and second chip connecting portions 32a and 32b, the peripheral regions of the first wide portions 11a and 11b and the protrusions 13a and 13
The connecting portions (boundary portions) 5a and 5b with the b are partially thinner as shown in FIG. Fine through holes are provided in the connecting portions 5a and 5b from one main surface side to the other main surface side to form solder flow passages 7a and 7b. The solder flow paths 7a, 7b cross the connecting portions 5a, 5b in the thickness direction. Therefore, at the time of assembling (assembling) the semiconductor device, it is possible to suck up the solder 41 for fixing the diode chip 51 by capillary action. As a result, a part of the solder 41 for fixing the diode chip 51 is located inside the recess 43.
a, 7b.

The fine solder flow paths 7a, 7b can be formed by fine through cracks in the connecting portions 5a, 5b. The fine through cracks are caused, for example, by the protrusions 13.
When the extrusion parts a and 13b are extruded, the connection parts 5a and 5b are set by setting the extrusion strength slightly higher.
Can be intentionally generated. For example, the through crack has a width of about 100 nm to 1.5 μm and a length of 5 μm.
The connection portions 5a and 5b are formed in an irregular and irregular shape of about 00 nm to 5 μm. The solder flow path 7
a and 7b may be formed in an annular shape near the periphery of the chip connection portion along the edges of the protrusions 13a and 13b. Also,
In the vicinity of the peripheral portion of the chip connection portion, the convex portions 13a, 13
It may be formed intermittently along the edge of b.

The first main electrode (anode electrode) 52 and the second main electrode (cathode electrode) 5 of the diode chip 51
Numerals 3 are fixed to the projections 13a and 13b of the first lead terminal 1 and the second lead terminal 3 via solder 41, respectively. As a result, the first lead terminal 1 and the second lead terminal 3 function as an anode electrode terminal and a cathode electrode terminal of the diode chip 51, respectively.

As described above, in the semiconductor device according to the first embodiment of the present invention, the first and second chip connecting portions 3 are provided.
In 2a and 32b, since the first solder flow path 7a and the second solder flow path 7b are provided in the connection portions 5a and 5b, respectively, the diode chip 51 and the protrusions 13a and
The excess solder 41 between the solder flow path 13a and the solder flow path 7a,
7b, the first and second chip connecting portions 32a, 32
b flows into the concave portion 43 on the back surface side.

For this reason, the first and second main electrodes 52, 5
Even when the amount of solder supplied between the third and the first and second chip connecting portions 32a and 32b is relatively large, the solder 41 wraps around and adheres to the side surface of the diode chip 51. No extra solder 41 is scattered and attached to the chip and its surroundings. Therefore, a short circuit due to excess solder or scattered solder, a deterioration in the characteristics of the semiconductor device, and a problem in the production process are prevented. Further, since the supply amount of the solder 41 can be made relatively large, it is possible to sufficiently obtain the bonding strength of soldering. These facts indicate that no problem occurs at all even if the amount of supplied solder is somewhat large, and it becomes easy to control the amount of supplied solder.

In the above description, the first main electrode 52 is described as an anode electrode and the second main electrode 53 is described as a cathode electrode. However, this is only a selection by definition.
Even if the first main electrode 52 is a cathode electrode and the second main electrode 53 is an anode electrode, the technical idea of the present invention is not affected at all.

(Second Embodiment) As shown in FIG.
In the semiconductor device (power diode) according to the second embodiment of the present invention, the semiconductor element 51 is connected to the first lead terminal 61.
And the second lead terminal 63. However, the structure of the second lead terminal 63 is different from that of the first embodiment of the present invention. Diode chip 5 as semiconductor element
Reference numeral 1 denotes a first main electrode (anode electrode) 52 formed on the entire surface of the first main surface of the semiconductor chip and an entire surface of the second main surface as in the first embodiment of the present invention. And a second main electrode (cathode electrode) 53.

The first lead terminal 61 is connected to a first chip connecting portion 85 and a first chip connecting portion 85 connected to the first chip connecting portion 85.
, And a first outer lead 87 continuous with the first inner lead 86. on the other hand,
The second lead terminal 63 includes a connection conductor 65 as a second chip connection portion, a second inner lead 81 connected to the connection conductor 65, and a second outer lead connected to the second inner lead 81. 83. Unlike the first embodiment, the first chip connecting portion 85 has a planar shape and has no solder flow passage. On the other hand, the connection conductor 65 as the second chip connection portion has a solder flow passage 93. The solder 41 is inserted between the first main electrode 52 and the first chip connecting portion 85, between the second main electrode 53 and the connecting conductor 65, and inside the solder flow passage 93, respectively. .

Then, the semiconductor element 51, the first chip connecting portion 85, the first inner lead 86, the connecting conductor 65,
The second inner lead 81 and the second inner lead 81 are sealed with the resin sealing body 55 by a known transfer molding method.

Both the first lead terminal 61 and the second lead terminal 63 are made of a metal plate, for example, aluminum (A
l), copper (Cu), copper alloy, nickel / iron (Ni-F
e) Metals such as alloys, or nickel (N
i) It is made of a plated or gold (Au) plated material.

As shown in FIG. 4, the connecting conductor (second chip connecting portion) 65 includes a first wide portion 71, a narrow portion 77 continuous with the first wide portion 71, and a narrow portion 77. It comprises a continuous second wide portion 79. Narrow part 77
Is formed as a band-shaped portion having a width smaller than that of the first wide portion 73 so that the bending process can be performed well.
The second wide portion 79 functions as a portion to be soldered to the second lead terminal 63. The connection conductor 65 is made of a metal such as aluminum (Al), copper (Cu), a copper alloy, a nickel / iron alloy, or a metal obtained by plating these metals with nickel (Ni) or gold (Au). Needless to say, this is done.

In this manner, the solder 41 is connected to the wide portion of the second inner lead 81 at the second wide portion 79 of the connecting conductor 65. The wide portion of the second inner lead 81 is connected to the second wide portion 7 of the connecting conductor 65.
9 has almost the same shape. The second inner lead 81 further has a narrow portion continuous with the wide portion. The second outer lead 83 includes a narrow portion continuous with the narrow portion of the second inner lead 81, and a wide portion continuous with the narrow portion.

On the other hand, the first inner lead 86 is
A wing portion continuous with the narrow portion of the chip connecting portion 85 of
It consists of a narrow portion that is continuous with the wing portion. And the first
The outer lead 87 includes a narrow portion continuous with the narrow portion of the first inner lead 86, and a wide portion continuous with the narrow portion.

When the assembly process is completed,
As shown in FIG. 3, the first lead terminal 61 includes a first inner lead 86 disposed inside the resin sealing body 55,
The first outer leads 87 are led out from the left side surface of the resin sealing body 55, guided to the bottom surface along the left side surface, and bent below the bottom surface of the resin sealing body 55. On the other hand, the second lead terminal 63 is led out from the connection conductor 65 and the second inner lead 81 disposed inside the resin sealing body 55 and the right side of the resin sealing body 55, and extends along the right side surface. And a second outer lead 83 bent downward below the bottom surface of the resin sealing body 55.

The first wide portion 71 of the second chip connecting portion (connection conductor) 65 functions as a region where the second main electrode 53 of the diode chip 51 is joined by the solder 41. For this reason, as shown in FIG.
The surface to be soldered is the diode chip 5
A convex portion 71 protruding toward one side is formed, and a concave portion 95 is formed on the corresponding rear surface side. On the other hand, as shown in FIG. 3, the second wide portions that are the ends of the first outer lead 87 and the second outer lead 83 are
And functions as a soldering electrode for soldering the power diode to an electrode or the like of a printed circuit board.

Each of the first inner lead 86 and the second inner lead 81 has a narrow portion as a narrow band portion so that bending can be performed well. The narrow portions forming the first outer lead 87 and the second outer lead 83 are vertically led out from the side surface of the resin sealing body 55, and then perpendicularly extend along the side surface of the resin sealing body 55. It is bent and further bent at a right angle along the bottom surface of the resin sealing body 55.

The convex portion 7 provided on the joint surface (front surface) of the first wide portion 71 of the connecting conductor (second chip connecting portion) 65
1 is relatively formed by providing a concave portion 95 in the central region on the back surface of the corresponding first wide portion 71. That is, by pressing the central region of the first wide portion 71 from one main surface (back surface) side to the other main surface (front surface) side, the central region of the first wide portion 71 is partially pressed to the other side. Are formed so as to protrude from the main surface. In the connecting conductor (second chip connecting portion) 65, the first wide portion 71
(Boundary portion) 91 between the peripheral region of the lens and the convex portion 71
Has a partially reduced thickness as shown in FIG. A fine through hole is provided in the connecting portion 91 from one main surface side to the other main surface side to form a solder flow passage 93. The solder flow passage 93 crosses the connecting portion 91 in the thickness direction. Therefore, at the time of assembling (assembling) the semiconductor device, it is possible to suck up the solder 41 for fixing the diode chip 51 by capillary action. As a result, the diode chip 5 is
A part of the solder 41 for fixing 1 is invading through the solder flow passage 93.

The fine solder flow passage 93 is connected to the connecting portion 9.
It can be composed of one minute through crack. For example, when extruding the convex portion 71, the minute through crack can be intentionally generated in the connecting portion 91 by setting the extruding strength to be slightly higher. Note that the solder flow passage 93 may be formed in an annular shape in the vicinity of the peripheral portion of the chip connection portion along the edge of the projection 71. In addition, it may be formed intermittently in the vicinity of the periphery of the chip connection portion along the edge of the projection 71.

The first main electrode (anode electrode) 52 and the second main electrode (cathode electrode) 5 of the diode chip 51
Reference numerals 3 are respectively fixed to the first lead terminal 61 and the second lead terminal 63 via solder. As a result, the first
Lead terminal 61 and second lead terminal 63 function as an anode electrode terminal and a cathode electrode terminal of diode chip 51, respectively.

As described above, also in the semiconductor device according to the second embodiment of the present invention, in the connection conductor (second chip connection portion) 65, the solder flows to the connection portion 91 of the first wide portion 71. Since the path 93 is provided, the excess solder 41 between the diode chip 51 and the convex part 71 passes through the solder flow path 93 to the concave part 95 side of the back surface side of the connecting conductor (second chip connecting part) 65. Flow in.

For this reason, even if the amount of solder supplied between the diode chip 51 and the projection 71 of the connection conductor (second chip connecting portion) 65 is relatively large, the solder 41 remains on the side surface of the diode chip 51. It does not come around and adhere, or the extra solder 41 scatters and adheres to the chip and its periphery. Therefore, a short circuit due to excess solder or scattered solder, a deterioration in the characteristics of the semiconductor device, and a problem in the production process are prevented. Further, since the supply amount of the solder 41 can be made relatively large, it is possible to sufficiently obtain the bonding strength of soldering. These facts indicate that no problem occurs at all even if the amount of supplied solder is somewhat large, and it becomes easy to control the amount of supplied solder.

In the semiconductor device according to the second embodiment of the present invention, the case where the first lead terminal 61 has the first chip connecting portion 85 having a planar shape has been described. However, similar to the first lead terminal of the semiconductor device according to the first embodiment of the present invention, a protrusion protruding on the semiconductor element bonding side is provided, and around this protrusion, a solder flow formed by a through hole is provided. Obviously, it is more preferable to provide a road. In this way, since the excess solder flows through the solder flow path on the surface opposite to the semiconductor element bonding surface, even if the amount of supplied solder is somewhat large, the semiconductor element can be securely bonded and unnecessary solder semiconductor elements can be formed. It is possible to prevent adhesion and scattering to the object.

Further, in the above description of the semiconductor device according to the second embodiment of the present invention, the first main electrode 52 is described as the anode electrode and the second main electrode 53 is described as the cathode electrode. Is just a definitional choice. Therefore, the first main electrode 52 may be a cathode electrode, and the second main electrode 53 may be an anode electrode. Further, the configuration in which the first main electrode 52 and the first chip connection portion 85 and the second main electrode 53 and the connection conductor 65 are connected by solder has been described, but this is an example. . That is, the first lead terminal 6
The first and second lead terminals 63 are interchanged, and the first main electrode 52 and the connection conductor 65 and the second main electrode 53 and the first chip connection portion 85 are connected by soldering. Of course, a configuration may be used.

(Other Embodiments) The embodiments to which the present invention is applied have been described above. However, it should be understood that the description and drawings constituting a part of the disclosure of the above-mentioned embodiments limit the present invention. should not do. From the disclosure of other embodiments described below, various alternative embodiments, examples, and operation modes will be apparent to those skilled in the art.

In each of the above-described embodiments, at least one of the lead terminals is provided with the protrusion protruding toward the semiconductor element bonding side. However, the present invention is not limited to this. For example, a structure having a planar chip connection portion may be used. In the structure having the planar chip connection portion, even when the semiconductor element is soldered, if at least one of the chip connection portions is provided with a solder flow path composed of a fine through hole, the first and the second described above are provided. As in the second embodiment, the excess solder flows through the solder flow path, which is a through hole, on the surface opposite to the semiconductor element bonding surface, so that the semiconductor element can be securely bonded even if the amount of supplied solder is somewhat large. In addition, unnecessary adhesion and scattering of solder to the semiconductor element can be prevented.

In each of the above-described embodiments, the solder flow passage provided in the lead terminal is formed as a through crack. However, the present invention is not limited to this. For example, the solder flow passage may be formed by electric discharge machining, laser machining, ion milling, or the like. A pinhole-shaped through hole may be formed from the surface to be soldered to the opposite side.

The semiconductor element can be applied to various power device chips such as a power MOS FET chip, a power BJT chip, an IGBT chip, a power SIT chip, a GTO thyristor chip, and an SI thyristor chip, in addition to a diode chip. In these three-terminal devices, as a “control electrode”, for example, a gate electrode is further added in a power MOSFET, a power SIT, an IGBT, and the like, and a base electrode is further added in a power BJT. It does not give.

Further, the present invention can be applied to various semiconductor elements such as integrated circuits such as power ICs and various semiconductor sensors.

Further, a semiconductor device sealed with a can, for example, may be used instead of the resin sealing.

[0057]

According to the present invention, it is possible to provide a lead terminal which can easily control the amount of supplied solder when soldering in a package assembling process.

Further, according to the present invention, it is possible to provide a semiconductor device in which the amount of solder supplied when the semiconductor element is joined to the lead terminal in the assembling step can be easily controlled.

Further, according to the present invention, it is possible to provide a semiconductor device having low electric contact resistance and high mechanical adhesive strength by relatively increasing the supply amount of solder in the assembling step.

As a result, it is possible to provide a semiconductor device having a low on-resistance, high efficiency, and high reliability.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIGS. 2A and 2B are plan views respectively before an assembling step of first and second lead terminals used in the semiconductor device according to the first embodiment; FIGS.

FIG. 3 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a plan view before a step of assembling a connecting conductor used in a semiconductor device according to a second embodiment;

FIG. 5 is a sectional view of a conventional semiconductor device.

[Explanation of symbols]

 1, 61 First lead terminal 3, 63 Second lead terminal 5a, 5b, 91 Connecting portion 7a, 7b, 93 Solder passage 11a, 11b, 73 First wide portion 13a, 13b, 71 Convex portion 15a, 15b Wing portions 21a, 21b First narrow portion 23a, 23b Second narrow portion 25a, 25b, 77 Second wide portion 33a, 85 First inner lead 33b, 81 Second inner lead 35a, 87 First outer lead 35b, 83 Second outer lead 41 Solder 43, 95 Depression 51 Diode chip 52 First main electrode 53 Second main electrode 55 Resin sealing body 69 Connection conductor 77 Narrow portion

Claims (15)

(57) [Claims] 1. A semiconductor element having a first main electrode formed over the entire first main surface of a semiconductor chip and a second main electrode formed over the entire second main surface. A lead terminal used for a package, a first wide portion to be soldered to the first main electrode, and a center portion at the center of the first wide portion.
A convex portion having a convex connection surface and a peripheral portion surrounding the convex portion
And a connection between the convex portion and the peripheral region.
In part, the chip connection having a solder flow passage consisting of a through crack extending from the chip bonding surface side to the back side, and the inner leads connected to the chip-connecting portion, and an outer lead which is continuous to said inner leads A lead terminal, comprising: 2. The connecting part has a partly thinner wall thickness than others.
Claim 1, wherein the lead terminals, characterized in that are Kuna'. 3. The through crack has a width of 100 nm or more.
1.5 μm, 500 nm to 6 μm in length, irregular and irregular
The lead terminal according to claim 1, wherein the lead terminal has a regular shape . 4. The solder flow passage extends along the connection portion.
Or being formed in a ring shape.
2. The lead terminal according to 2 . 5. The chip connecting portion includes the first wide portion, a narrow portion continuous with the first wide portion, and a second wide portion continuous with the narrow portion. The lead terminal according to any one of claims 1 to 4, wherein the second wide portion is connected to the inner lead by soldering. 6. The lead terminal according to claim 1, wherein the chip connecting portion, the inner lead, and the outer lead are formed continuously and integrally. 7. The chip connecting portion includes the first wide portion and a first narrow portion continuous with the first wide portion, and the inner lead includes the first narrow portion. And a second narrow portion continuous with the wing portion. The outer lead has a third narrow portion continuous with the second narrow portion, and a third narrow portion continuous with the second narrow portion. 7. The lead terminal according to claim 6, comprising a second wide portion which is continuous with the narrow portion of No. 3. 8. A semiconductor element having a first main electrode formed on the entire surface of the first main surface of the semiconductor chip and a second main electrode formed on the entire surface of the second main surface, and a solder. A first chip connecting portion provided with a first wide portion for attaching, a first inner lead continuous with the first chip connecting portion, and a first inner lead continuous with the first inner lead.
A first lead terminal having an outer lead, and a second wide portion to be soldered, wherein the second width is
A convex part with a chip connection surface convex at the center of the wide part
And a peripheral area around the convex portion.
In the connecting portion between the convex portion and the peripheral region, the chip
A second chip connecting portion having a solder flow passage formed of a through crack extending from the connection surface side to the back surface side; a second inner lead connected to the second chip connecting portion;
A second lead terminal having a second outer lead continuous with the inner lead, between the first main electrode and the first chip connection portion, and between the second main electrode and the second A semiconductor device having a solder between the chip connecting portion and a solder inserted into the solder flow passage. 9. The connecting portion is partially thinner than the others.
9. The semiconductor device according to claim 8, wherein the thickness of the semiconductor device is reduced. 10. The through crack has a width of 100 nm or more.
1.5 μm, 500 nm to 6 μm in length, irregular and irregular
The semiconductor device according to claim 8, wherein the semiconductor device has a regular shape . 11. The solder flow passage extends along the connection portion.
8. Further, characterized in that it is formed annularly I
Is the semiconductor device according to 9 . 12. The second chip connecting portion includes a first wide portion, a narrow portion continuous with the first wide portion, and a second wide portion continuous with the narrow portion. , The second
2. The wide part of the first lead is connected to the second inner lead by soldering.
2. The semiconductor device according to claim 1. 13. The semiconductor device according to claim 8, wherein the second chip connecting portion, the second inner lead, and the second outer lead are formed continuously and integrally. 13. The semiconductor device according to claim 1. 14. The second chip connecting part includes a first wide part and a first narrow part continuous with the first wide part, and the second inner lead is formed by the second inner lead. The second outer lead is composed of a wing portion continuous with the narrow portion and a second narrow portion continuous with the wing portion. The second outer lead is a third portion continuous with the second narrow portion. And a second wide portion continuous with the third narrow portion.
13. The semiconductor device according to claim 1. 15. The semiconductor device according to claim 10, wherein a solder is disposed in a concave portion on the back surface side of said second chip connecting portion.