JP3350427B2 - Method of forming semiconductor thin film - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention suppresses a leak current at an interface between a substrate and an epitaxial growth layer, which is caused by impurities attached to a semiconductor substrate in a step of forming a semiconductor thin film by a crystal growth method. The present invention relates to a method for forming a semiconductor thin film which enables the method.

In other words, the present invention reduces a leak current generated at an interface between a substrate and an epitaxially grown crystal in a crystal growth technique for manufacturing a high electron mobility transistor or a field effect transistor expected to operate at high speed. Accordingly, it is an object of the present invention to provide a method of forming a semiconductor thin film, which has an advantage that reproducibility of transistor characteristics can be improved and a yield of device manufacturing can be improved.

[0003]

2. Description of the Related Art Generally, a high mobility transistor or a field effect transistor made of a compound semiconductor is manufactured by growing a crystal of the compound semiconductor on a substrate of the compound semiconductor. Recently, in order to enable high-speed operation, InP is used as a substrate, and InGaAs,
A device structure obtained by growing a crystal material such as InAlAs or InP is often used. InP substrates usually have
Fe is doped for increasing the resistance, and the resistivity is 10 ⁷ Ω · cm or more. Generally, the substrate crystal is cut, polished, washed in a clean room, and then put into a container in a state of being filled with nitrogen. At this time,
Residual silica in pure water used for cleaning contaminates the substrate surface. Further, since the filter material of the clean room also contains a large amount of silica, the atmosphere of the clean room may cause contamination of the substrate surface. In fact, it has been reported that the surface of a substrate left in a clean room is contaminated with silicon (for example, T. Nittono et al., J. Crystal Growt
h, 170, 762 (1997)). That is, when purchasing a substrate, it should be generally considered that silicon (silica) is attached to the surface. When an epitaxial crystal is grown using a substrate to which such an impurity is attached, the attached impurity becomes electrically active after the crystal growth and generates a leak current at the interface between the substrate and the epitaxial growth layer.

As a method of growing a device, a metal organic chemical vapor deposition (MOVPE) or a molecular beam epitaxial growth (MBE) is generally used. The substrate may be put into the apparatus as it is after being taken out of the container, or may be put into the apparatus after once etching the substrate surface by several tens to several hundreds of nm. In the latter case, impurities attached to the substrate can be removed once by etching,
The surface is recontaminated by the atmosphere before it enters the device. Thus, when introducing a substrate into the apparatus, surface contamination of the substrate is usually unavoidable. Conversely, the surface may be contaminated by etching. For example, when a substrate is etched with hot concentrated sulfuric acid, sulfur contaminates the surface of the substrate.

Prior to the step of growing device crystals, V
In general, the temperature of the substrate is increased to the growth temperature while supplying the group V raw material to the surface of the substrate so that the surface of the substrate is not roughened by evaporation of the group atoms. At this time, there is a method in which the adhered impurities are desorbed by maintaining the substrate temperature before crystal growth higher than the crystal growth temperature. The impurities on the substrate are removed by maintaining the substrate temperature at a high temperature and increasing the flow rate of the group V source gas at this time to combine the hydrogen generated by the decomposition of the source gas with the impurities attached to the substrate. Have been devised (eg, H. Ishik
awa et al., J. Appl. Phys. Lett, 71, 3898 (1992)). However, these methods may not be able to completely remove deposits, and at present, it is impossible to increase the resistance of the interface between the substrate and the epitaxially grown crystal with good reproducibility.

There has been proposed a method of electrically compensating instead of removing impurities adhering to a substrate. For example, a method has been proposed in which C, which is a p-type impurity, is two-dimensionally added to a GaAs substrate in order to electrically compensate for an n-type impurity (Si) attached to the GaAs substrate (Sasaki et al. JP-A-9-45896). But InP
In this case, since the impurity C becomes an n-type impurity instead of a p-type impurity, the method cannot be directly applied to growth using an InP substrate.

A method of two-dimensionally adding another impurity that becomes a p-type impurity in InP is considered.
Since it is not thermally stable as compared with As, the surface state of InP changes due to the evaporation of P atoms during the two-dimensional addition of the impurity, which makes it difficult to control the doping concentration. Furthermore, many defects are present on the substrate surface due to evaporation of oxide films and atoms that occur during polishing and heating of the substrate. Since some of these defects act as carrier traps, the method of adding impurities two-dimensionally directly onto the InP substrate has good controllability and electrically compensates for the impurities attached to the substrate. It is not possible at present.

[0008]

When a device crystal is grown using a substrate having an impurity attached to its surface as described above, the attached impurity is activated after epitaxial crystal growth, and the interface between the substrate and the epitaxially grown crystal is grown. To generate a leakage current. The resistance also varies depending on the amount of impurities attached to the surface. A high electron mobility transistor or a field effect transistor is characterized in that a current flows in a lateral direction with respect to a substrate, and a current flowing between a source and a drain is controlled by a voltage applied to a gate. Therefore, in addition to the layer structure designed for voltage control,
If a leak current occurs at the interface between the substrate and the epitaxially grown crystal as described above, a current also flows at this interface, and a problem arises in that desired transistor characteristics cannot be obtained even when the gate voltage is changed. I do.

The present invention has been proposed to solve the above problems, and an object of the present invention is to reduce a leak current generated at an interface between a substrate and an epitaxially grown crystal with good controllability and reproducibility.

[0010]

In order to achieve the above object, in the present invention, a semiconductor thin film is formed by the method described in the claims. That is, as described in claim 1, a step of forming an electrically neutral semiconductor layer on the semiconductor substrate, and the step of depositing the impurity having the property opposite to that of the impurity deposited on the surface of the semiconductor substrate. Forming a layer in which the surface density of the attached impurity is substantially equal to the surface density of the attached impurity so as to compensate for the electrical influence of the impurity; and forming a desired semiconductor thin film on the semiconductor substrate.
With this method, it is possible to reduce the leak current generated at the interface between the substrate and the epitaxially grown crystal thin film.

Good characteristics can be obtained by forming the impurity-doped layer having the electrically opposite characteristics as a bulk-doped layer as described in claim 2.

According to a third aspect of the present invention, InP is used as a semiconductor substrate, Zn is used as an impurity having an electrically opposite characteristic, and an InAlAs layer is used as the electrically neutral semiconductor layer. Thereby, good characteristics can be obtained.

Further, good characteristics can be obtained by setting the thickness of the electrically neutral semiconductor layer in the range of 1 nm to 10 nm.

According to a fifth aspect of the present invention, the concentration of the impurity having the electrically opposite characteristic is 1 × 10 ¹⁷ cm.
Good characteristics can be obtained by a range of ^-3 to 1 × 10 ²⁰ cm ^-3.

Experimental grounds for verifying the above are shown below.

As described above, impurities deposited on a semiconductor substrate are generally n-type. Therefore, in the present invention, the impurity used for compensation is a p-type impurity. For example, when an InP substrate is used as a semiconductor substrate, InAlAs is generally grown as a buffer layer.

Zn, Be, and C can be considered as p-type impurities with respect to InAlAs. However, in the MOVPE method, there is no high-purity Be source gas, and in the case of C, bonding with hydrogen occurs. Since there is a so-called carrier compensation problem in which carriers are not completely activated, it is preferable to use Zn with good controllability as an impurity. Further, InAlAs has a characteristic that the carrier concentration in the background is easily affected by the residual oxygen, so that the doping concentration is hardly affected by the impurity concentration in the background.
The controllability is good when the concentration range of 1 × 10 ¹⁷ to 1 × 10 ²⁰ cm ⁻³ is used.

As a method of adding impurities, there are a method of adding uniformly in the crystal, that is, a bulk doping method, and a method of adding two-dimensionally in the atomic layer, that is, a planar doping method. An experiment comparing these characteristics will be described below.

FIG. 1 shows experimental results for comparing the controllability of the bulk doping method and the planar doping method.
An MOVPE apparatus was used for crystal growth. The growth crystal thin film is InAlAs, and the case where Si is doped with disilane as a source gas as an impurity is shown.

FIG. 1A shows the relationship between the flow rate of disilane and the volume density of carriers (carrier concentration) when bulk doping is performed, and FIG. 1B shows the flow rate of disilane and the carrier areal density when planar doping is performed. (Sheet carrier concentration). It can be seen that in the case of bulk doping, the flow rate of disilane is directly related to the volume density of carriers, whereas in the case of planar doping, the increase in areal density tends to be saturated. Also, even when growth is repeated under the same conditions, bulk doping has better reproducibility. This is because, in the case of planar doping, in addition to doping at a high areal density, the surface state of InAlAs changes during doping, and the activation rate of carriers changes. FIG. 1 shows the case where Si is doped, but the doping characteristics are the same even when the impurity is Zn.

As described above, the MOVPE method is generally used for 60
Since the growth is performed at a high temperature of 0 ° C. or more, in the case of planar doping that needs to be interrupted, the crystal material evaporates during impurity addition. As a result, the surface state changes, and the controllability of the doping concentration deteriorates. In addition, planar doping has a drawback in that, when the doping amount is converted to volume density, the density becomes very high, and the carrier concentration generally tends to be saturated with respect to the doping amount, so that controllability is poor. Therefore, bulk doping is more controllable as an impurity doping method.

In addition, since the interface between the substrate and the epitaxially grown crystal has poor crystallinity and has carrier traps such as defects, when a layer doped with impurities is directly grown on the substrate, the initial growth near the interface is difficult. The activation rate of the carrier varies in the crystal, and the controllability of the carrier concentration decreases.

Further, when a layer doped with a p-type impurity is grown directly on an InP substrate, a problem of abnormal diffusion also occurs. As described above, the InP substrate has a F
e has been added. When an InAlAs crystal to which Zn is added is directly grown on this substrate, first, Zn moves to the InP substrate side by thermal diffusion to kick out Fe. The kicked out Fe diffuses to the InAlAs side, and then kicks out Zn. This repetition causes severe interdiffusion of impurities at the InAlAs / InP interface.

In order to solve this problem, the controllability of the carrier concentration can be improved by growing an electrically neutral layer before growing the p-type impurity layer. At this time, the thickness of the electrically neutral crystal to be inserted is 1n
It is possible to design in the range of m (about three monolayers) to 10 nm.

As described above, the present invention is characterized in that in forming a semiconductor thin film by crystal growth, a leak current at an interface between a substrate and an epitaxial growth layer, which is generated due to impurities attached to a semiconductor substrate, is reduced. That is, according to the present invention, a high electron mobility transistor and a field effect transistor, which are expected to operate at high speed, can be operated as designed, and the yield in device manufacturing can be improved.

[0026]

Next, an embodiment of the present invention will be described. FIG. 2 shows an embodiment of the present invention, in which an electrically neutral crystal is first grown on an InP substrate, and then an impurity is doped with an impurity having a characteristic opposite to that of the impurity deposited on the substrate. After reducing the leakage current generated at the interface between the substrate and the epitaxially grown crystal by growing
4 shows a layer structure when a high electron mobility transistor is grown. In FIG. 2, 1 is a semiconductor substrate (InP substrate), 2 is an electrically neutral layer (InAlAs spacer layer), and 3 is Zn as an impurity having an electrically opposite characteristic.
(P-InAlAs layer), 4 to 9 are semiconductor thin films, 4 is an InAlAs buffer layer, 5 is InG
aAs channel layer, 6 is a spacer layer of InAlAs, 7
Is a carrier supply layer in which InAlAs is doped with Si, 8 is a barrier layer of InAlAs, and 9 is an n-InGaAs contact layer in which Si is doped. Si, which is an n-type impurity, is attached to the surface of the substrate 1.

The leakage current at the interface between the substrate and the epitaxially grown crystal layer was evaluated from the current-voltage (IV) characteristics. Similar evaluations can be made using Hall effect measurement or eddy current measurement. The growth layer 3 shown in FIG. 2, that is, p-InA doped with Zn as an impurity having an electrically opposite characteristic.
FIG. 3 shows a change in resistance when the thickness of the lAs layer (doping concentration: 2 × 10 ¹⁸ cm ⁻³ ) is changed. At this time, the thickness of the electrically neutral layer, that is, the thickness of the InAlAs spacer layer 2 was constant at 2 nm. From the figure, it can be seen that the resistance is highest at a film thickness around 1.5 nm, and the leak current is reduced most. In FIG. 3, the decrease in resistance when the film thickness is small is caused by the fact that the amount of impurities attached to the substrate surface is larger than the amount of impurities in the growth layer 3. On the other hand, the decrease in resistance when the film thickness is large is due to the fact that the amount of impurities in the growth layer 3 is larger than the amount of impurities attached to the substrate. In other words, it can be understood that the leakage current can be reduced by doping an impurity having the same concentration and opposite electric characteristics as the impurity causing the leakage current. In this case, a doping concentration of 2 × 10 ¹⁸ cm ⁻³ was used. In general, a condition of a concentration range of 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ that allows good doping control. It is possible to obtain the same result even if the film thickness is changed by the above method.

The following can be seen from the above experimental results.
That is, as a method of forming a semiconductor thin film, a step of forming an electrically neutral semiconductor layer on a semiconductor substrate and an step of depositing an impurity having a property opposite to that of an impurity deposited on the surface of the semiconductor substrate are performed. After compensating for the electrical influence of the impurities, a step of forming a layer in which the surface density of the attached impurities and a substantially equal amount are added, and then forming a desired semiconductor thin film on the semiconductor substrate, Leakage current generated at the interface with the epitaxially grown crystal thin film can be reduced.

FIG. 4 shows that the effect of reducing the leakage current was confirmed in FIG. 3, and the thickness of the layer (p-InAlAs layer) 3 doped with impurities having an electrically opposite characteristic was 1.5 nm. Growth layer, ie, electrically neutral semiconductor layer (InAlA
5 shows a resistance change when the thickness of the (s spacer layer) 2 is changed. FIG. 4 shows that when the thickness of the spacer layer 2 is about 1 nm or more, a high resistance of 10 ⁷ Ω or more is realized. On the other hand, if the thickness of the spacer layer 2 is too thin,
This indicates that the activation rate of the carriers in the p-InAlAs layer 3 decreases, and the impurities attached to the substrate surface cannot be compensated.

Further, the fact that the crystal having the impurity doped with 2 × 10 ¹⁸ cm ⁻³ having a thickness of 1.5 nm can achieve a high resistance can be realized because the surface density of the impurity attached to the substrate is about 3 × 10 ¹¹ c.
m- ² . On the other hand, the background of the InAlAs spacer layer 2 is 1 × 10 ¹⁵ cm ⁻³ to 1 × 10 ¹⁶ cm ^{−3 due} to residual impurities (mainly oxygen) in the growth chamber.
In order to reduce the leakage current with good controllability, it is necessary to reduce the influence of the background of the spacer layer 2. For example, even if the background of InAlAs reaches the maximum value of 1 × 10 ¹⁶ cm ⁻³ ,
When the spacer layer 2 is designed with a film thickness of up to nm, the background carrier concentration is 1 × 10 ¹⁰ cm ^−2.
To a negligible level. In fact, it has been proved by an experiment that the leak current can be reduced with good controllability up to a spacer layer thickness of 10 nm.

FIG. 5 shows the threshold voltage of the high electron mobility transistor in which the interface between the substrate and the epitaxially grown crystal is increased in resistance by the above-described method and the high electron mobility transistor manufactured by the conventional growth method. Shows the deviation between the design value and the actual value. It can be seen that the measured value of the threshold voltage when the resistance is increased substantially matches the design value, whereas the deviation from the design value greatly varies in the conventional method.

The embodiment of the present invention has been described in connection with the case where a high electron mobility transistor is formed using an InP substrate. However, it is needless to say that the present invention can be applied to formation of other semiconductor substrates such as GaAs and other devices such as field effect transistors. In the above description, the case where MOCVD is used as the crystal growth apparatus has been described.
Similar effects can be expected in any of MBE, CBE, MOMBE, and VPE.

The epitaxially grown crystal includes In
In addition to AlAs, InP, InGaAs, GaAsS
b, AlAsSb, GaAs, AlGaAs, InGa
Materials such as P are conceivable.

In the embodiment, the contamination by silicon (silica) and the case where the contamination is electrically compensated for by Zn are shown.
Contaminants from the atmosphere include C, O, and S in addition to Si. Further, even after the substrate is introduced into the apparatus, residual impurities in the source gas may cause surface contamination. The contaminants at this time may include Se, Zn, Mg, Mn, and the like. The present invention can be applied to surface contamination due to residual impurities in the source gas, including both n-type and p-type.

Further, it is conceivable that the cause of the leak current is not an impurity attached to the surface. For example, a leak current may occur due to a defect generated in a substrate or a grown crystal. In some cases, residual impurities in the substrate or the epitaxially grown crystal may be the cause. In any case, the leak current can be reduced by using the present invention in which an impurity having a characteristic electrically opposite to the cause of the leak current is doped.

[0036]

As described above, according to the present invention, in the semiconductor crystal growth method, the leakage current at the interface between the substrate and the epitaxial growth layer, which is caused by the impurities attached to the semiconductor substrate, can be reduced by using the electrical reverse characteristic. It can be reduced by forming a layer containing impurities. This makes it possible to obtain desired device characteristics with good reproducibility in device manufacturing. In other words, it means that devices as designed can be manufactured with high yield, which has a great effect in promoting the practical use and application of various semiconductor devices.

[Brief description of the drawings]

FIG. 1 is a diagram showing a comparison between controllability of bulk doping and planar doping.

FIG. 2 is a cross-sectional view of a semiconductor thin film formed by the method shown in one embodiment of the present invention.

FIG. 3 is a diagram showing a relationship between the thickness of an impurity-added layer 3 (p-InAlAs layer) and resistance in the embodiment of the present invention shown in FIG.

FIG. 4 is a diagram showing a relationship between the thickness of an electrically neutral layer 2 (InAlAs spacer layer) and resistance in the embodiment of the present invention shown in FIG.

FIG. 5 is a diagram showing a difference between a measured value and a design value of a threshold voltage of a high electron mobility transistor grown by the present invention and a conventional method in order to show the effect of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate (InP substrate) 2 ... Electrically neutral semiconductor layer (InAlAs spacer layer) 3 ... Semiconductor layer (p-InAlAs layer) doped with impurities having electrically opposite characteristics 4 ... Semiconductor thin film ( InAlAs buffer layer 5 Semiconductor thin film (InGaAs channel layer) 6 Semiconductor thin film (InAlAs spacer layer) 7 Semiconductor thin film (n-InAlAs carrier supply layer) 8 Semiconductor thin film (InAlAs barrier layer) 9 Semiconductor thin film (n- InGaAs contact layer)

Continuation of the front page (72) Inventor Hiroshi Ito 3-19-2 Nishi Shinjuku, Shinjuku-ku, Tokyo Nippon Telegraph and Telephone Corporation (56) References JP-A-5-218590 (JP, A) JP-A-7 -263365 (JP, A) JP-A-2-170545 (JP, A) JP-A-4-72720 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/205 H01L 21/338 H01L 29/778 H01L 29/812

Claims (5)

(57) [Claims] In a method of forming a semiconductor thin film on a semiconductor substrate, a step of forming an electrically neutral semiconductor layer on the semiconductor substrate and a step of electrically opposite an impurity attached to the surface of the semiconductor substrate. Forming a layer in which an impurity having characteristics is added in an amount substantially equal to the areal density of the attached impurity so as to compensate for the electrical influence of the attached impurity. A method for forming a semiconductor thin film, wherein the method is formed on a substrate. 2. The method for forming a semiconductor thin film according to claim 1, wherein the layer doped with an impurity having an electrically opposite characteristic is a bulk-doped semiconductor layer. 3. The semiconductor device according to claim 1, wherein said semiconductor substrate is InP, said impurity having electrically opposite characteristics is Zn, and said electrically neutral semiconductor layer is InAlAs. Alternatively, the method of forming a semiconductor thin film according to claim 2. 4. The semiconductor device according to claim 1, wherein said electrically neutral semiconductor layer has a thickness of 1n.
4. The method according to claim 3, wherein the thickness is in the range of m to 10 nm. 5. The method according to claim 3, wherein the concentration of the impurity having the electrically opposite characteristic is in a range of 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ . A method for forming a semiconductor thin film.