JP3355672B2 - Bonding method of surface mounted chip-shaped electronic components - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for joining surface-mounted chip-shaped electronic components mounted on a printed circuit board. In particular, the present invention relates to solder bonding of chip-type multilayer ceramic capacitors.

[0002]

2. Description of the Related Art In recent years, the joining technology between an electronic component and a printed circuit board has been changed from the conventional insertion and immersion soldering technology of an electronic component with leads to mounting of chip type electronic components on a printed circuit board and reflow soldering with a solder paste. With the advancement in mounting technology, the momentum for high-density mounting of electronic components on printed circuit boards has been further accelerated. Also,
As an important elemental technology for reducing the weight and size of products, not only soldering technology but also technical improvement of chip-type components are being performed one after another. Above all, with regard to chip-type multilayer salamic capacitors, more attention has been paid to technology for improving characteristics, dimensions, quality and the like.

First, the structure of a conventional chip-type multilayer ceramic capacitor will be described with reference to FIG.

A conventional chip-type multilayer ceramic capacitor has a structure in which a ceramic dielectric 2 is used as a dielectric, and a paste of, for example, Pd or the like is printed on the ceramic dielectric 2 as an internal electrode 1 and is laminated in multiple layers. The number and dimensions of the layers to be stacked are determined according to predetermined electric capacity and characteristics.

The external electrodes are composed of the inner layer 3, the intermediate layer 4 and the outer layer 5.
The inner layer 3 is generally made of an Ag-Pd alloy, and the intermediate layer 4 is made of Ni. Further, the outer layer 5 is made of Sn or 90 wt% Sn-10 wt% P
The external electrode is formed by plating the solder b.

Next, a method of manufacturing a chip-type multilayer ceramic capacitor will be described with reference to FIG. First, as a ceramic paste, for example, a dielectric ceramic material of various metal oxides containing BaTiO ₃ as a main component, a resin binder such as polyvinyl butyral, a solvent such as 1,1,1-trichloroethane, and a dibutyl phthalate such as The additives are added and mixed (step 101). The ceramic sheet thus mixed is applied to a film, dried, and processed into a sheet (step 102). The sheet processed in this way is called a green sheet.

Next, an internal electrode is printed on the green sheet (step 103). This internal electrode has
For example, Pd is used, and is printed in a strip shape on a green sheet by using a thick film forming technique such as a silk screen method.

The green sheets on which the internal electrodes are printed are alternately laminated in such a manner that the printing positions of the internal electrodes are shifted in the direction of the long side, and several to several tens of the sheets are alternately laminated and then pressed (Step 10).
4).

Next, in order to process the laminated and pressure-bonded product into a chip shape, it is cut into a predetermined size (step 105). The chips thus cut are put in a firing furnace and sintered. This firing is 250 ~
Perform at a temperature of 500 ° C. for 20 to 50 hours to remove the binder. Next, firing is performed at 1100 to 1400 ° C (step 106). The sintered body fired in this manner is polished to expose the internal electrodes since the internal electrodes are covered with the ceramic device (step 107). Next, a paste of an Ag-Pd alloy is applied to the exposed portions at both ends of the internal electrode as an internal layer of the external electrode, and dried and baked (Step 108). Next, Ni is plated as an external electrode intermediate layer (step 109). Finally, Sn or 90 wt% Sn-10 wt% Pb solder is plated as an outer layer of the external electrode (step 110). Here, the melting point of Sn is about 232 ° C., and the liquidus temperature of the solder of 90 wt% Sn-10 wt% Pb is about 216 ° C. However, 90w
Regarding the plating of the solder of t% Sn-10wt% Pb on the outer layer of the external electrode, the content of Pb varies from 5wt% to 30wt% from the current mass production technology. In this case, the liquidus temperature of 70 wt% Sn-30 wt% Pb is about 191 ° C, and the liquidus temperature of 95 wt% Sn-5 wt% Pb is about 225 ° C.

Next, a general method of soldering a chip type multilayer ceramic capacitor on a printed circuit board will be described.

First, a solder powder, a flux mainly composed of rosin and a solvent are mixed to form a paste for printing, and this solder paste is applied to a predetermined position on a printed circuit board by silk-screen printing. I do. The composition of the solder powder in the solder paste is generally 63 wt% Sn-37 wt% P having a melting point of about 183 ° C.
The alloy of b is used.

Next, a chip-type multilayer ceramic capacitor is positioned on the applied solder paste after positioning.
Usually, an electronic component mounting machine is used for this.

Next, the printed circuit board is heated in two stages in an oxidizing atmosphere (usually air), an inert gas (usually nitrogen), or a reducing gas (usually a mixed atmosphere of hydrogen and nitrogen). First, in the first stage, the temperature is raised to about 150 ° C. to activate the flux component contained in the solder paste and evaporate the solvent. Since the main purpose of this step is to activate the flux component, it can be said that the solder does not usually melt. Generally, this stage is called preheating.

Next, as a second step, the printed circuit board is
The temperature is raised to about 20C to 230C. The purpose of this step is to actually perform the soldering, in which the solder is heated to a temperature about 20 to 60 ° C. higher than the liquidus temperature of the solder used. Here, the solder melts, and the electrodes of the electronic components mounted on the printed circuit board and the metal electrodes on the printed circuit board are joined by the solder. Next, the printed circuit board is cooled to room temperature, and the solder solidifies to complete the soldering.

As described above, in the conventional chip-type multilayer ceramic capacitor, Sn or 90 wt% S
The solder paste, which has n-10 wt% Pb, has a solder alloy of 63 wt% Sn-37 wt% Pb as a metal component in the solder paste, and the material of the external electrode outer layer is always the metal component in the solder paste used for bonding. , And the order of melting during soldering is in the order of the solder paste and the outer layer of the external electrode.

[0016]

However, in the above-described prior art, there is a problem that a defect called a tombstone on which a chip component stands occurs. In particular, there was a problem that the tombstone generation rate was higher when reflowing in an inert gas or reducing gas than when reflowing in air.

Furthermore, unevenness in physical force between the metal electrodes of the electronic component on the printed circuit board due to uneven heating, uneven temperature rise due to the heat capacity of the printed circuit board and the electronic component, difference in the amount of applied solder paste, and the like. May occur, causing tombstones.

The tombstone will be described below with reference to FIG. The solder paste 8 applied on the printed circuit board 6 is melted at the time of soldering to become molten solder 9 and wets the external electrode outer layer surface 11 of the electronic component 10. At this time, the molten solder 9 and the external electrode outer layer surface A tombstone generation moment 12 is generated from the interfacial tension 14 at the solid-liquid interface 11. On the other hand, on the printed circuit board side of the electronic component 10, a downward force is generated by the interfacial tension 15 between the molten solder 9 and the outer electrode surface 11, the adhesive force 16 due to the solid content of the flux in the solder paste, and the gravity 17 due to the weight of the electronic component. And a tombstone suppression moment 13 is generated. When the tombstone generation moment 12 becomes larger than the tombstone suppression moment 13, a phenomenon occurs in which the electronic component rises with one external electrode facing down. This is called a tombstone.

In recent years, electronic components have been miniaturized. In particular, in order to increase the mounting density of components, microelectronic devices having a length of 1.0 mm, a width of 0.5 mm, and a thickness of 0.5 mm, called 1005 chip components, have been developed. The use of chip components is increasing. Therefore,
Adhesive strength 1 due to reduced weight of electronic components themselves
6, the gravity 17 is reduced, and tombstones are more likely to occur. Therefore, there is a problem that the occurrence of tombstones increases.

Furthermore, in recent years, the problem of environmental destruction due to chlorofluorocarbon has been raised, measures have been taken to eliminate the chlorofluorocarbon cleaning of printed circuit boards, and low-residue solder pastes have been used. The residue is a solid flux component in the solder paste remaining on the printed circuit board after soldering. In the case of a low-residue solder paste, the residue is reduced by reducing the solid content in the flux. In addition, no cleaning is realized by using nitrogen reflow performed in a nitrogen atmosphere for soldering itself. The role of the flux in the solder paste is to prevent the metal electrodes on the printed circuit board and the solder powder in the solder paste from being oxidized by heating the printed circuit board, thereby preventing the wettability of the solder from being deteriorated. Therefore, nitrogen reflow reduces oxygen that causes oxidation of metal electrodes and solder powder during soldering. Since oxidation is suppressed by this nitrogen reflow, the wettability of the solder is improved, and the mounting quality of the printed circuit board is also improved.

However, when a low-residue solder paste is used, since the solid content in the flux is small, the adhesive strength 16 is reduced, and the tombstone suppressing moment 13 is reduced.
As a result, there is also a problem that tombstones are easily generated.

Furthermore, when soldering is performed by nitrogen reflow, oxidation of the metal powder on the printed circuit board and the solder powder in the solder paste is suppressed.
The solder wettability is improved, the molten solder 9 easily wets the outer electrode outer layer surface 11, and the tombstone generation moment 12 increases. Therefore, there is a problem that tombstone generation increases in soldering by nitrogen reflow.

Usually, the flux solid content as residue is 60
When a solder paste containing wt% is used and soldering is performed by reflow in the air, the tombstone generation rate of a 1005 chip component is 0.1 to 0.1% per mounted component.
0.9%, and when soldering is performed by nitrogen reflow using a low-residue solder paste, the tombstone occurrence rate for a 1005 chip component is 0.1 to 2.0% per mounted component. Assuming that the number of mounting points of 1005 chip components in one normal printed circuit board is 100, tombstone defects occur in almost all printed circuit boards.

Since the generated tombstone cannot be used as a product as it is, the printed circuit board on which the tombstone has occurred must be discarded or corrected one by one. Further, it is necessary to inspect all the printed circuit boards after soldering for tombstones. For this reason, there is also a problem that when a large amount of tombstones are generated, the time and cost required for producing a product increase.

The present invention has been made in view of the above problems, and provides a method for joining surface-mounted chip-shaped electronic components that can suppress the occurrence of tombstones.

[0026]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention relates to a surface-mounted chip-shaped electronic component having a rectangular parallelepiped shape and having external electrodes on side end surfaces, and a metal electrode of a printed circuit board. When joining using a joining material mainly composed of metal, the external electrodes of the electronic component begin to melt,
Next, the molten metal of the external electrode is melted while melting the joining material.
Diffused into the external component and the external electrode on the side end face of the electronic component.
This is a method of joining electronic components in the form of a surface-mounted chip , which joins metal electrodes of a printed circuit board with a joining material.
Joining material is not sucked up on the side end surface of the component, but
It can diffuse into the material,
Can be prevented.

[0027]

Next, the operation of the electronic component joining method of the present invention will be described.

Hereinafter, the state of the outer layer of the external electrodes and the solder paste of the chip-type multilayer ceramic capacitor in the bonding method according to the present invention will be described, and the tombstone suppression mechanism will be described.

First, as shown in FIG. 5A, the electronic component 10 is placed on the solder paste 8 applied on the printed circuit board 6. Next, it is carried into a heating furnace, and the printed circuit board 6 is heated. At this time, first, as shown in FIG. 5B, the metal of the external electrode outer layer 11 starts to melt, and the outer diameter of the electronic component 10 changes. Next, as shown in FIG. 5C, the solder paste 8 starts to melt. At this time, in the electronic component 10, since the external electrode outer layer 11 is in a molten state, the molten solder does not suck up on the solid electrode but diffuses into the molten metal in the direction of 18 in FIG. Become. For this reason, the interface becomes not a solid-liquid interface but a liquid-liquid interface, the interfacial tension is smaller than that of the solid-liquid interface, the tombstone generation moment is reduced, and the generation of tombstone is suppressed.

The concept of suppressing tombstones according to the present invention is that the outer layer of the external electrode of the electronic component is melted before the bonding material is melted during soldering, and a liquid-liquid interface is generated during bonding to reduce the tombstone generation moment. It is to make it smaller. Therefore, this state can be realized by using a metal having a lower liquidus temperature than the solder paste to be used for the outer layer of the external electrode of the electronic component.

Next, the specific relationship between the material of the outer layer of the external electrode of the electronic component satisfying the function of claim 1 and the metal component in the solder paste will be described.

First, the upper limit of the liquidus temperature is limited due to the heat resistance of electronic components and printed circuit boards. A commonly used printed circuit board material is glass epoxy resin or glass polyimide resin. Further, a resin such as PET or PPS is used for the package of the electronic component. Considering these materials, the substantial heating limit is about 350 ° C. In this case, as the external electrode outer layer material used, about 320 ° C. lower than the heating limit by about 30 ° C. is the highest value of the liquidus temperature. .

Next, the lower limit of the liquidus temperature is limited by the usage environment of the printed circuit board after mounting and the product incorporating the board. Specifically, for those used daily, the solidus temperature must be about 100 ° C. or higher.

Further, metals having a low solidus temperature generally have a problem of low strength, and the bonding strength of the joined solder becomes a problem. Specifically, as for the concept of the soldering strength, 63 wt% S commonly used in the prior art is used.
The n-37 wt% Pb solder strength about 6.2 kg / mm ² as a standard value, is considered to withstand practical use as long as this than about 30% less to about 4.4 kg / mm ² or more. If it is less than that, it cannot be used as soldering reliability. In addition, components harmful to the human body cannot be used.

As described above, Bi, In, Cd, Hg and the like are considered as additives for lowering the solidus of Sn-Pb type alloys, but Cd and Hg cannot be used from the viewpoint of harmfulness. In is inappropriate from the viewpoint of price, and Bi is appropriate. Further, from the viewpoint of strength, when Bi is added in an amount of 30 wt% or more, the strength becomes about 4.3 kg / mm ² or less, which is not practical. Therefore, a Bi amount of about 4.4 kg / mm ² or more is suitably less than 30 wt%. Incidentally, the smaller the Bi content, the greater the strength.

The strength can be increased by adding a small amount of Ag to the Sb-Pb solder. 62w
The alloy of t% Sn-36 wt% Pb-2 wt% Ag has a weight of 6.4 kg / mm ² and 63 wt% Sn-37 wt% P
b Larger than solder. However, if the amount of Ag added increases, the production cost also increases, so the Ag content is 4 wt%.
If it is below, it can withstand practical use.

Accordingly, as the material of the metal component of the solder paste and the material of the outer layer of the external electrode satisfying the above conditions, a metal having a Sn-Pb-Ag-based or Sn-Pb-Bi-based composition is suitable.

Further, as a specific weight composition of the alloy, the Sn-Pb-Ag alloy has an Ag content of 0%.
As a Sn-Pb-Bi-based alloy, an alloy having a Bi content of 0 wt% to less than 30 wt% is preferable, and a joint excellent in quality without impairing the function of the present invention can be obtained. It is possible.

[0039]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for joining electronic parts according to the present invention will be described.

FIG. 1 shows the structure of a chip type multilayer ceramic capacitor which is an electronic component used in the bonding method according to the present invention. The inside is composed of an internal electrode 1 and a ceramic dielectric 2, and has a structure in which the internal electrodes 1 are alternately stacked. The external electrode is composed of three layers of an inner layer 3, an intermediate layer 4, and an outer layer 5. The electrode material of the outer electrode outer layer 5 has a Ag content of 0 wt.
% To 4 wt% or less of a Sn-Pb-Ag alloy.
Sn having a Bi content of 0 wt% or more and less than 30 wt%
Any one of a Pb-Bi alloy.

The chip-type multilayer ceramic capacitor used as an example of the present invention was manufactured by the following procedure.

A ceramic powder mainly composed of BaTiO ₃ , a resin binder such as polyvinyl butyral,
A solvent such as 1,1-trichloroethane and an additive such as dibutyl phthalate were added, and the mixture was ball-milled for about 50 hours to produce a ceramic paste.

Next, this ceramic paste was applied on a polyester film by a doctor blade method to a thickness of 30 μm.
m, and after sufficient drying, a green sheet was prepared. This green sheet becomes the ceramic dielectric 2 after sintering. This green sheet is cut into a predetermined size, and a Pd paste composed of a Pd alloy, a resin binder, and a solvent is applied to the surface of the green sheet as an internal electrode 1 to a thickness of 5 μm by a silk screen printing method, and after sufficient drying, Thirty sheets were alternately stacked so that the Pd application pattern was shifted in the longitudinal direction, and the upper and lower portions were sandwiched by a 75 μm-thick sheet to which no Pd paste was applied, and were integrally laminated to have a thickness of 1.2 mm. Next, at a temperature of about 100 ° C., 200
Crimping was performed under a pressure of kg / cm ² , and then cut into predetermined dimensions. In the present example, the length was cut into 1.2 mm and the width was 0.6 mm in consideration of shrinkage during sintering of the ceramic. Next, the resin binder contained in the sheet was degreased at about 500 ° C. and 40 ° C.
After performing under the condition of time, the temperature is reduced to about 1500 ° C. for 24 hours.
After sintering for a time, a sintered ceramic chip was produced. Next, this sintered ceramic chip was placed in a container filled with alumina balls having a diameter of about 1 mm and pure water, and the ceramic end face was barrel-polished while rotating at a rotation speed of 30 rpm for 30 minutes. Take out the ceramic chip from the container and add 150
After drying at a temperature of 4 ° C. for 4 hours, an Ag-Pd paste as an external electrode inner layer 3 is applied to the exposed portions at both ends of the internal electrode 1 with a thickness of about 3 μm, and dried at a temperature of 80 ° C. for 30 minutes. Baking was performed at a temperature of 850 ° C. for 1 hour. Next, as the external electrode intermediate layer 4, Ni was added to a thickness of about 0.2 μm.
After plating, the external electrode outer layer 5 was plated at 3 μm.

Table 1 shows the plating material of the external electrode outer layer 5.
The metal having the composition shown in FIG. 10 was used in the present example and the conventional example as a comparative example by using eight kinds of external electrode outer layers 5.
A 05 chip type multilayer ceramic capacitor was manufactured. In addition, in Table 1, the numerical value described next to the element number is the weight percentage in the alloy.

[0045]

[Table 1]

Next, the manufactured chip-type multilayer ceramic capacitor was bonded to a test printed circuit board. The test printed circuit board is made of glass epoxy resin and is 100
It has a size of mm × 100 mm and a thickness of 0.8 mm, and can mount 2,240 1005 chip components. The metal electrode material on the printed circuit board is copper, and the size is a circle having a diameter of 0.5 mm and a cutout provided in a direction in which the two electrodes face each other, as shown in FIG. It was arranged so that the center-to-center distance was 0.9 mm.

The joining was performed in the following procedure. First, a solder paste was printed on a substrate using a solder paste printer. The metal mask used is made of stainless steel and has a thickness of 0.
The opening size of the pattern to which the solder paste was applied was 15 mm, which was the same as that of the metal electrode on the printed circuit board. The squeegee used for printing was made of phosphor bronze.

The solder paste used was a solder alloy having the composition shown in Table 2 as Nos. 1 to 7 as the solder powder of the metal component. The solid content mainly composed of rosin and 2-ethyl-, 3-hexanediol were used. A flux composed of a solvent and an activator as main components and a solder powder were mixed.

[0049]

[Table 2]

Next, the chip-type multilayer ceramic capacitor was precisely positioned on the solder paste applied on the metal electrodes of the printed circuit board using an electronic component mounting machine, and then placed. In this example, 1120 chip-type multilayer ceramic capacitors were arranged on one circuit board, and five printed circuit boards were manufactured for each condition.

The reflow was performed in a nitrogen atmosphere using a hot air heating furnace. Reflow conditions are 145 ° C, 6
The temperature was held at 0 seconds, the reflow top temperature was kept at 225 ° C. for 40 seconds, and the oxygen concentration in the reflow atmosphere was 50 ppm.

Evaluation was made by checking the occurrence of tombstones with a tool microscope after soldering, and counting the number of occurrences.
This was done by determining the incidence. The occurrence rate was calculated as the number of tombstone occurrences / the number of mounted components × 100.

In the first embodiment of the present invention, based on the above conditions, a chip-type ceramic capacitor having alloys having the compositions shown in Tables 1 to 8 in the outer layers of the external electrodes, and Tables 1 to 5 shown in Table 2 The tombstone occurrence rate was determined by mounting using a solder paste containing an alloy having a composition as a metal component.

[0054]

[Table 3]

In Table 3, numbers 1-2 are combinations of conventional chip-type multilayer ceramic capacitors and solder pastes, and in Table 3, numbers 3-34 are combinations of chip-type multilayer ceramic capacitors and solder pastes according to the present invention. is there.

In the second embodiment of the present invention, based on the above conditions, a chip-type multilayer ceramic capacitor having alloys having the compositions shown in Tables 1 to 4 in the outer electrode layers in Table 1 was prepared.
Among them, mounting was performed using a solder paste containing an alloy having a composition shown in Nos. 6 and 7 as a metal component, and the tombstone occurrence rate was determined.

Table 4 shows the results.

[0058]

[Table 4]

In Table 4, Nos. 1 and 2 are tombstone occurrence rates by a combination of a conventional chip-type multilayer ceramic capacitor made of an external electrode material and a solder paste. Table 4
Among them, numbers 3 to 7 are combinations of the chip-type multilayer ceramic capacitor according to the present invention and a solder paste.

[0060]

According to the present invention, an external electrode of an electronic component is melted.
Start and then melt the external electrode while melting the joining material.
Diffusion into the molten metal and external
The electrode and the metal electrode of the printed circuit board are connected by a bonding material.
A surface-mount chip-shaped joining method of the electronic component that case, I than the side end surface of the electronic component up smoking bonding material
In addition, by diffusing into the bonding material, the tombstone generation moment can be reduced, and the generation of tombstone can be suppressed and the electronic component can be prevented from rising.

As a result, a large height is generated in bonding of 1005 size micro chip components. Further, there is an effect that costs for inspection and correction of tombstones can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a sectional view of a chip-type multilayer ceramic capacitor according to an embodiment of the present invention.

FIG. 2 is a perspective view of a partial cross section of a conventional chip-type multilayer ceramic capacitor.

FIG. 3 is a manufacturing process diagram of a chip-type multilayer ceramic capacitor.

FIG. 4 is an explanatory diagram illustrating a state of a force applied to an electronic component when a tombstone occurs.

FIG. 5A is a front view showing a state in which the chip-type multilayer ceramic capacitor according to one embodiment of the present invention is arranged on a solder paste applied on a printed circuit board; Front view showing the state where the external electrode outer layer of the capacitor has begun to melt. (C) Front view showing the state of soldering of the external electrode outer layer and the molten solder in the molten state of the chip-type multilayer ceramic capacitor.

FIG. 6 is an explanatory view illustrating metal electrode dimensions of a test printed circuit board used in one embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 1 internal electrode 2 ceramic dielectric 3 external electrode inner layer 4 external electrode intermediate layer 5, 11 external electrode outer layer 6 printed circuit board 7 metal electrode 8 solder paste 9 molten solder 10 electronic component 12 tombstone generation moment 13 tombstone suppression moment 14 tomb Interfacial tension that promotes the generation of stones 15 Interfacial tension that suppresses tombstones 16 Adhesive force due to solid flux in solder paste 17 Gravity on electronic components 18 Direction of molten solder diffusion

──────────────────────────────────────────────────の Continued on the front page (72) Inventor Haruhito Nagata 1006 Kadoma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. In-company (56) References JP-A-4-297090 (JP, A) JP-A-63-283001 (JP, A) JP-A-1-274492 (JP, A) (58) Fields investigated (Int. . ^7, DB name) H05K 3/34

Claims (3)

(57) [Claims] 1. A a rectangular parallelepiped shape, and in joining with the joining material to the metal electrodes of the surface-mount chip-shaped electronic component and the printed circuit board having an external electrode on a side end face as a main component a metal The liquidus temperature of the material of the outer layer of the external electrode is lower than the liquidus temperature of the joining material, and
Start melting the electrode, then melt the joining material
Diffusion into the molten metal of the external electrode, the electronic component side
Bonds external electrodes on the end face to metal electrodes on the printed circuit board
A method for joining surface-mounted chip-shaped electronic components to be joined by materials . 2. A method for joining a surface-mounted chip-type electronic component having a rectangular parallelepiped shape and having external electrodes on side end surfaces to a metal electrode of a printed circuit board using a bonding material containing metal as a main component. The metal as the main component of the joining material is Sn
-Pb-Ag based, and when the alloy of Ag is 0 to 4 wt% or less, the outer electrode outer layer of the electronic component is Sn-P
It is composed of any one of a b-Ag alloy containing 0 to 4 wt% or less of Ag or a Sn-Pb-Bi alloy containing 0 to 30 wt% or less of Bi and an outer electrode outer layer. The liquidus temperature of the material is below the liquidus temperature of the joining material, the external electrodes of the electronic components begin to melt, and then the joining material
The material is diffused into the molten metal of the external electrode while melting.
And the external electrode on the side end face of the electronic component and the printed circuit board.
Surface mount type chip that joins the metal electrode of the plate with the joining material
For joining electronic parts in the form of a chip. 3. A method for joining a surface-mounted chip-shaped electronic component having a rectangular parallelepiped shape and having external electrodes on side end surfaces to a metal electrode of a printed circuit board using a bonding material containing metal as a main component. The metal as the main component of the joining material is Sn
When the alloy is a Pb-Bi-based alloy and Bi is 0 to 30 wt% or less, the outer layer of the external electrode of the electronic component is Sn-
Pb-Ag based alloy of 0 to 4 wt% or less, or Sn-Pb-Bi based alloy of Bi of 0 to 30 wt% or less, and an external electrode outer layer The liquidus temperature of the material is below the liquidus temperature of the joining material, the external electrodes of the electronic components begin to melt, and then
Diffusion into the molten metal of the external electrode while melting the material
And an external electrode on a side end face of the electronic component and a printed circuit.
Surface mount type that joins the metal electrode of the board with the joining material
A method for joining chip-shaped electronic components.