JP3360412B2 - Gradation correction device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a television receiver,
The present invention relates to a gradation correction device used for correcting a gradation of a video signal, such as a video tape recorder, a video camera, and a video disk.

[0002]

2. Description of the Related Art In recent years, as a color television receiver has been increased in size and image quality, a tone signal has been passed through a non-linear amplifier in order to make an image look sharper. Emphasis has been placed on correcting the gradation and expanding the dynamic range of an image on a CRT.

[0003] A conventional tone correction device will be described below. FIG. 2 shows a block diagram of a conventional tone correction device. In FIG. 2, reference numeral 1 denotes an AD converter that converts an input luminance signal into a digital value. Reference numeral 2 denotes a histogram memory for extracting a luminance histogram of the input luminance signal. Generally, a luminance level of the input signal is stored in an address of the memory, and a frequency is included in the data. Reference numeral 3 denotes a histogram operation circuit which calculates an average value, a mode value, a minimum value, a maximum value,
A deviation coefficient, a white area, a black area, and the like are calculated. Based on the calculation results, control values such as a limiter level, a constant addition value, an accumulated start luminance level, an accumulated stop luminance level, and a maximum luminance level are calculated. , Accumulation control register circuit 5, normalization control register circuit 6
Output to Reference numeral 4 denotes a limiter / addition circuit that processes data in the histogram memory 2. That is, the control data transferred from the histogram calculation circuit 3 restricts the frequency of the luminance histogram so that the frequency does not exceed a certain level, or performs an addition calculation of a constant value. Generally, during the period of extracting the luminance histogram (the period of sampling), the data processing ends while the address is accessed once. Reference numeral 5 denotes an accumulation control register circuit, which is supplied with a luminance level at which accumulation is to be started and a luminance level at which accumulation is to be stopped from the histogram operation circuit 3 to obtain an accumulation histogram, and controls the histogram accumulation and addition circuit 7.

Reference numeral 6 denotes a normalization control register circuit. When a lookup table is created by normalizing the data of the cumulative histogram, the maximum luminance level of the output luminance signal after the normalization is given from the histogram operation circuit 3. The normalization coefficient used in the lookup table calculation circuit 9 is controlled according to the value of the maximum luminance level so that the maximum cumulative frequency of the cumulative histogram becomes the maximum luminance level. Reference numeral 7 denotes a histogram accumulative addition circuit, which accumulates processing data of the histogram memory 2 according to a control signal of the accumulative control register circuit 5. Reference numeral 8 denotes a cumulative histogram memory, which stores the result of the cumulative operation of the histogram cumulative adding circuit 7. In general, the luminance level is set in the address of the memory, and the frequency is set in the data. Reference numeral 9 denotes a look-up table operation circuit, which normalizes each data of the cumulative histogram memory 8 based on the output signal of the normalization control register circuit 6, and then subtracts the corresponding luminance level from each data to obtain each luminance level. Is calculated.

[0005] Reference numeral 10 denotes a look-up table, which stores correction data calculated by the look-up table operation circuit 9. In general, the luminance level is set in the address of the memory, and the correction data is set in the data. A timing control circuit 11 controls the order of each operation, controls each memory, and the like. Reference numeral 12 denotes a luminance correction operation circuit, which performs a gradation correction operation by using a luminance signal of each pixel as an address, a correction signal read from a lookup table and a video signal as inputs. Reference numeral 13 denotes a DA converter, which converts a digital signal output from the luminance correction operation circuit 12 into an analog signal.

A / D converters 15 and 18 convert an input color difference signal into a digital value. Reference numerals 16 and 19 denote color correction operation circuits which maintain the Y / C ratio before and after the gradation correction by using the gradation correction data used in the luminance correction operation circuit 12 according to the luminance level and color level of the corresponding pixel. The tone correction calculation is performed on the color difference signals output from the AD converters 15 and 18 using the tone correction data for the color difference signal obtained by multiplying by C / Y. 17 and 20 are DA converters,
The digital signal outputs from the color correction operation circuits 16 and 19 are converted into analog signals.

[0007] The operation of the gradation correction circuit configured as described above will be described below. FIG. 3 shows the operation of each unit. First, the input luminance signal a is input to the AD converter 1, converted into a digital signal, and output as a converted input luminance signal b. The histogram memory 2 uses the converted input luminance signal b as an address, and adds 1 to the data at the address for each data. By performing this operation for one vertical scanning period, a luminance histogram of the input luminance signal a can be extracted. This state is shown in FIG.

Next, the data in the histogram memory 2 containing the luminance histogram is read out by the histogram calculation circuit 3, and the average value, mode value, minimum value, maximum value, deviation coefficient, white area, black area of the input luminance signal a are obtained. Calculate etc.
From these calculation results, control values such as a limiter level, a fixed addition value, a start brightness level and a stop brightness level for cumulative calculation, and a maximum brightness level after normalization are obtained, and these control signals e are converted to a limiter / addition circuit. 4. Transfer to the accumulation control register circuit 5 and the normalization control register circuit 6.

Next, a limiter / adder 4 reads data from the histogram memory 2 and applies a limiter (see FIG. 3B) or a constant to each data based on each control signal transferred from the histogram arithmetic circuit 3. Addition of values (Fig. 3
(See (c)), and outputs the result to the histogram accumulation circuit 7 as corrected histogram data c. Here, the larger the constant value to be added, the closer the cumulatively added curve is to a straight line, and the smaller the value, the closer to the histogram flattening process (see FIG. 3D).

The histogram accumulative adding circuit 7
Based on the cumulative start luminance level and the cumulative stop luminance level given from the cumulative control register circuit 5, the cumulative histogram data f of the corrected histogram data c is calculated within the range, and the result is stored in the cumulative histogram memory 8. This situation is shown in FIGS. 3C and 3D.

Next, look-up table operation circuit 9
Reads data from the cumulative histogram memory 8,
A normalization coefficient is determined so that the maximum value of the cumulative histogram data becomes the maximum output luminance level h given from the normalization control register circuit 6. Based on this coefficient, normalization processing is performed on each data g of the cumulative histogram. Is performed, the corresponding luminance level is subtracted from each data, and the result i is stored in the look-up table 10. At this time, by controlling the maximum output luminance level h, automatic contrast control (ACL) or automatic bright control (AB) is performed.
Operation L) can be performed. This operation is shown in FIG.

Next, the look-up table 10 reads the data j using the converted input luminance signal b as an address, and performs the gradation correction operation by the luminance correction operation circuit 12 using the data j and the converted input luminance signal b as inputs. , A corrected output luminance signal k is obtained. FIG. 3F shows a histogram of the corrected luminance signal. And 13 DA converters A
Converts the corrected output luminance signal k into an analog signal l and outputs it.

The input color difference signals m and r are digitally converted by AD converters 15 and 18 to obtain converted input color difference signals n and s. Then, the conversion input chrominance signals n and s are input to the color correction operation circuits 16 and 19 together with the luminance gradation correction data j and the conversion input luminance signal b, and the data j for the luminance correction is converted into the conversion input luminance signal b and the conversion input chrominance. Data for color correction is calculated by an operation (C / Y times) with the signals n and s. Further, a gradation correction operation is performed on the converted input color difference signals n and s based on the color correction data to obtain corrected output color difference signals p and t. Then, the DA converters 17 and 20
The corrected output color difference signals p and t are converted into analog signals q and u and output.

The timing control circuit 14 controls the operation of each circuit so that the operation of each unit is performed in the order described above.

[0015]

However, in the above-described conventional configuration, when the input luminance signal is a high-quality video signal having many grayscale bits, the processing from the process of extracting the characteristics of the video using the brightness histogram to the grayscale correction calculation is performed. Has to process a large amount of information corresponding to the gradation bits of the input luminance signal, so that the scale of the processing circuit becomes large, and the calculation speed must be increased as the amount of processing increases. Had issues.

The present invention solves the above-mentioned problems. The processing up to the calculation of correction data, which involves a lot of processing, is performed by making the input luminance signal a bit coarser, and the lookup table obtained by the processing is the same. For the tone correction operation, the correction data obtained from the two look-up tables are interpolated to calculate the tone correction data corresponding to the tone bits of the input luminance signal, and the correction operation is performed. By doing so, it is possible to reduce the processing circuit scale even for an input luminance signal having a large number of gradation bits and to process the processing speed at a low processing rate.
It is an object of the present invention to provide a gradation correction device capable of correcting a signal having a high gradation bit and a high display clock rate.

In the above-described conventional configuration, when the color signal is in the form of a color difference signal, the color correction operation circuit including a multiplier and the like is provided with two circuits.
There is a problem that a system is required and a double processing circuit is required.

The present invention has been made to solve the above-mentioned problems, and usually, the color signal band is less than half of that of the luminance signal, that is, the display rate of the color difference signal is equal to the display rate of the luminance signal. When the clock rate is suitable for the signal band of the luminance signal, paying attention to the fact that the chrominance signal changes data only once every two pixels, the two chrominance signals are applied to one system for each pixel. Divide and multiplex, perform the same color correction operation on this signal as before, and demodulate it to the original signal format in subsequent processing, so that even if the color signal format is a color difference signal, the color correction that was conventionally required It is an object of the present invention to provide a gradation correction device that can perform a color gradation correction process with a processing amount of １ ／ of a calculation processing amount.

[0019]

In order to solve the above-mentioned problems, a gradation correcting apparatus according to the present invention comprises: a first AD converter for converting an input luminance signal into a digital value; A histogram memory for storing a luminance histogram for a signal whose quantization bits are coarsened, and an image characteristic extraction such as an APL value, a maximum value, and a minimum value of an input luminance signal is performed from the data of the histogram memory. A histogram calculation circuit for calculating control parameters such as a clip value, an addition value, a cumulative start value, a cumulative stop value, and the like, and the maximum value of the data in the histogram memory is limited by control data from the histogram calculation circuit, A limiter / adder circuit for adding a constant value and processing data in the histogram memory; A histogram cumulative addition circuit for cumulatively adding data of a ram memory; a cumulative histogram memory for storing the operation result of the histogram cumulative addition circuit; A cumulative control register circuit for controlling start and stop values of processing, and a normalization control register for controlling a normalization process of data of the cumulative histogram memory based on a maximum value of the cumulative histogram memory obtained by the histogram arithmetic circuit. A look-up table for calculating gradation correction data by subtracting a corresponding luminance level from data obtained after normalizing the data of the cumulative histogram memory under the control of the normalization control register circuit. An arithmetic circuit,
A first look-up table for storing the operation results of the look-up table operation circuit in order from the correction data corresponding to the low luminance level; and a first look-up table for storing the correction data input to the first look-up table. A delay circuit that delays data by a data write time of one luminance level when writing data to the memory, a second lookup table that stores an output signal of the delay circuit, and a higher-order input luminance signal input to the histogram memory. The correction signal obtained from the first and second look-up tables using a bit signal as an address and the lower bit signal output from the first AD converter that has not been input to the histogram memory are input to the first and second input terminals. 2
A tone correction signal calculating circuit for calculating a tone correction signal corresponding to each brightness level of the brightness level signal by interpolating an output signal of the look-up table, and the first AD conversion as an input brightness signal A luminance correction operation circuit for performing gradation correction by an output signal of the gradation correction signal calculation circuit according to the luminance level of the same signal as the output signal of the device, and a first circuit for converting the output of the luminance correction operation circuit into an analog value DA
And a converter.

Further, the present invention provides the above-described gradation correction device,
A color correction signal operation circuit for calculating correction data of a color difference signal by using an output signal of the first AD converter and an output signal of the gradation correction signal calculation circuit as inputs, and an output signal of the color correction signal operation circuit An average value calculation circuit for calculating an average value of data for pixels; second and third AD converters for converting an input color difference signal into digital values; and the second and third AD converters
First and second low-pass filters for band-limiting the signal band of the output chrominance signal of the converter to half the signal band of the luminance signal, and time-sharing the output data of the first and second low-pass filters in pixel units A time-division multiplexing circuit that multiplexes the output signal of the time-division multiplexing circuit and an output signal of the average value calculation circuit of a pixel corresponding to the same signal as an input signal. A color correction operation circuit that performs gradation correction, a time division demodulation circuit that demodulates an output signal of the color correction operation circuit in a signal format before performing multiplexing processing in the time division multiplexing circuit on a pixel basis in a time division manner, There are second and third DA converters for respectively converting the color difference signals after the gradation correction operation obtained by the time division demodulation circuit into analog values.

[0021]

First, according to the first gradation correcting device of the present invention,
With the above-described configuration, the processing amount is reduced by coarsening the gradation bits from the processing of extracting the characteristics of the luminance distribution from the luminance histogram to the calculation of the look-up table, and the processing amount is reduced. By compensating for the reduced processing, it is possible to realize gradation correction equivalent to a correction effect and capable of reducing the processing amount.

Further, according to the second tone correction device of the present invention, with the above-described configuration, tone correction data is calculated in accordance with the brightness level for each pixel, and tone correction is performed on the brightness and color difference signals. When performing the gradation correction operation of the color difference signal, by performing time division multiplexing / demodulation processing before and after performing the correction operation, it is possible to realize gradation correction that can reduce the processing of the color correction operation. Becomes

[0023]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a tone correction device showing one embodiment of the present invention. In FIG. 1, reference numeral 101 denotes an AD converter A for converting an input luminance signal into a digital value. In the present embodiment, the following description is made on the assumption that the gradation bit is 10 bits. Reference numeral 102 denotes a histogram memory for extracting a luminance histogram of the input luminance signal. In this embodiment, a luminance histogram of the upper 8 bits is extracted. In general, the luminance level of the input signal is set in the address of the memory, and the frequency is set in the data.

Reference numeral 103 denotes a histogram calculation circuit which calculates the average value, mode value, minimum value, maximum value, deviation coefficient, white area,
A black area and the like are calculated, and control values such as a limiter level, a fixed addition value, an accumulated start luminance level, an accumulated stop luminance level, and a maximum luminance level are calculated, and the limiter / adder circuit 104 and the accumulated control register circuit 1 are calculated.
05, Output to the normalization control register circuit 106.

A limiter / adder circuit 104 processes data in the histogram memory 102. In other words, the control data transferred from the histogram operation circuit 103 limits the frequency of the luminance histogram so that it does not exceed a certain level, or performs an addition operation of a constant value. Generally, during the period of extracting the luminance histogram (the period of sampling), the data processing ends while the address is accessed once.

Reference numeral 105 denotes an accumulation control register circuit, which is provided with a luminance level at which accumulation is to be started and a luminance level at which accumulation is to be stopped from the histogram operation circuit 103 when the accumulation histogram is obtained, and controls the histogram accumulation and addition circuit 107.

Reference numeral 106 denotes a normalization control register circuit. When a lookup table is created by normalizing the data of the cumulative histogram, the maximum luminance level of the output luminance signal after the normalization is calculated by the histogram calculation circuit 103.
The normalization coefficient used in the lookup table calculation circuit 109 is controlled according to the value of the maximum luminance level so that the maximum cumulative frequency of the cumulative histogram becomes the maximum luminance level.

Reference numeral 107 denotes a histogram accumulation adding circuit, which accumulates processing data of the histogram memory 102 according to a control signal of the accumulation control register circuit 105. Reference numeral 108 denotes a cumulative histogram memory, which stores the result of the cumulative operation of the histogram cumulative adding circuit 107.
In general, the luminance level is set in the address of the memory, and the frequency is set in the data.

Reference numeral 109 denotes a look-up table operation circuit which normalizes each data of the cumulative histogram memory 108 based on the output signal of the normalization control register circuit 106, and subtracts a corresponding luminance level from each data. The tone correction data corresponding to each luminance level is calculated.

Reference numeral 110 denotes a look-up table, which stores the correction data calculated by the look-up table operation circuit 109. In general, the luminance level is set in the address of the memory, and the correction data is set in the data. 1
Reference numeral 11 denotes a timing control circuit, and the order of each operation,
It controls each memory. Reference numeral 112 denotes a delay circuit that delays the correction data calculated by the lookup table operation circuit 109 by one luminance level at the time of writing. 1
Reference numeral 13 also denotes a look-up table. The correction data calculated by the look-up table operation circuit 109 passes through the delay circuit 112 and is written as data. Therefore, the correction data for the luminance signal one luminance level before the data of the lookup table 110 is written in the lookup table 113 relative to the same address.

Reference numerals 114 and 115 denote selectors, and reference numeral 116 denotes an adder, which together constitute an interpolation circuit. The correction signal read from the look-up tables 110 and 113 using the luminance level of each pixel as an address is 0, 1/4, 1/2, 3/4 times and 1, 3 /
After being multiplied by a constant of 4, 1/2, and 1/4, the respective signals are input as data of the selectors 114 and 115, and the lower two bits of the input luminance signal are used as select signals of the selectors 114 and 115. By adding the selected signals thus obtained by the adder 116, a correction signal for all 10 bits of the input luminance signal is obtained.

Reference numeral 117 denotes a luminance correction operation circuit which performs a gradation correction operation by using the correction signal obtained from the adder 116 and the input luminance image signal from the AD converter 101 as inputs. 11
Reference numeral 8 denotes a DA converter, which converts a digital signal output from the luminance correction operation circuit 117 into an analog signal.

Reference numeral 119 denotes a color correction signal operation circuit which calculates a color correction signal by dividing the correction signal obtained from the adder 116 by the luminance image signal input from the AD converter 101. Reference numerals 120 and 121 denote delay circuits that delay the color correction signal by one display clock. 122,
123 is an adder, and 124 is a selector. Delay circuit 1
20, 121, an adder 123, and a selector 124,
The signal rate of the color correction signal output from the color correction signal calculation circuit 119 is reduced to １ ／. By switching the select signal of the selector 124 in units of one pixel, the data of the color correction signal is averaged with the adjacent data, and data conversion is performed so that the data change rate is in units of two pixels.

As described above, according to the present embodiment, the correction amount obtained by using the two look-up tables 110 and 113 is interpolated to reduce the processing amount without deteriorating the correction effect. It becomes possible.

(Embodiment 2) Next, another embodiment of the present invention will be described with reference to FIG. The description of the components related to the reference numerals described in the first embodiment is omitted here.

A / D converters 125 and 126 convert the input color difference signals A and B into digital values. 127, 128
Is a low-pass filter, and AD converters 125 and 12
The signal band of the output color difference signals A and B of No. 6 is limited to 1/2.

Reference numeral 129 denotes a time-division multiplexing circuit, which switches two color difference signals band-limited by the low-pass filters 127 and 128 in units of one pixel to multiplex them in a time-division manner to obtain one system signal. 130 is a color correction operation circuit, which outputs the output signal of the time division multiplexing circuit 129 and the selector 1
After inputting the 24 output color correction signals as inputs and multiplying the input 2 signals, the color correction arithmetic processing is performed by adding the multiple color difference signals output from the time division multiplexing circuit 129 again.

Reference numeral 131 denotes a time-division demodulation circuit, which performs signal separation for each pixel by inverse processing of the time-division multiplexing circuit 129 to obtain a color difference signal after color correction signal processing. 13
Reference numerals 2 and 133 denote DA converters, which are time-division demodulation circuits 131
Is converted into an analog signal after the gradation correction processing of the digital value obtained as the output.

As described above, according to this embodiment, it is possible to reduce the processing amount without deteriorating the correction effect. Further, when performing gradation correction on both the luminance and color difference signals, the color difference signal By performing the time-division multiplexing / demodulation processing before and after the correction operation is performed for the gradation correction operation, it is possible to realize the gradation correction that can reduce the processing of the color correction operation.

[0041]

As described above, according to the present invention, the number of processing circuits up to the calculation of the gradation correction signal can be reduced, the processing circuit scale can be reduced, and the processing speed can be reduced at a low processing rate. In addition, it is possible to realize a gradation correction device that can perform gradation correction for each pixel even for a luminance signal having more gradation bits and a high display clock frequency.

Further, according to the present invention, when the color signal format is a color difference signal, a tone correction device capable of performing color tone correction processing on a scale of a conventional color correction arithmetic processing circuit of 1/2. Can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of a tone correction device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional tone correction device.

FIGS. 3A and 3B are diagrams of (a) a histogram of input luminance data, (b) a histogram of corrected luminance data when a frequency is limited, and (c) a histogram when a frequency is limited and a fixed value is added. Histogram of corrected luminance data (d) Cumulative histogram of corrected luminance data (e) Output luminance level distribution diagram when maximum output luminance level is controlled (f) Histogram of corrected luminance data after gradation correction operation

[Explanation of symbols]

 1, 101 A / D converter 2, 102 Histogram memory 3, 103 Histogram operation circuit 4, 104 Limiter / addition circuit 5, 105 Cumulative control register circuit 6, 106 Regular control register circuit 7, 107 Histogram cumulative addition circuit 8, 108 Cumulative histogram Memory 9, 109 Look-up table operation circuit 10, 110 Look-up table 11, 111 Timing control circuit 112 Delay circuit 113 Look-up table 114, 115 Selector 116 Adder 12, 117 Brightness correction operation circuit 13, 118 DA converter 119 colors Correction signal operation circuit 120, 121 Delay circuit 122, 123 Adder 124 Selector 15, 125 AD converter 18, 126 AD converter 127, 128 Low-pass filter 129 Division multiplexing circuit 16, 19, 130 Color correction operation circuit 131 Time division demodulation circuit 17, 132 DA converter 20, 133 DA converter

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-3-126377 (JP, A) JP-A-3-23972 (JP, A) JP-A-4-293365 (JP, A) JP-A-4- 349783 (JP, A) JP-A-4-349784 (JP, A) JP-A-6-90381 (JP, A) JP-A-7-250339 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5/50-5/63 H04N 5/14-5/217 H04N 1/40 G09G 5/00-5/40

Claims (2)

(57) [Claims] 1. A converter for converting an input luminance signal into a digital value.
A D converter, a histogram memory for storing a luminance histogram for the higher-order bits of the digital value, and a feature of the input luminance signal calculated from an output of the histogram memory, and at least a limiter level, a constant addition value, and a cumulative start luminance based on the feature. A histogram operation circuit for calculating a plurality of control parameters including a level, an accumulated stop luminance level, and a maximum luminance level; a limiter / addition circuit for processing an output of the histogram memory according to a control parameter from the histogram operation circuit; , A cumulative histogram memory for storing the operation result of the histogram cumulative addition circuit, and a histogram in the histogram cumulative addition circuit based on a control parameter from the histogram calculation circuit. Start of gram cumulative addition processing,
A cumulative control register circuit for controlling a stop value, and a normalization operation of the output of the cumulative histogram memory based on the maximum luminance level obtained by the histogram arithmetic circuit.
And normalization control register circuit for controlling the calculated, normalized by the control from the normalization control register circuit
A look-up table operation circuit for subtracting a corresponding luminance level from the normalization operation result after the conversion operation, a first look-up table for writing an output of the look-up table operation circuit in an order corresponding to the low luminance level,
A delay circuit for delaying a write time for one luminance level when writing to the first lookup table;
A second look-up table into which the output of the delay circuit is written, and two outputs obtained from the first and second look-up tables using the upper bits of the digital value output from the AD converter as addresses. A circuit for multiplying by a constant, an adder for adding the circuit output after selecting the lower bit of the digital value, and an output of the adder and
A gradation correction device , comprising: a luminance correction operation circuit that performs gradation correction using an output of an A / D converter as an input; and a DA converter that converts an output of the luminance correction operation circuit into an analog value. 2. A first AD converter for converting an input luminance signal into a digital value, a histogram memory for storing a luminance histogram for upper bits of the digital value,
Histogram calculation for calculating a characteristic of an input luminance signal from an output of the histogram memory and calculating a plurality of control parameters including at least a limiter level, a constant addition value, an accumulated start luminance level, an accumulated stop luminance level, and a maximum luminance level from the characteristic. Circuit, a limiter / adder circuit for processing the output of the histogram memory according to the control parameter from the histogram calculation circuit, a histogram cumulative addition circuit for cumulatively adding the output of the histogram memory, and a calculation result of the histogram cumulative addition circuit. An accumulative histogram memory for storing, an accumulative control register circuit for controlling a start / stop value of the histogram accumulative addition processing in the histogram accumulative adder circuit based on a control parameter from the histogram arithmetic circuit; Normalization of the output of the cumulative histogram memory by the maximum luminance level obtained by the ram arithmetic circuit
And normalization control register circuit for controlling the operation, positive by control from the normalization control register circuit
A lookup table operation circuit for subtracting a corresponding luminance level from the normalization operation result after the normalization operation, and a first lookup table for writing an output of the lookup table operation circuit in an order corresponding to the low luminance level. A delay circuit for delaying a write time for one luminance level when writing to the first look-up table; a second look-up table for writing an output signal of the delay circuit; and an output of the AD converter. A circuit for multiplying each of the two outputs obtained from the first and second look-up tables by a constant with the upper bit of the digital value as an address, and an addition for adding the circuit output after selecting the lower bit of the digital value And the output of the adder
A luminance correction operation circuit for performing gradation correction by using the input of the power and the output of the A / D converter, a first DA converter for converting the output of the luminance correction operation circuit into an analog value, and the first AD converter A color correction signal operation circuit for calculating a color correction signal by using an output of the converter and an output of the adder as inputs, a circuit for calculating an average value of two pixels of the output of the color correction signal operation circuit, and an input color difference signal Second and third to convert the
An AD converter; first and second low-pass filters for band-limiting the signal band of the color difference signal output from the second and third AD converters to half of the signal band of the luminance signal;
A time-division multiplexing circuit for multiplexing the output of the second low-pass filter on a pixel-by-pixel basis in a time-division manner, and an output of the time-division multiplexing circuit and an average value of two pixels of a color correction signal corresponding to the output as inputs. A color correction operation circuit for performing gradation correction for the color difference signal by the ratio corrected by the luminance signal, and an output of the color correction operation circuit in a signal format before being subjected to multiplex processing by the time division multiplex circuit. A time-division demodulation circuit for demodulating in a time-division manner on a pixel-by-pixel basis, and second and third DA converters for respectively converting the color difference signals after the gradation correction operation obtained by the time-division demodulation circuit into analog values. A gradation correction device characterized by the above-mentioned.