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JP3365405B2 - Electronic component mounting method - Google Patents
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JP3365405B2 - Electronic component mounting method - Google Patents

Electronic component mounting method

Info

Publication number
JP3365405B2
JP3365405B2 JP2000220456A JP2000220456A JP3365405B2 JP 3365405 B2 JP3365405 B2 JP 3365405B2 JP 2000220456 A JP2000220456 A JP 2000220456A JP 2000220456 A JP2000220456 A JP 2000220456A JP 3365405 B2 JP3365405 B2 JP 3365405B2
Authority
JP
Japan
Prior art keywords
electronic component
bumps
circuit board
printed circuit
warpage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000220456A
Other languages
Japanese (ja)
Other versions
JP2001068844A (en
Inventor
忠彦 境
省二 酒見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2000220456A priority Critical patent/JP3365405B2/en
Publication of JP2001068844A publication Critical patent/JP2001068844A/en
Application granted granted Critical
Publication of JP3365405B2 publication Critical patent/JP3365405B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections

Landscapes

  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、電子部品のバンプ
をプリント基板の電極に固着するようにした電子部品の
実装方法に関するものである。 【0002】 【従来の技術】電子部品として、基板の上面にチップを
樹脂封止するモールド体を形成するとともに、この基板
の下面にバンプを形成したものが知られている。このよ
うな電子部品は、バンプをプリント基板の回路パターン
の電極に位置合わせして搭載され、このプリント基板を
加熱炉へ送り、加熱炉で加熱することによりバンプを溶
融させ、次いで冷却固化させることにより、バンプをプ
リント基板の電極に固着するようになっている。 【0003】以下、従来の電子部品の実装方法について
説明する。図6(a)は従来のプリント基板に搭載され
たバンプ固着前の電子部品の正面図、図6(b)は従来
のバンプ固着後の電子部品の正面図である。図6(a)
において、1は電子部品、2は基板、3は合成樹脂から
成るモールド体、4はバンプ、5はプリント基板、6は
プリント基板5の回路パターンの電極である。図示する
ように、電子部品1には反りaが発生しやすい。この反
りaは、主にモールド体3を形成するときに生じるモー
ルド体3の硬化収縮に起因して発生するものである。 【0004】さて、図6(a)に示すように、電子部品
1をプリント基板5に搭載した後、このプリント基板5
は加熱炉へ送られ、加熱される。するとバンプ4は溶融
し、次いで冷却すると、バンプ4は固化して電極6に固
着される。図6(b)は、固着後の状態を示している。 【0005】 【発明が解決しようとする課題】しかしながら上記従来
方法では、電子部品1の反りaが大きいと、図6に示す
ように両端部のバンプ4は電極6に接地・固着できず、
不良品となっていた。 【0006】そこで本発明は、反りの大きい電子部品で
あっても、そのすべてのバンプをプリント基板の電極に
確実に固着できる電子部品の実装方法を提供することを
目的とする。 【0007】 【課題を解決するための手段】このために本発明は、反
りを有する電子部品をプリント基板に搭載して加熱する
ことによりバンプを溶融するとともに、この加熱によっ
て前記反りを矯正して、溶融したすべてのバンプをプリ
ント基板の電極に付着させ、次いで冷却することにより
バンプを固化させるようにしたものである。 【0008】上記構成によれば、電子部品に大きな反り
があっても、この反りがほぼ矯正される温度まで加熱す
ることにより、すべてのバンプを電極に確実に固着でき
る。 【0009】 【発明の実施の形態】次に、図面を参照しながら本発明
の実施の形態を説明する。図1(a)(b)(c)は本
発明の一実施の形態における電子部品の実装工程の説明
図である。図1(a)は、プリント基板に搭載されたバ
ンプ固着前の電子部品の正面図、図1(b)はバンプが
加熱されて溶融中の正面図、図1(c)はバンプ固着後
の正面図である。図中、1は電子部品、2は基板、3は
合成樹脂から成るモールド体、4はバンプ、5はプリン
ト基板、6は電極である。図示するように、電子部品1
には反りaが発生しやすい。この反りaは、基板2とモ
ールド体3の熱膨張率の差異に起因して発生するもので
ある。 【0010】さて、図1(a)に示すように、電子部品
1をプリント基板5に搭載した後、このプリント基板5
は加熱炉へ送られ、後述する温度(230℃)以上にま
で加熱される。すると図1(b)に示すように電子部品
1の反りaは矯正され、加熱されて溶融したすべてのバ
ンプ4はプリント基板5の電極6に付着する。次いで冷
却すると、バンプ4は固化して電極6に固着される(図
1(c))。本方法によれば、加熱炉で加熱中に電子部
品1の反りaは矯正されてすべてのバンプ4は電極6に
固着されるものであり、以下その理由と方法について説
明する。 【0011】図2は本発明の一実施の形態における温度
と素材の伸びの関係図、図3は本発明の一実施の形態に
おける電子部品の反りの大きさと加熱温度の相関関係
図、図4は本発明の一実施の形態における電子部品の反
りの大きさとバンプと電極の接合不良率の相関関係図、
図5は本発明の一実施の形態における加熱炉における温
度プロファイル図である。図2において、基板2とモー
ルド体3には熱膨張率の差異があり、且つ基板2とモー
ルド体3はある温度(ガラス転位点a,b)以上になる
と、その伸びは急激に大きくなる。例えば基板2の素材
がガラエポの場合、そのガラス転位点aは140℃程度
であり、またモールド体3の素材がエポキシ樹脂の場
合、そのガラス転位点bは120〜140℃程度であ
る。 【0012】図3において、電子部品1の反りaは、加
熱温度が高くなるほど小さくなり、230℃ではその反
りは50μmにまで低下する。これは、加熱温度が高く
なるにつれて、図2に示すように基板2の伸びよりもモ
ールド体3の伸びのほうが大きくなって両者の差が大き
くなることにより収縮量の差が相殺されるためである。 【0013】また図4において、バンプ4の高さが60
0μm程度の場合、反りが80μm以下になると接合不
良率は0になる。すなわち、図3および図4から、電子
部品1を230℃以上に加熱して反りを80μm以下に
すれば、接合不良率は0となり、すべてのバンプ4は電
極6に固着されることが判る。 【0014】そこで電子部品1を加熱炉で加熱する際に
は、図5に示すように、230℃以上まで加熱すれば、
反りは矯正され、すべてのバンプ4は図1(b)に示す
ようにプリント基板5の電極6に付着し、次いで冷却す
ると図1(c)に示すように電極6に固着される。なお
バンプ4は半田材料から成っており、その溶融温度は、
図5に示すように183℃程度である。また図5におい
て、鎖線で示す温度プロファイルは上述した従来例の場
合であり、230℃以下にしか加熱しないことから、電
子部品1の反りは50μm以下にまで矯正されず、不良
品が発生していたものである。 【0015】 【発明の効果】以上説明したように本発明によれば、電
子部品に大きな反りがあっても、加熱中にこの反りを矯
正し、すべてのバンプをプリント基板の電極に確実に固
着できる。
Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a method of mounting an electronic component in which a bump of the electronic component is fixed to an electrode of a printed circuit board. 2. Description of the Related Art As an electronic component, there is known an electronic component in which a molded body for sealing a chip with a resin is formed on an upper surface of a substrate and a bump is formed on a lower surface of the substrate. Such electronic components are mounted with the bumps aligned with the electrodes of the circuit pattern of the printed circuit board, and the printed circuit board is sent to a heating furnace, heated in the heating furnace to melt the bumps, and then cooled and solidified. Thereby, the bumps are fixed to the electrodes of the printed circuit board. Hereinafter, a conventional method for mounting electronic components will be described. FIG. 6A is a front view of an electronic component mounted on a conventional printed circuit board before bump fixing, and FIG. 6B is a front view of the electronic component after conventional bump fixing. FIG. 6 (a)
1, 1 is an electronic component, 2 is a substrate, 3 is a molded body made of a synthetic resin, 4 is a bump, 5 is a printed board, and 6 is an electrode of a circuit pattern of the printed board 5. As shown in the figure, the electronic component 1 is likely to be warped a. The warpage a is mainly caused by the curing shrinkage of the mold body 3 that occurs when the mold body 3 is formed. [0006] As shown in FIG. 6 (a), after the electronic component 1 is mounted on a printed circuit board 5,
Is sent to a heating furnace and heated. Then, the bumps 4 are melted and then cooled, and the bumps 4 are solidified and fixed to the electrodes 6. FIG. 6B shows a state after the fixing. However, in the above-mentioned conventional method, if the warpage a of the electronic component 1 is large, the bumps 4 at both ends cannot be grounded and fixed to the electrode 6 as shown in FIG.
It was defective. SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of mounting an electronic component that can securely fix all the bumps to electrodes of a printed circuit board even if the electronic component has a large warp. SUMMARY OF THE INVENTION Accordingly, the present invention provides a method for mounting a warped electronic component on a printed circuit board and heating the same to melt the bumps and correct the warpage by the heating. Then, all the melted bumps are adhered to the electrodes of the printed circuit board and then cooled to solidify the bumps. According to the above configuration, even if the electronic component has a large warp, all the bumps can be securely fixed to the electrode by heating to a temperature at which the warp is almost corrected. Next, an embodiment of the present invention will be described with reference to the drawings. FIGS. 1A, 1B, and 1C are explanatory views of a mounting process of an electronic component according to an embodiment of the present invention. 1A is a front view of an electronic component mounted on a printed circuit board before the bumps are fixed, FIG. 1B is a front view of the bumps being heated and melted, and FIG. 1C is a view after the bumps are fixed. It is a front view. In the figure, 1 is an electronic component, 2 is a substrate, 3 is a molded body made of a synthetic resin, 4 is a bump, 5 is a printed board, and 6 is an electrode. As shown, the electronic component 1
Is liable to cause warpage a. The warpage a is caused by a difference in the coefficient of thermal expansion between the substrate 2 and the mold body 3. As shown in FIG. 1A, after the electronic component 1 is mounted on a printed board 5,
Is sent to a heating furnace and is heated to a temperature (230 ° C.) or higher, which will be described later. Then, as shown in FIG. 1B, the warp a of the electronic component 1 is corrected, and all the bumps 4 that have been heated and melted adhere to the electrodes 6 of the printed circuit board 5. Then, when cooled, the bumps 4 are solidified and fixed to the electrodes 6 (FIG. 1C). According to this method, the warpage a of the electronic component 1 is corrected during heating in the heating furnace, and all the bumps 4 are fixed to the electrodes 6. The reason and method will be described below. FIG. 2 is a diagram showing the relationship between the temperature and the elongation of the material in one embodiment of the present invention. FIG. 3 is a diagram showing the correlation between the degree of warpage of the electronic component and the heating temperature in one embodiment of the present invention. Is a correlation diagram of the warpage of the electronic component and the bonding failure rate of the bump and the electrode in one embodiment of the present invention,
FIG. 5 is a temperature profile diagram in the heating furnace according to one embodiment of the present invention. In FIG. 2, there is a difference in the coefficient of thermal expansion between the substrate 2 and the mold body 3, and when the temperature of the substrate 2 and the mold body 3 exceeds a certain temperature (glass transition points a and b), the elongation increases sharply. For example, when the material of the substrate 2 is glass epoxy, the glass transition point a is about 140 ° C., and when the material of the mold body 3 is epoxy resin, the glass transition point b is about 120 to 140 ° C. In FIG. 3, the warpage a of the electronic component 1 decreases as the heating temperature increases, and at 230 ° C., the warp decreases to 50 μm. This is because, as the heating temperature increases, the elongation of the mold body 3 becomes larger than the elongation of the substrate 2 as shown in FIG. 2 and the difference between the two increases, thereby offsetting the difference in shrinkage. is there. In FIG. 4, the height of the bump 4 is 60.
In the case of about 0 μm, when the warpage is 80 μm or less, the bonding failure rate becomes zero. That is, from FIGS. 3 and 4, it can be seen that if the electronic component 1 is heated to 230 ° C. or more to reduce the warpage to 80 μm or less, the bonding failure rate becomes 0 and all the bumps 4 are fixed to the electrodes 6. Therefore, when heating the electronic component 1 in a heating furnace, as shown in FIG.
The warp is corrected, and all the bumps 4 adhere to the electrodes 6 of the printed circuit board 5 as shown in FIG. 1B, and then are fixed to the electrodes 6 when cooled as shown in FIG. 1C. The bump 4 is made of a solder material, and its melting temperature is
As shown in FIG. In FIG. 5, the temperature profile indicated by the dashed line is the case of the above-described conventional example. Since the heating is performed only to 230 ° C. or less, the warpage of the electronic component 1 is not corrected to 50 μm or less, and defective products are generated. It is a thing. As described above, according to the present invention, even if the electronic component has a large warp, the warp is corrected during heating, and all the bumps are securely fixed to the electrodes of the printed circuit board. it can.

【図面の簡単な説明】 【図1】(a)本発明の一実施の形態における電子部品
の実装工程の説明図 (b)本発明の一実施の形態における電子部品の実装工
程の説明図 (c)本発明の一実施の形態における電子部品の実装工
程の説明図 【図2】本発明の一実施の形態における温度と素材の伸
びの相関関係図 【図3】本発明の一実施の形態における電子部品の反り
の大きさと加熱温度の相関関係図 【図4】本発明の一実施の形態における電子部品の反り
の大きさとバンプと電極の接合不良率の相関関係図 【図5】本発明の一実施の形態における加熱炉における
温度プロファイル図 【図6】(a)従来のプリント基板に搭載されたバンプ
固着前の電子部品の正面図 (b)従来のプリント基板に搭載されたバンプ固着後の
電子部品の正面図 【符号の説明】 1 電子部品 2 基板 3 モールド体 4 バンプ 5 プリント基板 6 電極
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is an explanatory diagram of an electronic component mounting process according to an embodiment of the present invention. FIG. 1B is an explanatory diagram of an electronic component mounting process according to an embodiment of the present invention. c) An explanatory view of a mounting process of an electronic component according to an embodiment of the present invention. FIG. 2 is a diagram showing a correlation between temperature and elongation of a material according to an embodiment of the present invention. FIG. 4 is a diagram showing the correlation between the degree of warpage of the electronic component and the heating temperature in the embodiment. FIG. 6 (a) is a front view of an electronic component mounted on a conventional printed circuit board before fixing a bump, and FIG. 6 (b) is a front view of an electronic component mounted on a conventional printed circuit board after fixing the bump mounted on the conventional printed circuit board. Front view of electronic components 1) Electronic components 2 Substrate 3 Mold 4 Bump 5 Printed circuit board 6 Electrode

フロントページの続き (56)参考文献 特開 平5−275846(JP,A) 特開 昭60−111497(JP,A) 特開 平2−134896(JP,A) 特開 平6−224550(JP,A) (58)調査した分野(Int.Cl.7,DB名) H05K 3/34 H01L 21/60 H01L 23/12 Continuation of the front page (56) References JP-A-5-275846 (JP, A) JP-A-60-111497 (JP, A) JP-A-2-134896 (JP, A) JP-A-6-224550 (JP) , A) (58) Field surveyed (Int. Cl. 7 , DB name) H05K 3/34 H01L 21/60 H01L 23/12

Claims (1)

(57)【特許請求の範囲】 【請求項1】基板の上面にチップを封止する合成樹脂モ
ールド体を形成するとともに基板の下面にバンプを形成
して成り、且つ前記合成樹脂モールド体の硬化収縮に起
因する反りを有する電子部品をプリント基板に実装する
電子部品の実装方法であって、 電子部品をプリント基板に搭載して加熱することにより
バンプを溶融するとともに、この加熱によって前記反り
を矯正して、溶融したすべてのバンプをプリント基板の
電極に付着させ、次いで冷却することによりバンプを固
化させることを特徴とする電子部品の実装方法。
(57) [Claim 1] A synthetic resin mold for sealing a chip is formed on an upper surface of a substrate and a bump is formed on a lower surface of the substrate, and the synthetic resin mold is cured. An electronic component mounting method for mounting an electronic component having warpage due to shrinkage on a printed circuit board, wherein the electronic component is mounted on the printed circuit board and heated to melt the bumps and correct the warpage by the heating. Then, all the melted bumps are attached to the electrodes of the printed circuit board, and then the bumps are solidified by cooling.
JP2000220456A 2000-07-21 2000-07-21 Electronic component mounting method Expired - Fee Related JP3365405B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000220456A JP3365405B2 (en) 2000-07-21 2000-07-21 Electronic component mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000220456A JP3365405B2 (en) 2000-07-21 2000-07-21 Electronic component mounting method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP03518995A Division JP3185588B2 (en) 1995-02-23 1995-02-23 Electronic component mounting method

Publications (2)

Publication Number Publication Date
JP2001068844A JP2001068844A (en) 2001-03-16
JP3365405B2 true JP3365405B2 (en) 2003-01-14

Family

ID=18715065

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000220456A Expired - Fee Related JP3365405B2 (en) 2000-07-21 2000-07-21 Electronic component mounting method

Country Status (1)

Country Link
JP (1) JP3365405B2 (en)

Also Published As

Publication number Publication date
JP2001068844A (en) 2001-03-16

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