JP3366531B2 - Current differential protection relay - Google Patents
Current differential protection relayInfo
- Publication number
- JP3366531B2 JP3366531B2 JP23691996A JP23691996A JP3366531B2 JP 3366531 B2 JP3366531 B2 JP 3366531B2 JP 23691996 A JP23691996 A JP 23691996A JP 23691996 A JP23691996 A JP 23691996A JP 3366531 B2 JP3366531 B2 JP 3366531B2
- Authority
- JP
- Japan
- Prior art keywords
- current
- output
- current characteristic
- differential
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Emergency Protection Circuit Devices (AREA)
Description
【発明の詳細な説明】Detailed Description of the Invention
【0001】[0001]
【発明の属する技術分野】この発明は、電流差動保護継
電装置、特に外部故障除去時に不要動作しない高信頼度
の電流差動保護継電装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current differential protection relay device, and more particularly to a highly reliable current differential protection relay device which does not perform unnecessary operation when an external fault is removed.
【0002】[0002]
【従来の技術】図20は従来の電流差動保護継電装置
(以下、単にリレーと称す)を示すブロック図である。
図において、Lは被保護送電線、CTAは被保護送電線
Lに流れる電流を検出する変流器、ADはアナログ/デ
ィジタル変換手段、TRは伝送手段、IAは端子電流、
IB、ICは他端子電流である。2. Description of the Related Art FIG. 20 is a block diagram showing a conventional current differential protection relay device (hereinafter, simply referred to as a relay).
In the figure, L is a protected transmission line, CTA is a current transformer that detects a current flowing through the protected transmission line L, AD is analog / digital conversion means, TR is transmission means, IA is terminal current,
IB and IC are other terminal currents.
【0003】DIFは下記の演算式(1)で差動電流I
Dを導出する差動電流導出手段、RESは下記の演算式
(2)で抑制電流IRを導出する抑制電流導出手段、A
は差動電流ID、抑制電流IRを導入して大電流域の特
性演算を行う大電流特性手段、Bは同様に差動電流I
D、抑制電流IRを導入して小電流域の特性演算を行う
高感度小電流特性手段、AN1は論理積手段、ATは伝
送手段TRに接続された送受信機である。DIF is a differential current I calculated by the following arithmetic expression (1).
Differential current deriving means for deriving D, RES is a suppressing current deriving means for deriving the suppressing current IR by the following arithmetic expression (2), A
Is a large current characteristic means for performing characteristic calculation in a large current region by introducing the differential current ID and the suppression current IR, and B is also the differential current I.
D, high-sensitivity small current characteristic means for performing characteristic calculation in the small current region by introducing the suppression current IR, AN1 is a logical product means, and AT is a transceiver connected to the transmission means TR.
【0004】下記に各演算式例を示す。
差動電流導出手段DIFによる差動電流IDの演算式
ID=|IA+IB+IC| ・・・(1)
抑制電流導出手段RESによる抑制電流IRの演算式
IR=|IA|+|IB|+|IC| ・・・(2)
大電流特性手段Aによる演算式
|ID|≧KA|IR|+KOA ・・・(3)
高感度小電流特性手段Bによる演算式
ID ≧KB|IR|+KOB ・・・(4)
但し|X|=√{X(t)2 +(t−90)2 }、KA
>KB、KOA>KOB。
Xt:Xの現在の瞬時値
Xt−90:Xの現在より電気角で90゜過去の瞬時値
KA、KB:直線A、Bの傾き
KOA、KOB:直線A、BのID 軸上の切片The following is an example of each arithmetic expression. Expression for calculating differential current ID by differential current deriving means DIF ID = | IA + IB + IC | (1) Expression for suppressing current IR by suppressing current deriving means RES IR = | IA | + | IB | + | IC | (2) Calculation formula by high current characteristic means A | ID | ≧ KA | IR | + KOA (3) Calculation formula by high sensitivity small current characteristic means B ID ≧ KB | IR | + KOB ・ ・ ・ ( 4) where | X | = √ {X (t) 2 + (t-90) 2 }, KA
> KB, KOA> KOB. Xt: Current instantaneous value of X Xt-90: Instantaneous value of 90 ° past in electric angle from the present of KA, KB: slopes of straight lines A and B KOA, KOB: intercepts of straight lines A and B on the I- D axis
【0005】図21は電流差動保護継電装置の特性図、
図22は外部故障時の電流分布を示す図である。この図
22に示すように、外部故障FOで故障電流が集中する
端子A側の変流器CTAが直流飽和している状態で、外
部故障FOが除去されると、変流器CTAの二次側に直
流分が過渡的に残留することが知られている。このと
き、端子B、端子Cの変流器CTB、CTCの二次側に
は残留電流が発生しないため、この現象はリレーからみ
ると内部故障と見え、残留電流の大きさがリレーの感度
以上でしかも残留電流の継続時間がリレーの動作時間を
越えると不要動作する。FIG. 21 is a characteristic diagram of a current differential protection relay device,
FIG. 22 is a diagram showing a current distribution at the time of an external failure. As shown in FIG. 22, when the external fault FO is removed while the current transformer CTA on the terminal A side where the fault current is concentrated in the external fault FO is saturated with DC, the secondary current of the current transformer CTA is removed. It is known that the DC component transiently remains on the side. At this time, since residual current does not occur on the secondary side of the current transformers CTB and CTC at terminals B and C, this phenomenon appears as an internal failure from the viewpoint of the relay, and the magnitude of the residual current exceeds the sensitivity of the relay. Moreover, if the duration of the residual current exceeds the operation time of the relay, unnecessary operation is performed.
【0006】図23は外部故障時のタイムチャートであ
り、このタイムチャートに残留電流、抑制電流IR、差
動電流IDの波形及び大電流特性手段A、高感度小電流
特性手段Bの出力状況及び図24の外部故障時の電流軌
跡図との対応を示す。FIG. 23 is a time chart at the time of an external failure. In this time chart, the waveforms of the residual current, the suppression current IR, the differential current ID and the output states of the large current characteristic means A and the high sensitivity small current characteristic means B and FIG. 25 shows the correspondence with the current locus diagram at the time of external failure in FIG. 24.
【0007】この図24の外部故障時の電流軌跡図にお
いて、
イは負荷電流時
(大電流特性手段A:動作、高感度小電流特性手段B:
不動作)。
ロは外部故障が発生の瞬間(第1波)で未だ変流器CT
Aが直流飽和を起こしていない状態で、抑制電流IR》
差動電流ID
(大電流特性手段A:動作→不動作(復帰時間
tREA )、高感度小電流特性手段B:不動作)。
ハは直流飽和中(第2波,第3波,第4波)でロに比べ
て差動電流IDが増加した状態
(大電流特性手段A:不動作、高感度小電流特性手段
B:不動作)。
ニは外部故障が除去直後B端子電流IB、C端子電流I
Cは零となり、A端子からの一端流入の形で、抑制電流
IR≒差動電流ID
(大電流特性手段A:不動作→不動作(動作時間
tOPA )、高感度小電流特性手段B:不動作→瞬間動作
(動作時間tOPB ))。In the current locus diagram at the time of external failure of FIG. 24, a is at load current (large current characteristic means A: operation, high sensitivity small current characteristic means B:
Not working). B is the current transformer CT at the moment when the external failure occurs (1st wave)
Suppressing current IR when A is not causing DC saturation >>
Differential current ID (large current characteristic means A: operation → non-operation (recovery time t REA ), high sensitivity small current characteristic means B: non-operation). C is a state in which the differential current ID is increased compared to B during DC saturation (second wave, third wave, fourth wave) (large current characteristic means A: non-operation, high sensitivity small current characteristic means B: non-existence). motion). (D) Immediately after the external fault is removed, the B terminal current IB and the C terminal current I
C becomes zero, and the suppression current IR≈differential current ID (large current characteristic means A: non-operation → non-operation (operation time t OPA ), high sensitivity small current characteristic means B: Non-operation → instantaneous operation (operation time t OPB ).
【0008】[0008]
【発明が解決しようとする課題】従来の電流差動保護継
電装置は以上のように構成されているので、外部故障で
一端のみの変流器が直流飽和した状態で、外部故障の除
去時に、当該変流器の二次側に過渡的に残留電流を発生
し、リレーからみると一端流入の内部故障と見なして電
流差動保護継電装置が不要に動作するという課題があ
る。Since the conventional current differential protection relay device is constructed as described above, when the external fault is removed while the current transformer only at one end is saturated with direct current due to the external fault. However, there is a problem that a residual current is transiently generated on the secondary side of the current transformer, which is regarded as an internal failure of one end inflow when viewed from the relay, and the current differential protection relay device operates unnecessarily.
【0009】この課題を解決する方法の一つとして例え
ば特公平1−24012号公報に記載された方法が提案
されているが、これは常時記憶された一定時間過去の大
きな抑制電流を用いる方法であるので、大きな抑制電流
の外部故障から抑制電流の小さい内部故障へ移行した場
合、過去の大きな抑制電流が現在値に切り替わるまで、
リレーが動作できない、即ち動作時間が遅れる等の課題
があった。As a method of solving this problem, for example, a method disclosed in Japanese Patent Publication No. 1-24012 has been proposed, which is a method of using a large suppression current that is always stored for a certain period of time in the past. Therefore, when an external fault with a large suppression current shifts to an internal fault with a small suppression current, until a large suppression current in the past switches to the current value,
There is a problem that the relay cannot operate, that is, the operation time is delayed.
【0010】この発明は上記のような課題を解決するた
めになされたもので、外部故障除去時に不要動作しない
高信頼度の電流差動保護継電装置を得ることを目的とす
る。The present invention has been made to solve the above problems, and an object thereof is to obtain a highly reliable current differential protection relay device which does not perform unnecessary operation when an external fault is removed.
【0011】[0011]
【課題を解決するための手段】請求項1記載の発明に係
る電流差動保護継電装置は、電力系統の各端子電流を同
期してサンプリングしディジタルデータを導出するAD
変換手段と、前記各端子のディジタルデータから差動電
流を導出する差動電流導出手段と、前記各端子のディジ
タルデータから抑制電流を導出する抑制電流導出手段
と、前記差動電流及び抑制電流を演算して所定の特性を
得る大電流特性手段と高感度小電流特性手段及び低感度
小電流特性手段と、大電流特性手段出力と低感度小電流
特性手段出力の第2の論理積出力手段と、前記大電流特
性手段出力と高感度小電流特性手段出力の第1の論理積
出力手段と、前記第1の論理積出力手段の出力で付勢さ
れる第1のタイマーとを備え、第1の出力手段は前記第
2の論理積出力手段の出力または前記第1のタイマーの
出力の論理和出力で出力するものである。According to a first aspect of the present invention, there is provided an AD circuit for sampling digitally data by synchronously sampling each terminal current of a power system.
Conversion means, differential current deriving means for deriving a differential current from the digital data of the terminals, suppression current deriving means for deriving a suppression current from the digital data of the terminals, and the differential current and the suppression current Large current characteristic means, high sensitivity small current characteristic means, low sensitivity small current characteristic means , large current characteristic means output and low sensitivity small current
Second AND output means for outputting the characteristic means, and the large current characteristic means
First logical product of the output of the active means and the output of the sensitive high-current characteristic means
Energized by the output means and the output of the first AND output means.
And a first timer, wherein the first output means is
The output of the logical product output means of 2 or the first timer
The output is a logical sum output .
【0012】請求項2記載の発明に係る電流差動保護継
電装置は、電力系統の各端子電流を同期してサンプリン
グしディジタルデータを導出するAD変換手段と、前記
各端子のディジタルデータから差動電流を導出する差動
電流導出手段と、前記各端子のディジタルデータから抑
制電流を導出する抑制電流導出手段と、前記差動電流及
び抑制電流を演算して所定の特性を得る大電流特性手段
と高感度小電流特性手段及び低感度小電流特性手段と、
大電流特性手段出力と低感度小電流特性手段出力の第2
の論理積出力手段と、前記大電流特性手段出力で付勢さ
れる第2のタイマーと、この第2のタイマーの出力と高
感度小電流特性手段出力の第3の論理積出力手段とを備
え、第2の出力手段は前記第2の論理積出力手段または
前記第3の論理積出力手段の論理和出力で出力するもの
である。According to a second aspect of the present invention, there is provided a current differential protection relay device, wherein AD converter means for sampling digitally the digital data by synchronously sampling the current at each terminal of the power system, and the difference from the digital data at each terminal. A differential current deriving means for deriving a dynamic current, a suppression current deriving means for deriving a suppression current from digital data of the terminals, and a large current characteristic means for calculating the differential current and the suppression current to obtain a predetermined characteristic. And a high sensitivity small current characteristic means and a low sensitivity small current characteristic means ,
Second output of high current characteristic means output and low sensitivity small current characteristic means output
Of the logical product output means and the output of the large current characteristic means
The second timer that is used and the output and high of this second timer.
A third logical product output means for outputting the sensitivity small current characteristic means is provided.
The second output means is the second AND output means or
The third logical product output means outputs the logical sum .
【0013】[0013]
【発明の実施の形態】以下、この発明の実施の一形態を
説明する。
実施の形態1.
図1はこの発明の実施の形態1による電流差動保護継電
装置のブロック図、図2はその装置の動作特性図、図3
および図4はタイムチャートを示す。BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below. Embodiment 1. 1 is a block diagram of a current differential protection relay device according to a first embodiment of the present invention, FIG. 2 is an operation characteristic diagram of the device, and FIG.
And FIG. 4 shows a time chart.
【0014】
図1において、Lは被保護送電線、CTA
は被保護送電線Lに流れる電流を検出する変流器、AD
はアナログ/ディジタル変換手段(AD変換手段)、T
Rは伝送手段、IAは端子電流、IB、ICは他端子電
流である。 In FIG . 1, L is a protected transmission line, CTA.
Is a current transformer that detects the current flowing through the protected transmission line L, AD
Is an analog / digital conversion means (AD conversion means), T
R is a transmission means, IA is a terminal current, and IB and IC are other terminal currents.
【0015】
DIFは前記の演算式(1)で差動電流I
Dを導出する差動電流導出手段、RESは前記の演算式
(2)で抑制電流IRを導出する抑制電流導出手段、A
は差動電流ID、抑制電流IRを導入して大電流域の特
性演算を行う大電流特性手段、Bは同様に差動電流I
D、抑制電流IRを導入して小電流域の特性演算を行う
高感度小電流特性手段、ATは伝送手段TRに接続され
た送受信機、Cは演算式|ID|≧KOC、但しKOA
<KOB<KOCで動作、不動作を判別する低感度小電
流特性手段である。ここで、KOCは直線CのID 軸上
の切片であり、このKOCは外部故障除去時の電流軌跡
における最大差動電流の大きさに余裕を加えた値に設定
する。すなわち低感度小電流特性は外部故障除去時に不
要動作しない。 [0015] DIF differential in the arithmetic expression (1) the current I
A differential current deriving means for deriving D, RES is a suppressing current deriving means for deriving the suppressing current IR by the arithmetic expression (2), A
Is a large current characteristic means for performing characteristic calculation in a large current region by introducing the differential current ID and the suppression current IR, and B is also the differential current I.
D, a high-sensitivity small current characteristic means for introducing characteristic of the suppression current IR to perform characteristic calculation in a small current region, AT is a transceiver connected to the transmission means TR, C is an arithmetic expression | ID | ≧ KOC, where KOA
<KOB <KOC is a low-sensitivity small-current characteristic means for discriminating between operation and non-operation. Here, KOC is an intercept of the straight line C on the I D axis, and this KOC is set to a value obtained by adding a margin to the magnitude of the maximum differential current in the current locus when the external fault is removed. That is, the low-sensitivity small-current characteristic does not operate unnecessarily when the external fault is removed.
【0016】
AN2は論理積手段、T1はタイマー手段
で例えば40ms程度(50HZで2サイクル、電気角
30°周期サンプリングで24サンプリング程度)、O
Rは論理和手段である。ここで、論理積手段AN1、A
N2、タイマー手段T1、論理和手段ORは第1の出力
手段Iを構成している。なお、タイマー手段T1の動作
時間は外部故障除去時の過渡的残留電流によるリレー誤
動作出力継続時間に余裕時間を加えた値に設定されてい
る。 [0016] AN2 logical product means, T1 is for example, about 40ms and timer means (approximately 24 samples in two cycles, the electrical angle 30 ° period sampled at 50HZ), O
R is a logical sum means. Here, the logical product means AN1, A
The N2, the timer means T1, and the logical sum means OR form a first output means I. The operating time of the timer means T1 is set to a value obtained by adding a margin time to the relay malfunction output continuation time due to the transient residual current when the external fault is removed.
【0017】
次に動作について説明する。
(1)外部故障除去時の動作
図3に示すように外部故障FO除去時は、電流軌跡イロ
ハニイが大電流特性手段Aの動作域かつ高感度小電流特
性手段Bの動作域に入り、論理積手段AN1から瞬間出
力があるが、タイマー手段T1が動作するまでの時間内
に出力が消えるので、タイマー手段T1が付勢されず論
理和手段ORからリレー出力されることはない。この
時、電流軌跡イロハニイは低感度小電流特性手段Cの動
作域を通過することはないので、論理積手段AN2から
も出力はない。従って、外部故障除去時に論理和手段O
Rから不要に出力することはなく、リレーは不要動作す
ることはない。 [0017] Next, the operation will be described. (1) Operation when removing external fault As shown in FIG. 3, when removing external fault FO, the current locus Irohanii enters the operating range of the large current characteristic unit A and the operating range of the high sensitivity small current characteristic unit B, and the logical product is obtained. There is an instantaneous output from the means AN1, but since the output disappears within the time until the timer means T1 operates, the timer means T1 is not energized and is not relayed from the OR means OR. At this time, the current locus Elohanii does not pass through the operating range of the low sensitivity small current characteristic means C, so that there is no output from the logical product means AN2. Therefore, when removing the external fault, the logical sum means O
There is no unnecessary output from R, and the relay does not operate unnecessarily.
【0018】
(2)負荷電流から内部故障FI1時
次に健全時、負荷電流から高感度小電流特性手段Bの動
作域内に内部故障FI1が発生した時の動作を、図4の
タイムチャートについて説明する。通常の負荷電流時で
は大電流特性手段Aは動作、内部故障FI1時も大電流
特性手段Aは動作のままで、高感度小電流特性手段Bが
動作次第、論理積手段AN1が出力し、タイマー手段T
1の動作時間後に論理和手段ORからリレー出力する。
即ちリレーの動作時間は高感度小電流特性手段Bの動作
時間tOPB +T1である。一方、内部故障FI1時、低
感度小電流特性手段Cは不動作で論理積手段AN2から
は出力なしである。 [0018] (2) then during normal state at internal faults FI1 from the load current, the operation when the internal fault FI1 occurs from the load current operation region of the sensitive low-current characteristic unit B, and the time chart of FIG. 4 described To do. The large current characteristic means A operates at the time of a normal load current, the large current characteristic means A remains operated even at the time of the internal failure FI1, and as soon as the high sensitivity small current characteristic means B operates, the logical product means AN1 outputs and the timer Means T
After the operation time of 1, the logical sum means OR outputs a relay.
That is, the operating time of the relay is the operating time t OPB + T1 of the high sensitivity small current characteristic means B. On the other hand, at the time of the internal failure FI1, the low-sensitivity small-current characteristic means C does not operate and the logical product means AN2 does not output.
【0019】
以上のように、この実施の形態1によれ
ば、外部故障除去時に不要動作する恐れのある高感度小
電流特性手段と大電流特性手段の論理積にタイマー手段
を付加したことにより、外部故障除去時に不要動作する
ことを確実に防止できる。 As described above, according to the first embodiment, the timer means is added to the logical product of the high-sensitivity small current characteristic means and the large current characteristic means which may cause an unnecessary operation when the external fault is removed. It is possible to reliably prevent unnecessary operation when removing an external failure.
【0020】
実施の形態2.
図5はこの発明の実施の形態2による電流差動保護継電
装置のブロック図を示すもので、前記実施の形態1を示
す図1と同様の構成において、大電流特性手段Aの出力
をタイマー手段T2に供給し、このタイマー手段T2の
出力と高感度小電流特性手段Bの出力を論理積手段AN
3に供給する構成である。ここで、論理積手段AN2、
AN3、タイマー手段T2、論理和手段ORは第2の出
力手段IIを構成している。なお、タイマー手段T2の動
作時間T2は外部故障除去時の過渡的残留電流によるリ
レー誤動作出力継続時間に余裕時間を加えた値、例えば
40ms程度に設定されている。図6は図5の装置のタ
イムチャートを示す。 [0020] Embodiment 2. FIG. 5 is a block diagram of a current differential protection relay device according to a second embodiment of the present invention. In the same configuration as that of FIG. 1 showing the first embodiment, the output of the large current characteristic means A is controlled by a timer. It is supplied to the means T2, and the output of the timer means T2 and the output of the high-sensitivity small current characteristic means B are logical product means AN.
3 is a configuration for supplying the same to the No. 3. Here, the logical product means AN2,
The AN3, the timer means T2 and the OR means OR form a second output means II. The operating time T2 of the timer means T2 is set to a value obtained by adding a margin time to the relay malfunction output continuation time due to the transient residual current when the external fault is removed, for example, about 40 ms. FIG. 6 shows a time chart of the device of FIG.
【0021】
次に動作について説明する。
(1)外部故障除去時
図6に示すように、外部故障除去時は、電流軌跡イロハ
ニイが大電流特性手段Aの動作域かつ高感度小電流特性
手段Bの動作域に入るが、タイマー手段T2の動作時間
T2内に高感度小電流特性手段Bの出力が消えるので、
タイマー手段T2は出力するが論理積手段AN3から出
力されることはない。この時、電流軌跡は低感度小電流
特性手段Cの動作域を通過することはないので、論理積
手段AN2からも出力はない。従って、外部故障除去時
に論理和手段ORから不要に出力されることはない。 [0021] Next, the operation will be described. (1) When removing an external fault As shown in FIG. 6, when removing an external fault, the current locus Irohanii enters the operating range of the large current characteristic means A and the sensitive small current characteristic means B, but the timer means T2. Since the output of the high-sensitivity small current characteristic means B disappears within the operating time T2 of
The timer means T2 outputs, but the AND means AN3 does not output. At this time, the current locus does not pass through the operating range of the low sensitivity small current characteristic means C, so that there is no output from the AND means AN2. Therefore, there is no unnecessary output from the OR gate OR when removing an external fault.
【0022】
(2)負荷電流から内部故障FI1時
次に健全時、負荷電流から高感度小電流特性手段Bの動
作域内に内部故障FI1が発生する時の動作を説明す
る。通常の負荷電流時では大電流特性手段Aは動作で、
内部故障FI1時も大電流特性手段Aは動作のまま、即
ちタイマー手段T2は出力中で高感度小電流特性手段B
の動作後直ちに論理積手段AN3を付勢し論理和手段O
Rから出力する。実施の形態1では負荷電流からの内部
故障FI1点でT1時間の動作時間遅れがあったが、実
施の形態2では、負荷電流入力で大電流特性手段Aは動
作中のため、タイマー手段T2の遅れがない点が異な
る。一方、内部故障FI1時は低感度小電流特性手段C
は不動作で論理積手段AN2からは出力なしである。 [0022] (2) then during normal state at internal faults FI1 from the load current, the operation of when the internal fault FI1 is generated from the load current operation region of the sensitive low-current characteristic means B. At a normal load current, the large current characteristic means A operates,
The large current characteristic means A remains in operation even during the internal failure FI1, that is, the timer means T2 is outputting and the high sensitivity small current characteristic means B is in operation.
Immediately after the operation of
Output from R. In the first embodiment, there is an operating time delay of T1 time at the internal fault FI1 point from the load current, but in the second embodiment, since the large current characteristic means A is operating at the load current input, the timer means T2 has a delay. The difference is that there is no delay. On the other hand, at the time of internal failure FI1, low sensitivity small current characteristic means C
Is inoperative and no output is made from the AND means AN2.
【0023】
以上のように、この実施の形態2によれ
ば、大電流特性手段の出力にタイマー手段を付加したこ
とにより、外部故障除去時に不要動作することがなく、
しかも、内部故障時、動作時間遅れのない高信頼度の電
流差動保護継電装置が得られる。 As described above, according to the second embodiment, since the timer means is added to the output of the large current characteristic means, unnecessary operation does not occur at the time of removing an external fault.
Moreover, it is possible to obtain a highly reliable current differential protection relay device with no operation time delay when an internal failure occurs.
【0024】参考例1.
図7はこの参考例1による電流差動保護継電装置のブロ
ック図を示すもので、図において、N1は論理否定手
段、T3はタイマー手段で例えば40ms程度、G1、
G2はゲート手段、TBLは各サンプリング時間の抑制
電流IRが格納されたデータメモリであり、論理積手段
AN1は第3の出力手段III を構成している。 Reference Example 1.
Figure 7 is thisReference example 1Current differential protection relay device
Figure 1 shows a logical diagram, where N1 is a logical negation
Steps, T3 are timer means, for example, about 40 ms, G1,
G2 is gate means, TBL is suppression of each sampling time
A data memory in which the current IR is stored, and a logical product means
AN1 constitutes the third output means III.
【0025】
上記タイマー手段T3が出力したら抑制電
流IRを現在値から一定時間過去のサンプリング値へ切
り替える。この一定時間としては外部故障除去時の過渡
残留電流の継続時間に余裕を加えた時間、例えば24サ
ンプリング時間(2サイクル)に設定する。またタイマ
ー手段T3の設定値は外部故障継続時間より短い値、即
ちリレーの動作時間に遮断器の動作時間を加えた時間か
ら余裕時間を差し引いた値である。なお、他の構成は前
記実施の形態1を示す図1の構成と同じであるから、同
一部分には同一符号を付して重複説明を省略する。図8
は図7の装置のタイムチャート、図9は電流軌跡図であ
る。 When the timer means T3 outputs, the suppression current IR is switched from the present value to the sampling value past a certain time. This fixed time is set to a time obtained by adding a margin to the duration of the transient residual current when removing the external fault, for example, 24 sampling times (2 cycles). The set value of the timer means T3 is a value shorter than the external failure continuation time, that is, a value obtained by subtracting the margin time from the operation time of the relay plus the operation time of the circuit breaker. Since the other structures are the same as the structures shown in FIG. 1 showing the first embodiment, the same parts are designated by the same reference numerals and the duplicate description thereof will be omitted. Figure 8
Is a time chart of the device of FIG. 7, and FIG. 9 is a current locus diagram.
【0026】
次に動作について説明する。
(1)外部故障除去時
外部故障発生で大電流特性手段Aが復帰後、タイマー手
段T3の動作時間経過後、即ち外部故障除去前に抑制電
流をデータメモリTBLに格納された24サンプリング
過去値(nサンプリング過去値)IR−24の抑制電流
を使用するようにゲートG1、G2で切り替える。外部
故障除去後も24サンプリング時間(2サイクル)は大
きな抑制電流なので、大電流特性手段Aは外部故障除去
後約24サンプリング時間遅れて動作となる。また除去
後24サンプリング時間は大きな抑制電流なので、過渡
残留電流に対しても高感度小電流特性手段Bは動作する
ことなく、論理積手段AN1は出力しない。 [0026] Next, the operation will be described. (1) At the time of removing an external fault After the large current characteristic means A returns due to the occurrence of an external fault, and after the operating time of the timer means T3 elapses, that is, before removing the external fault, the suppression current is stored in the data memory TBL as the 24 sampling past value ( (n-sampling past value) Switching is performed by the gates G1 and G2 to use the suppression current of IR-24. Even after the external fault is removed, the 24 sampling time (2 cycles) is a large suppression current. Therefore, the large current characteristic means A operates with a delay of about 24 sampling time after the external fault is removed. Further, since the 24 sampling time after removal is a large suppression current, the high-sensitivity small current characteristic means B does not operate and the logical product means AN1 does not output even with respect to the transient residual current.
【0027】
また、図9の電流軌跡図において、
イは負荷電流状態
(大電流特性手段A:動作、高感度小電流特性手段B:
不動作)、
ロは外部故障が発生の瞬間(第1波)で未だ変流器CT
Aが直流飽和を起こしていない状態で差動電流IDは小
さい
(大電流特性手段A:動作→不動作(復帰時間
tREA )、高感度小電流特性手段B:不動作)、
ハは直流飽和中(第2波,第3波,第4波)でロに比べ
て差動電流IDが増加した状態、この時タイマー手段T
3が動作し抑制電流IRの24サンプリング過去値IR
−24に切り替え
(大電流特性手段A:不動作、高感度小電流特性手段
B:不動作)、
ホは外部故障除去後24サンプリング時間経過、残留電
流による差動電流IDが減衰した状態
(大電流特性手段A:不動作、高感度小電流特性手段
B:不動作)。 In the current locus diagram of FIG. 9, a is a load current state (large current characteristic means A: operation, high sensitivity small current characteristic means B:
(No operation), b is still current transformer CT at the moment of external failure (first wave)
The differential current ID is small when A does not cause DC saturation (large current characteristic means A: operation → non-operation (recovery time t REA ), high sensitivity small current characteristic means B: non-operation), and C is DC saturation. In the middle (the second wave, the third wave, the fourth wave), the state in which the differential current ID is increased as compared with B, at this time, the timer means T
3 operates and the past sampling value IR of the suppression current IR is 24
Switched to -24 (large current characteristic means A: non-operation, high-sensitivity small current characteristic means B: non-operation), (e) 24 sampling time has passed after elimination of external fault, differential current ID attenuated by residual current (large Current characteristic means A: non-operation, high sensitivity small current characteristic means B: non-operation).
【0028】
(2)負荷電流から内部故障FI1時
次に負荷電流から高感度小電流特性手段Bの動作域内に
おける内部故障FI1発生時の動作を説明する。通常の
負荷電流時では、大電流特性手段Aは内部故障FI1時
も動作のまま、タイマー手段T3は起動されることはな
い。従って、抑制電流IRは現在値を使用した演算で高
感度小電流特性手段Bが動作して論理積手段AN1が出
力する。 [0028] (2) explaining the operation in the internal fault FI1 generated at the internal fault FI1 from the load current then from the load current in the operation region of high sensitivity low current characteristic means B. At a normal load current, the large current characteristic means A remains in operation even during the internal failure FI1, and the timer means T3 is not activated. Therefore, the suppression current IR is calculated by using the present value, and the high-sensitivity small current characteristic means B operates to be output from the AND means AN1.
【0029】
以上のように、この参考例1によれば、大
電流特性手段の不動作が一定時間以上継続したら、抑制
電流を24サンプリング過去値とすることにより、外部
故障除去時に不要動作する恐れのない、高信頼度の電流
差動保護継電装置が得られる。 As described above, according to the first reference example , if the large current characteristic means is inoperative for a certain period of time or longer, the suppression current is set to the past sampling value of 24 sampling, which may cause an unnecessary operation when the external fault is removed. A high-reliability current differential protection relay device is obtained.
【0030】参考例2
.
図10はこの参考例2による電流差動保護継電装置のブ
ロック図を示すもので、抑制電流導出手段RES内に予
め24サンプリング過去値IR−24を記憶しておくデ
ータメモリTBLと、抑制電流IRの現在値と24サン
プリング過去値IR−24の平均値を導出する平均値導
出手段AVEを設けたもので、論理積手段AN1が第4
の出力手段IVを構成している。他の構成は前記参考例1
を示す図7の構成と同じであるから同一部分には同一符
号を付して重複説明を省略する。 Reference Example 2 FIG. 10 is a block diagram of the current differential protection relay device according to the second reference example, in which the suppression current deriving means RES stores a 24 sampling past value IR-24 in advance, and a suppression current. Mean value deriving means AVE for deriving an average value of the current IR value and the 24-sampling past value IR-24 is provided, and the logical product means AN1 is the fourth.
It constitutes the output means IV of. Other configurations are the same as in Reference Example 1 above.
7 has the same configuration as that of FIG.
【0031】
次に動作について説明する。
(1)外部故障除去時
外部故障発生で大電流特性手段Aが復帰後、タイマー手
段T3の動作時間後、即ち外部故障除去前に抑制電流I
RをデータメモリTBLに格納された24サンプリング
過去値IR−24の抑制電流IRと現在値の平均を演算
するようにゲートG1、G2で切り替えるもので、外部
故障除去後も24サンプリング時間(2サイクル)は大
きな抑制電流IRなので、大電流特性手段Aは除去後約
24サンプリング時間遅れで動作となる。また除去後2
4サンプリング時間は大きな抑制電流IRなので、高感
度小電流特性手段Bは動作することはなく、論理積手段
AN1は出力しない。 [0031] Next, the operation will be described. (1) At the time of removing an external fault After the large current characteristic means A returns due to the occurrence of an external fault, after the operating time of the timer means T3, that is, before removing the external fault, the suppression current I
R is switched by the gates G1 and G2 so as to calculate the average of the suppression current IR of the 24-sampling past value IR-24 stored in the data memory TBL and the present value, and the 24-sampling time (2 cycles ) Is a large suppression current IR, the large current characteristic means A is operated with a delay of about 24 sampling time after the removal. After removal 2
Since the 4-sampling time is a large suppression current IR, the high-sensitivity small-current characteristic means B does not operate, and the logical product means AN1 does not output.
【0032】
また図11の電流軌跡図において、
イは負荷電流状態
(大電流特性手段A:動作、高感度小電流特性手段B:
不動作)、
ロは外部故障が発生の瞬間(第1波)で未だ変流器CT
Aが直流飽和を起こしていない状態で抑制電流IR》差
動電流ID
(大電流特性手段A:動作→不動作(復帰時間
tREA )、高感度小電流特性手段B:不動作)、
ハは直流飽和中(第2波,第3波,第4波)でロに比べ
て差動電流IDが増加した状態、この時タイマー手段T
3が動作し抑制電流IRを24サンプリング過去値IR
−24と現在値の平均値に切り替え
(大電流特性手段A:不動作、高感度小電流特性手段
B:不動作)、
ホは故障除去後24サンプリング時間経過、この間に残
留電流による差動電流IDが減衰した状態
(大電流特性手段A:不動作、高感度小電流特性手段
B:不動作)。 In the current locus diagram of FIG. 11, a is a load current state (large current characteristic means A: operation, high sensitivity small current characteristic means B:
(No operation), b is still current transformer CT at the moment of external failure (first wave)
Suppressing current IR when A does not cause DC saturation >> Differential current ID (Large current characteristic means A: operation → inoperative (recovery time t REA ), high sensitivity small current characteristic means B: inoperative), During DC saturation (the second wave, the third wave, the fourth wave), the state in which the differential current ID is increased as compared with B, at this time, the timer means T
3 operates and the suppression current IR is 24 sampling past value IR
-24 and the average value of the present value are switched (large current characteristic means A: non-operation, high-sensitivity small current characteristic means B: non-operation), e is 24 sampling time after failure elimination, during which differential current due to residual current ID is attenuated (large current characteristic means A: non-operation, high sensitivity small current characteristic means B: non-operation).
【0033】
以上のように、この参考例2によれば、2
4サンプリング過去値と現在値の平均値を使用すること
により、前記参考例1に比べて抑制電流が1/2と小さ
く内部故障時、差動電流が大きい場合はホの抑制電流で
も動作可能で、動作時間遅れなしで動作可能である。 As described above, according to this reference example 2 ,
By using the average value of the past sampling value and the current value of 4 sampling, the suppression current is as small as 1/2 compared to the reference example 1 , and when the internal failure occurs, when the differential current is large, it is possible to operate even with the suppression current of E. It is possible to operate without delay in operating time.
【0034】参考例3
.
図12はこの参考例3による電流差動保護継電装置のブ
ロック図を示すもので、図において、IN1は第5の出
力手段Vを構成するインヒビット論理手段、T3はタイ
マー手段、T4は復帰タイマー手段であり、この復帰タ
イマー手段T4の動作時間は外部故障除去時の過渡的残
留電流によるリレー誤動作出力継続時間に余裕時間を加
えた値、例えば40ms程度に設定している。図13は
図12の装置の動作を示すタイムチャートである。 Reference Example 3 FIG. 12 is a block diagram of a current differential protection relay device according to the third reference example . In the figure, IN1 is an inhibit logic means that constitutes a fifth output means V, T3 is a timer means, and T4 is a return timer. The operation time of the recovery timer means T4 is set to a value obtained by adding a margin time to the relay malfunction output continuation time due to the transient residual current when the external fault is removed, for example, about 40 ms. FIG. 13 is a time chart showing the operation of the apparatus shown in FIG.
【0035】
次に動作について説明する。
(1)外部故障除去時
外部故障発生で大電流特性手段Aが復帰後タイマー手段
T3の動作時間後、即ち外部故障除去前にインヒビット
論理手段IN1を復帰タイマー手段T4の復帰時間T4
だけロックする。 [0035] Next, the operation will be described. (1) When removing an external fault After the large current characteristic means A recovers due to the occurrence of an external fault, the inhibit logic means IN1 is restored after the operating time of the timer means T3, that is, before the external fault is removed, the reset time T4 of the timer means T4.
Just lock.
【0036】
外部故障除去後、残留電流による差動電流
IDにより、高感度小電流特性手段Bは瞬間動作する
が、大電流特性手段Aの動作で復帰タイマー手段T4の
復帰時間T4のロック出力が延長されているため、イン
ヒビット論理手段IN1からの出力はない。 [0036] After the external fault clearing, the differential current ID due to the residual current, operates instantaneously sensitive small-current characteristic means B, the lock output of the return time T4 of the return timer means T4 in operation of large current characteristics means A is Since it has been extended, there is no output from the inhibit logic means IN1.
【0037】
(2)負荷電流から内部故障FI1時
次に負荷電流から高感度小電流特性手段Bの動作域内の
内部故障FI1発生時の動作を説明する。通常の負荷電
流時では、大電流特性手段Aは動作で、内部故障FI1
時も大電流特性手段Aは動作のまま、タイマー手段T3
は起動されることはない。従って、高感度小電流特性手
段Bの動作後、瞬時にインヒビット論理手段IN1が出
力する。 [0037] (2) explaining the operation of the internal fault FI1 upon the occurrence of the operation region from the next load current at the internal fault FI1 from the load current sensitive small-current characteristic means B. At the time of normal load current, the large current characteristic means A is in operation and the internal failure FI1
Even when the large current characteristic means A is still operating, the timer means T3
Will never be activated. Therefore, the inhibit logic means IN1 outputs instantaneously after the operation of the high sensitivity small current characteristic means B.
【0038】
以上のように、この参考例3によれば、大
電流特性手段の不動作が一定時間以上継続したら出力手
段を復帰タイマー手段の復帰時間だけロックすることに
より、外部故障除去時に不要動作する恐れのない、高信
頼度の電流差動保護継電装置が得られる。 As described above, according to this reference example 3 , when the large current characteristic means has been inoperative for a certain period of time or more, the output means is locked for the return time of the return timer means, thereby eliminating unnecessary operation when the external failure is eliminated. It is possible to obtain a highly reliable current differential protection relay device that does not have the risk of
【0039】参考例4
.
図14はこの参考例4による電流差動保護継電装置のブ
ロック図を示すもので、図において、IN2はタイマー
手段T3の出力と低感度小電流特性手段Cの出力を入力
するインヒビット論理手段であり、このインヒビット論
理手段IN2は外部故障除去時不要動作対策手段を構成
している。なお、他の構成は前記参考例1を示す図7の
構成と同じであるから、同一部分には同一符号を付して
重複説明を省略する。 Reference Example 4 FIG. 14 is a block diagram of a current differential protection relay device according to this reference example 4. In the figure, IN2 is an inhibit logic means for inputting the output of the timer means T3 and the output of the low sensitivity small current characteristic means C. This inhibit logic means IN2 constitutes means for preventing unnecessary operation when removing an external fault. Since the other configurations are the same as the configurations of FIG. 7 showing the reference example 1 , the same portions are denoted by the same reference numerals and the duplicate description thereof will be omitted.
【0040】
図15は外部故障から内部故障へ移行時の
系統図、図16はタイムチャート、図17は外部故障か
ら内部故障へ移行時の電流軌跡を示す図である。 FIG . 15 is a system diagram when shifting from an external fault to an internal fault, FIG. 16 is a time chart, and FIG. 17 is a diagram showing a current locus when shifting from an external fault to an internal fault.
【0041】
次に動作について説明する。
(1)外部故障除去時
図16の左側に示すように、外部故障FO発生時及び除
去時は低感度小電流特性手段Cの不動作で前記参考例1
と同じ動作となる。 [0041] Next, the operation will be described. (1) When removing an external fault As shown on the left side of FIG. 16, when the external fault FO is generated and when an external fault is removed, the low-sensitivity small current characteristic means C does not operate and the reference example 1 is used.
Same operation as.
【0042】
(2)外部故障から内部故障時
図16の右側において、内部故障FI2が発生直後は、
抑制電流IRは24サンプリング過去値IR−24で、
大電流特性手段A、高感度小電流特性手段Bが共に不動
作であるが(図17のへの部分)、差動電流IDが低感
度小電流特性手段Cの設定値KOC(図2参照)より大
きい場合は低感度小電流特性手段Cが動作し、インヒビ
ット論理手段IN1の出力を復帰させ、ゲート手段G2
を切り、ゲート手段G1を入りとして抑制電流IRを2
4サンプリング過去値IR−24から現在値へ戻す。 [0042] (2) the right side of the internal fault during 16 externally failure, an internal mechanical failure FI2 is immediately generated,
The suppression current IR is 24 sampling past value IR-24,
Both the large current characteristic means A and the high sensitivity small current characteristic means B are inoperative (portion in FIG. 17), but the differential current ID is the set value KOC of the low sensitivity small current characteristic means C (see FIG. 2). If larger, the low-sensitivity small-current characteristic means C operates to restore the output of the inhibit logic means IN1, and the gate means G2.
Is turned off, and the suppression current IR is set to 2 by turning on the gate means G1.
4 Return from past sampling value IR-24 to current value.
【0043】
これにより大電流特性手段A、高感度小電
流特性手段Bが共に動作して(図17のトの部分)論理
積手段AN1から出力する。即ちこの参考例4では、例
えば内部故障発生後、低感度小電流特性手段Cの動作時
間(10ms)+高感度小電流特性手段Bの動作時間
(10ms)で出力を得ることができる。 [0043] Thus outputs from the (g portion in FIG. 17) logical product means AN1 large current characteristics means A, sensitive low current characteristic means B are both running. That is, in this reference example 4 , for example, after the occurrence of an internal failure, an output can be obtained within the operating time (10 ms) of the low sensitivity small current characteristic means C + the operating time (10 ms) of the high sensitivity small current characteristic means B.
【0044】
以上のように、この参考例4によれば、低
感度小電流特性手段の出力でタイマー手段T3の出力を
無効としてインヒビット論理手段を無効とすることによ
り、抑制電流を24サンプリング過去値から現在値へ戻
す。この結果、抑制電流の大きな外部故障から抑制電流
の小さい内部故障への移行時、最悪24サンプリング時
間(50HZベースで40ms)、動作時間が遅れる前
記実施の形態3、4の課題、およびひとたび外部故障を
検出するとロックし、内部故障へ移行後も復帰タイマー
の復帰時間40ms間ロックを継続するので、内部故障
移行時同様に40ms遅れるという前記参考例3の課題
を解決できるものである。 As described above, according to this reference example 4 , the output of the low-sensitivity small-current characteristic means invalidates the output of the timer means T3 to invalidate the inhibit logic means, thereby suppressing the suppression current by 24 sampling past values. To the current value. As a result, at the time of transition from an external fault with a large suppression current to an internal fault with a small suppression current, the worst 24 sampling time (40 ms on a 50HZ base), the operation time is delayed, and the external fault once. When the internal failure is detected, the recovery timer is locked, and the recovery timer continues to be locked for 40 ms after the internal failure is transferred. Therefore, it is possible to solve the problem of the third reference example in which the delay is 40 ms as in the internal failure transfer.
【0045】
なお、この参考例4を参考例1に適用した
場合について説明したが、参考例2 、3にも同様に適用
できる。 Although the case where the reference example 4 is applied to the reference example 1 has been described, the same can be applied to the reference examples 2 and 3 .
【0046】参考例5
.
図18はこの参考例5による電流差動保護継電装置のブ
ロック図を示すもので、図において、ACは差動電流中
の基本波に対する直流分含有率の比率が一定値以下(例
えば100%以下)を検出する基本波検出手段であり、
通常の故障電流中の直流分は基本波の100%以下に対
し外部故障時の残留電流中の直流分は100%以上であ
るので、基本波検出手段ACの検出感度は100%程度
に設定する。AN3は論理積手段、IN3は外部故障除
去時不要動作対策手段を構成するインヒビット論理手段
であり、他の構成は前記参考例4を示す図14の構成と
同じであるから同一部分には同一符号を付して重複説明
を省略する。図19は図18の装置の動作を説明するタ
イムチャートである。 Reference Example 5 FIG. 18 is a block diagram of a current differential protection relay device according to this reference example 5. In the figure, AC is the ratio of the direct current content ratio to the fundamental wave in the differential current to a certain value or less (for example, 100%). The following is a fundamental wave detection means for detecting
Since the DC component in the normal fault current is 100% or less of the fundamental wave, and the DC component in the residual current at the time of an external fault is 100% or more, the detection sensitivity of the fundamental wave detecting means AC is set to about 100%. . Logical product means AN3, IN3 is inhibit logic means constituting the unnecessary operation protective means during external fault clearing, like reference numerals from other parts of the configuration are the same as in FIG. 14 showing the reference example 4 Will be attached and redundant description will be omitted. FIG. 19 is a time chart explaining the operation of the apparatus of FIG.
【0047】
次に動作について説明する。
(1)外部故障除去時
図19の左側に示すように、外部故障FO発生時及び除
去時は、低感度小電流特性手段C、基本波検出手段AC
共に不動作で、前記参考例1と同じ動作となる。 [0047] Next, the operation will be described. (1) When removing an external fault As shown on the left side of FIG. 19, when an external fault FO occurs and at the time of removing an external fault, the low-sensitivity small current characteristic means C and the fundamental wave detecting means AC
Both are inoperative, and the operation is the same as in Reference Example 1 .
【0048】
(2)外部故障から内部故障時
図19の右側において、内部故障FI2発生直後の抑制
電流IRは24サンプリング過去値IR−24で、大電
流特性手段A、高感度小電流特性手段Bが共に不動作で
あるが(図19のへの部分)、低感度小電流特性手段C
及び基本波検出手段ACが共に動作し論理積手段AN3
が出力し、インヒビット論理手段IN2の出力を復帰さ
せ、ゲート手段G2を切り、ゲート手段G1を入りとし
て、抑制電流IRを実施の形態6と同様に24サンプリ
ング過去値IR−24から現在値へ戻す。 [0048] (2) the right side of the internal fault during 19 externally failure, an internal fault FI2 suppressing current IR 24 sampling past values IR-24 immediately after the generation, the large current characteristics means A, sensitive low current characteristic means B Both are inoperative (portion in FIG. 19), but low sensitivity small current characteristic means C
And the fundamental wave detecting means AC operate together to perform AND operation means AN3.
Is output, the output of the inhibit logic means IN2 is restored, the gate means G2 is turned off, the gate means G1 is turned on, and the suppression current IR is returned from the 24 sampling past value IR-24 to the present value as in the sixth embodiment. .
【0049】
これにより、大電流特性手段A、高感度小
電流特性手段Bが共に動作して(図19のトの部分)論
理積手段AN1から出力する。即ち、この方法では例え
ば内部故障発生後、{小電流特性手段Cの動作時間(1
0ms)または基本波検出手段ACの動作時間(20m
s)の遅い方}+高感度小電流特性手段Bの動作時間
(10ms)で出力を得ることができる。 [0049] Accordingly, outputs from the (g portion in FIG. 19) logical product means AN1 large current characteristics means A, sensitive low current characteristic means B are both running. That is, in this method, for example, after the occurrence of an internal failure, {the operating time of the small current characteristic means C (1
0 ms) or the operating time of the fundamental wave detecting means AC (20 m
s) slower} + the output can be obtained in the operating time (10 ms) of the high-sensitivity small-current characteristic means B.
【0050】
以上のように、この参考例5によれば、前
記参考例4に比べ外部故障除去時不要動作対策解除を差
動電流の大きさのみでなく、更に直流分が一定値以下と
いう条件を加えることで、外部故障除去時との区別をよ
り確実なものとし、信頼性の向上を図るものである。 As described above, according to this reference example 5 , as compared with the above-mentioned reference example 4 , not only the magnitude of the differential current but also the direct current component is equal to or less than a certain value for canceling the unnecessary operation when removing the external fault. Is added, the distinction from the case of removing the external failure is made more reliable, and the reliability is improved.
【0051】
なお、上記の実施の形態1、2、参考例
1、2では電気角30°毎のサンプリング及び演算の場
合について記載したが、15°毎のサンプリング及び演
算でも同様に適用できる。 The above-mentioned first and second embodiments and reference examples
In 1 and 2 , the case of sampling and calculation at every electrical angle of 30 ° is described, but the same applies to sampling and calculation at every 15 °.
【0052】
また、比率差動演算は各端子電流の和電流
を抑制として用いる場合について記載したが、各端子電
流の最大値電流を用いる場合でも適用できる。さらに送
電線用電流差動継電装置への適用について記載したが、
変圧器保護差動継電装置、母線保護差動継電装置にも同
様に適用できる。 Further , the ratio differential calculation is described in the case where the sum current of each terminal current is used as the suppression, but it can be applied when the maximum value current of each terminal current is used. Furthermore, we have described the application to current differential relays for power transmission lines.
The same can be applied to the transformer protection differential relay and the bus protection differential relay.
【0053】[0053]
【発明の効果】以上のように、請求項1記載の発明によ
れば、外部故障除去時に不要動作する恐れのある高感度
小電流特性手段と大電流特性手段の論理積にタイマー手
段を付加するように構成したので、外部故障除去時も不
要動作しない高信頼度の電流差動保護継電装置が得られ
る効果がある。As described above, according to the first aspect of the invention, the timer means is added to the logical product of the high-sensitivity small current characteristic means and the large current characteristic means which may cause an unnecessary operation when the external fault is removed. With this configuration, there is an effect that a highly reliable current differential protection relay device that does not perform unnecessary operation even when an external failure is removed can be obtained.
【0054】
請求項2記載の発明によれば、大電流特性
手段の出力にタイマー手段を付加するように構成したの
で、外部故障除去時にも不要動作しない、しかも負荷電
流から内部故障時、動作時間遅れのない高信頼度の電流
差動保護継電装置が得られる効果がある。 [0054] According to the second aspect of the present invention, since it is configured to add a timer means to the output of the large current characteristics means, not unnecessary operation even when an external fault clearing, yet when the internal fault from the load current, operation time There is an effect that a highly reliable current differential protection relay device without delay can be obtained.
【図1】 この発明の実施の形態1による電流差動保護
継電装置を示すブロック図である。FIG. 1 is a block diagram showing a current differential protection relay device according to a first embodiment of the present invention.
【図2】 この発明の実施の形態1による電流差動保護
継電装置の動作特性図である。FIG. 2 is an operating characteristic diagram of the current differential protection relay device according to the first embodiment of the present invention.
【図3】 この発明の実施の形態1による動作タイムチ
ャートである。FIG. 3 is an operation time chart according to the first embodiment of the present invention.
【図4】 この発明の実施の形態1による内部故障発生
時の動作タイムチャートである。FIG. 4 is an operation time chart when an internal failure occurs according to the first embodiment of the present invention.
【図5】 この発明の実施の形態2による電流差動保護
継電装置のブロック図である。FIG. 5 is a block diagram of a current differential protection relay device according to a second embodiment of the present invention.
【図6】 この発明の実施の形態2による動作タイムチ
ャートである。FIG. 6 is an operation time chart according to the second embodiment of the present invention.
【図7】 この発明の参考例1による電流差動保護継電
装置のブロック図である。FIG. 7 is a block diagram of a current differential protection relay device according to a first reference example of the present invention.
【図8】 この発明の参考例1による動作タイムチャー
トである。FIG. 8 is an operation time chart according to Reference Example 1 of the present invention.
【図9】 この発明の参考例1の外部故障時の電流軌跡
図である。FIG. 9 is a current locus diagram at the time of an external failure of the reference example 1 of the present invention.
【図10】 この発明の参考例2による電流差動保護継
電装置のブロック図である。FIG. 10 is a block diagram of a current differential protection relay device according to a second reference example of the present invention.
【図11】 この発明の参考例2の外部故障時の電流軌
跡図である。FIG. 11 is a current locus diagram at the time of an external failure of reference example 2 of the present invention.
【図12】 この発明の参考例3による電流差動保護継
電装置のブロック図である。FIG. 12 is a block diagram of a current differential protection relay device according to a third reference example of the present invention.
【図13】 この発明の参考例3による動作タイムチャ
ートである。FIG. 13 is an operation time chart according to Reference Example 3 of the present invention.
【図14】 この発明の参考例4による電流差動保護継
電装置のブロック図である。FIG. 14 is a block diagram of a current differential protection relay device according to reference example 4 of the present invention.
【図15】 外部故障から内部故障へ移行時の系統電流
の分布を示す図である。FIG. 15 is a diagram showing a distribution of a system current at the time of transition from an external failure to an internal failure.
【図16】 この発明の参考例4による動作タイムチャ
ートである。FIG. 16 is an operation time chart according to Reference Example 4 of the present invention.
【図17】 外部故障から内部故障への移行時の電流軌
跡図である。FIG. 17 is a current locus diagram at the time of transition from an external failure to an internal failure.
【図18】 この発明の参考例5による電流差動保護継
電装置のブロック図である。FIG. 18 is a block diagram of a current differential protection relay device according to reference example 5 of the present invention.
【図19】 この発明の参考例5による動作タイムチャ
ートである。FIG. 19 is an operation time chart according to Reference Example 5 of the present invention.
【図20】 従来の電流差動保護継電装置のブロック図
である。FIG. 20 is a block diagram of a conventional current differential protection relay device.
【図21】 図20の電流差動保護継電装置の比率差動
特性図である。21 is a ratio differential characteristic diagram of the current differential protection relay device of FIG. 20. FIG.
【図22】 外部故障時の系統電流の分布を示す図であ
る。FIG. 22 is a diagram showing a distribution of system current in the event of an external failure.
【図23】 外部故障時の動作タイムチャートである。FIG. 23 is an operation time chart when an external failure occurs.
【図24】 外部故障時の電流軌跡図である。FIG. 24 is a current locus diagram at the time of an external failure.
AC 基本波検出手段、AD アナログ/ディジタル変
換手段(AD変換手段)、DIF 差動電流導出手段、
RES 抑制電流導出手段、TBL データメモリ、I
D 差動電流、IR 抑制電流、IR−24 24サン
プリング過去値(nサンプリング過去値)、A 大電流
特性手段、B 高感度小電流特性手段、C 低感度小電
流特性手段、IN2,IN3 インヒビット論理手段
(外部故障除去時不要動作対策手段)、T1,T2,T
3 タイマー手段、T4 復帰タイマー手段、I 第1
の出力手段、II 第2の出力手段、III 第3の出力手
段、IV 第4の出力手段、V 第5の出力手段。AC fundamental wave detecting means, AD analog / digital converting means (AD converting means), DIF differential current deriving means,
RES suppression current derivation means, TBL data memory, I
D differential current, IR suppression current, IR-24 24 sampling past value (n sampling past value), A large current characteristic means, B high sensitivity small current characteristic means, C low sensitivity small current characteristic means, IN2, IN3 inhibit logic Means (Measures against unnecessary operation when removing external failure), T1, T2, T
3 timer means, T4 recovery timer means, I first
Output means, II second output means, III third output means, IV fourth output means, V fifth output means.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平5−252645(JP,A) 特開 平8−116623(JP,A) 特公 平1−24012(JP,B2) 特公 昭61−22540(JP,B2) (58)調査した分野(Int.Cl.7,DB名) H02H 3/28 H02H 7/22 ─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-5-252645 (JP, A) JP-A-8-116623 (JP, A) JP-B 1-24012 (JP, B2) JP-B 61- 22540 (JP, B2) (58) Fields surveyed (Int.Cl. 7 , DB name) H02H 3/28 H02H 7/22
Claims (2)
リングしディジタルデータを導出するAD変換手段と、
前記各端子のディジタルデータから差動電流を導出する
差動電流導出手段と、前記各端子のディジタルデータか
ら抑制電流を導出する抑制電流導出手段と、前記差動電
流及び抑制電流を演算して所定の特性を得る大電流特性
手段と高感度小電流特性手段及び低感度小電流特性手段
と、大電流特性手段出力と低感度小電流特性手段出力の
第2の論理積出力手段と、前記大電流特性手段出力と高
感度小電流特性手段出力の第1の論理積出力手段と、前
記第1の論理積出力手段の出力で付勢される第1のタイ
マーと、前記第2の論理積出力手段の出力または前記第
1のタイマーの出力の論理和出力で出力する第1の出力
手段とを備えた電流差動保護継電装置。1. AD conversion means for sampling digitally data by synchronously sampling each terminal current of a power system,
Differential current deriving means for deriving a differential current from the digital data of the terminals, suppression current deriving means for deriving a suppression current from the digital data of the terminals, and calculating the differential current and the suppression current by a predetermined value. Of the high current characteristic means, the high sensitivity small current characteristic means, the low sensitivity small current characteristic means, the high current characteristic means output and the low sensitivity small current characteristic means output.
A second AND output means, a high current characteristic means output and a high
First AND output means for outputting the sensitivity small current characteristic means, and
The first tie activated by the output of the first logical product output means
And the output of the second AND output means or the first
1. A current differential protection relay device, comprising: a first output means for outputting a logical sum output of the outputs of the first timer .
リングしディジタルデータを導出するAD変換手段と、
前記各端子のディジタルデータから差動電流を導出する
差動電流導出手段と、前記各端子のディジタルデータか
ら抑制電流を導出する抑制電流導出手段と、前記差動電
流及び抑制電流を演算して所定の特性を得る大電流特性
手段と高感度小電流特性手段及び低感度小電流特性手段
と、大電流特性手段出力と低感度小電流特性手段出力の
第2の論理積出力手段と、前記大電流特性手段出力で付
勢される第2のタイマーと、この第2のタイマーの出力
と高感度小電流特性手段出力の第3の論理積出力手段
と、前記第2の論理積出力手段または第3の論理積出力
手段の論理和出力で出力する第2の出力手段とを備えた
電流差動保護継電装置。2. AD conversion means for sampling digitally data by synchronously sampling each terminal current of the power system,
Differential current deriving means for deriving a differential current from the digital data of the terminals, suppression current deriving means for deriving a suppression current from the digital data of the terminals, and calculating the differential current and the suppression current by a predetermined value. Of the high current characteristic means, the high sensitivity small current characteristic means, the low sensitivity small current characteristic means, the high current characteristic means output and the low sensitivity small current characteristic means output.
The second logical product output means and the output of the large current characteristic means are provided.
Activated second timer and output of this second timer
And a third logical product output means of high-sensitivity small current characteristic means output
And the second logical product output means or the third logical product output
Second differential output means for outputting the logical sum output of the means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23691996A JP3366531B2 (en) | 1996-09-06 | 1996-09-06 | Current differential protection relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23691996A JP3366531B2 (en) | 1996-09-06 | 1996-09-06 | Current differential protection relay |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1084625A JPH1084625A (en) | 1998-03-31 |
| JP3366531B2 true JP3366531B2 (en) | 2003-01-14 |
Family
ID=17007700
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23691996A Expired - Fee Related JP3366531B2 (en) | 1996-09-06 | 1996-09-06 | Current differential protection relay |
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| Country | Link |
|---|---|
| JP (1) | JP3366531B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5377178B2 (en) * | 2009-09-08 | 2013-12-25 | 株式会社東芝 | Current differential protection relay device |
| JP5664166B2 (en) * | 2010-11-22 | 2015-02-04 | 株式会社明電舎 | Current differential protection relay device |
| JP7408029B1 (en) * | 2023-01-31 | 2024-01-04 | 三菱電機株式会社 | Protection methods for zero-phase current differential relays and three-phase transformers |
-
1996
- 1996-09-06 JP JP23691996A patent/JP3366531B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1084625A (en) | 1998-03-31 |
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