JP3369124B2 - PHS communication method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PHS communication system, and more particularly to a PHS communication system capable of transmitting and receiving high speed and low speed data.

[0002]

2. Description of the Related Art Conventionally, in the PHS communication system,
32 kbps ADPC as a method of encoding the waveform
M (Adaptive Differential Pulse Code Modulation)
The scheme is used. ADPCM system is 64 kbp
Compared with PCM (Pulse Code Modulation) of s, there is an advantage that the bandwidth is half.

However, when analog signals of a high-speed modem are regarded as voice and converted into digital signals, there is a drawback that the quantization error becomes large. Therefore, the transmission of the analog signal from the terminal in the PHS communication is limited to the low speed modem.

[0004]

In recent years, due to the spread of the Internet, transmission and reception of data using a PHS communication line has been demanded, but in order to transmit and receive data on the Internet or the like, a high speed such as 28.8 kbps is required. The data needs to be modulated.

However, since the ADPCM system as described above is premised on the transmission of only low-speed data such as voice, AD of high-speed data such as the Internet is used.
When encoded using the PCM method, it is impossible to follow high-speed data changes such as on the Internet, and the quantization error is 20.
There is a problem in that the original analog waveform cannot be accurately restored because it reaches dB.

FIG. 8 is a diagram for explaining the encoding of low speed data and high speed data using the ADPCM system.
(A) is a figure which shows the waveform of high-speed data, such as the internet, (b) is a figure which shows the waveform of low-speed data, such as a voice.

As shown in FIG. 8, low-speed data such as voice has a smooth time characteristic graph, whereas high-speed data such as the Internet has multi-valued QAM (Quadrature Ampli).
tureModulation) To use a modem such as a modulation method,
It is a time characteristic graph with many sharp changes.

For example, in FIG. 8A, at point X, the signal suddenly changes in small steps. Since such a change is not assumed in the ADPCM system, when the data shown in FIG. 8A is encoded using the ADPCM system, a large quantization error occurs.

Therefore, the PH using the ADPCM method is used.
In the S communication method, it is conceivable that the time slots used for data transmission / reception are fixed to two, thereby enabling high-speed data transmission / reception.
In that case, two time slots are used even when voice and low-speed data are transmitted and received, and there is a problem that the radio band and equipment are wastefully used.

The present invention has been made in view of the problems of the above-mentioned conventional techniques, and it is possible to transmit and receive high-speed and low-speed data without wasting the radio band and equipment. It is an object of the present invention to provide a PHS communication system capable of performing the above.

[0011]

To achieve the above object, the present invention provides a base station connected to a network, a terminal for wirelessly communicating with the base station, and the base station. And a relay for relaying communication with the terminal, and data communication between the base station and the relay.
However , if the speed of the data transmitted between the base station and the terminal is higher than a predetermined speed, the data is converted into PCM data and is performed using two time slots. When the speed is equal to or lower than a predetermined speed, in the PHS communication method in which the data is converted into ADPCM data and is performed using one time slot,
The repeater transmits the analog signal transmitted from the terminal.
Converting to the PCM data and the PCM data
Is input, the PCM data is converted into the analog signal.
Consists only of PCM code converter for decoding into JPEG and logic circuit
To convert the PCM data to the ADPCM data
And when the ADPCM data is input
AD for decoding the ADPCM data into the PCM data
PCM code converter and data transmission / reception to / from the base station
Transmission / reception circuit and transmission / reception via the transmission / reception circuit
The number of timeslots that the indicated data frame is directed
From a TDMA control circuit to be assembled using
The speed of the transmitted data is less than or equal to the predetermined speed
A band judgment circuit for judging whether or not there is a band judgment circuit
Based on the determination result of the path, the TDMA control circuit
The number of time slots to use
The data transmitted between the terminal and the base station is added to the AD.
Control for controlling whether to pass through the PCM code converter
Circuit and control by the control circuit,
The ADPCM code of data transmitted to and from the base station
And a selection circuit for switching the route to the signal converter,
The base station determines in advance the rate of data transmitted to the terminal.
The judgment means to judge whether it is less than the speed
And the speed of the data is faster than a predetermined speed.
If not, convert the data to PCM data and
Send to the repeater using a lot,
If the speed of is less than or equal to the predetermined speed, the data
To ADPCM data and use one time slot
And transmit to the repeater .

[0012]

Further, the band determination circuit includes the PCM data converted by the PCM code converter and the ADPCM.
It is characterized in that it is determined whether or not the speed of the data transmitted from the terminal is equal to or lower than a predetermined speed by comparing with the PCM data decoded by the code converter.

The band determination circuit delays the PCM data output from the PCM code converter by a predetermined time and outputs the delayed PCM data, and the PCM data output from the delay circuit to the ADPCM code converter. And a PCM circuit rectified by the rectifier circuit, a subtractor for subtracting the decoded PCM data at each predetermined sampling period, a rectifier circuit for rectifying the subtraction result by the subtractor by detecting an absolute value, and a PCM rectified by the rectifier circuit. An accumulator that accumulates and outputs data for a predetermined period, and a determination circuit that compares the data output from the accumulator with a predetermined threshold value and outputs the comparison result to the control circuit are provided. However, the control circuit uses the time used for the TDMA control circuit based on the comparison result in the determination circuit. The data transmitted between the base station and the terminal instructs the number of lots AD
It is characterized by controlling whether to pass through the PCM code converter.

In the delay circuit, the PCM data output from the PCM code converter is converted into the ADPCM data by the ADPCM code conversion circuit,
The PCM data output from the PCM code converter is delayed by the time until the DPCM data is converted to the PCM data and input to the subtractor.

In the repeater, the PCM data output from the PCM code converter is converted into the ADPCM data by the ADPCM code conversion circuit, and the ADPCM data is converted into the ADPCM data.
It is characterized by having a switch that forms a loop such that PCM data is converted into the PCM data and input to the band determination circuit.

(Operation) In the present invention configured as described above, in the band determination circuit provided in the repeater, the PCM data converted by the PCM code converter and A
By comparing with the PCM data decoded by the DPCM code converter, it is determined whether the speed of the data transmitted from the terminal is equal to or lower than a predetermined speed,
When the speed of the data transmitted from the terminal is higher than a predetermined speed, the data is converted into PCM data and transmitted to the base station using two time slots, and the data transmitted from the terminal If the rate is less than or equal to the predetermined rate, the data is converted into ADPCM data and one time slot is transmitted to the base station.

Further, the base station also determines whether or not the rate of data transmitted to the terminal is equal to or lower than a predetermined rate, and the rate of data transmitted from the base station is higher than the predetermined rate. If the data is fast, the data is converted into PCM data and transmitted to the repeater using two time slots, and if the data transmitted from the base station has a speed equal to or lower than a predetermined speed, the data is transmitted. Is A
It is converted into DPCM data and transmitted to the repeater using one time slot.

As described above, in the data communication between the base station and the repeater, when the speed of the data transmitted between the base station and the terminal is higher than the predetermined speed, the data is PCM. Since the data is converted into two time slots and the speed of the data is equal to or lower than a predetermined speed, the data is converted into ADPCM data and one time slot is used. High-speed and low-speed data transmission / reception is performed without wasting the radio band and equipment.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the PHS communication system of the present invention.

In the present embodiment, as shown in FIG. 1, a base station 300 connected to a network 400, a terminal 200 that wirelessly communicates with the base station 300, and a base station 3
00 and a repeater 100 that relays communication between the terminal 200 and the terminal 200.

In the PHS communication system configured as described above, communication is performed between the base station 300 and the terminal 200 via the repeater 100.

FIG. 2 is a diagram showing the configuration of the repeater 100 shown in FIG.

As shown in FIG. 2, the repeater 100 in this embodiment is connected to the terminal 200 by the antenna 60 and the transmission / reception circuit 50 for transmitting / receiving data to / from the base station 300 and the two-wire line 2W. Interface circuit 10 for exchanging data with 200, and an analog signal received from terminal 200 via interface circuit 10 is converted into 8-bit PCM data and output, and when PCM data is input. The PC
A PCM code converter 20 for decoding M data into an analog signal, and PCM data output from the PCM code converter 20 is converted into 4-bit ADPCM data and output, and when the ADPCM data is input, the ADP
ADPCM code converter 30 for decoding CM data into PCM data, and PC output from PCM code converter 20
The M data or the ADPCM data output from the ADPCM code converter 30 is assembled into a frame to be transmitted to the base station 300 and output, and the data frame received via the antenna 60 and the transmission / reception circuit 50 has a predetermined cycle. TDM output as digital signal
A control circuit 40, PCM data output from the PCM code converter 20 and P input to the PCM code converter 20.
The band determination circuit 70 that determines the band of the data transmitted from the terminal 200 based on the calculation result of the difference from the CM data and the P output from the PCM code converter 20.
TDM the CM data through the ADPCM code converter 30.
Input to A control circuit 40 or ADPCM code converter 30
The signal is received via the selection circuits 80a and 80b for selecting whether to input to the TDMA control circuit 40 without passing through the TDMA control circuit 40, and the antenna 60 and the transmission / reception circuit 50.
A selection circuit 80c for selecting whether the data output from 0 is input to the PCM code converter 20 via the ADPCM code converter 30 or to the PCM code converter 20 not via the ADPCM code converter 30. , 80d and the determination result of the band determination circuit 70, the selection circuit 8
0a to 80d for controlling the selection of the route and controlling the number of used slots in the TDMA control circuit 40, and the PCM code converter 20 or the band determining circuit 70 for the data selected by the selecting circuits 80c and 80d. Switch 1a for switching the input to either one
And the data input to the ADPCM code converter 30 is A
A switch 1b is provided for switching to either the data output from the DPCM code converter 30 or the data output from the TDMA control circuit 40.

The band determination circuit 70 also delays the PCM data output from the PCM code converter 20 by a predetermined time and outputs the delayed PCM data, and the PCM data output from the delay circuit 71 to the PCM code converter 20. A subtractor 72 for subtracting the PCM data input to the pre-determined sampling cycle, and a rectifier circuit 73 for rectifying the subtraction result of the subtractor 72 by detecting the absolute value,
An accumulator 74 that accumulates and outputs the PCM data rectified by the rectifier circuit 73 for a predetermined period, compares the data output from the accumulator 74 with a predetermined threshold value, and outputs the comparison result to the control circuit 90. And a determination circuit 75 for outputting In addition,
For the delay time set by the delay circuit 71, the PCM data output from the PCM code converter 20 corresponds to the selection circuit 80.
a, ADPCM code converter 30, switch 1b, ADP
CM code converter 30, selection circuit 80d and switch 1a
It is the time until it is input to the subtractor 72 via.

The interface circuit 10 includes the terminal 2
00, call current supply, ringing transmission, 2 wire 4
Functions as a subscriber circuit for line conversion. Also, TDMA
The control circuit 40 mainly has a mapping function of the 4-bit data output from the ADPCM code converter 30 and a predetermined time slot of a wireless frame.

Of the entire circuit shown in FIG. 2, circuits other than the interface circuit 10 and the PCM code converter 20 are also provided in the base station 300. The base station 300 receives the PCM 8-bit data from the network and determines the band similarly to the repeater 100. The high speed data bypasses the ADPCM code converter 30, and the low speed data passes through the ADPCM code converter 30. In the base station 300 and the repeater 100, speed determination, selection of the number of used time slots, and mapping of wired part time slots and wireless part frames are performed by the same method.

Below, the repeater 1 configured as described above
The operation of 00 will be described.

Terminal 20 via interface circuit 10
When an analog signal such as voice or a modem signal is input from 0, first, the input analog signal is converted into 8-bit PCM data in the PCM code converter 20, and D
It is output from the OUT1 terminal.

The data output from the DOUT1 terminal is
D of the ADPCM code converter 30 via the selection circuit 80a
It is input to the IN2 terminal, converted into 4-bit ADPCM data in the ADPCM code converter 30, and converted into ADO.
It is output from the UT2 terminal.

Before communication, the 4-bit ADPCM data output from the ADOUT2 terminal of the ADPCM code converter 30 is supplied to the ADPCM via the switch 1b.
It is input to the ADIN2 terminal of the code converter 30.

Then, in the ADPCM code converter 30, the 4-bit ADPCM input from the DIN2 terminal is input.
The data is converted to 8-bit PCM data and ADPC
It is output from the DOUT2 terminal of the M code converter 30.

The 8-bit PCM data output from the DOUT2 terminal of the ADPCM code converter 30 is selected by the selection circuit 8.
It is input to one input terminal of the subtractor 72 via 0d and the switch 1a.

The PCM data output from the DOUT1 terminal of the PCM code converter 20 is transferred to the A through the selection circuit 80a.
It is input to the DPCM code converter 30 and also to the band determination circuit 70.

The PCM data input to the band determination circuit 70 is sent to the PC in the delay circuit 71 in the band determination circuit 70.
The PCM data output from the M code converter 20 includes the selection circuit 80a, the ADPCM code converter 30, and the switch 1.
b, the ADPCM code converter 30, the selection circuit 80d, and the switch 1a, and the signal is output to the other input terminal 72 of the subtractor 72 after being delayed by the time until it is input to the subtractor 72.

Then, in the subtractor 72, the delay circuit 71
From the PCM code converter 20 and the PCM data output from the selection circuit 80a and the ADPCM code converter 3
0, the switch 1b, the ADPCM code converter 30, the selection circuit 80d, and the difference from the PCM data input to the subtractor 72 via the switch 1a.
Every 5 μs), the calculation result is output to the rectification circuit 73, and the absolute value of the calculation result in the subtractor 72 is obtained in the rectification circuit 73. This operation is equivalent to commutation.

The data rectified by the rectifier circuit 73 is input to the accumulator 74, accumulated and output for a certain period in the accumulator 74, and then determined by the determination circuit 75 in advance as the data output from the accumulator 74. The threshold value is compared, and if the difference between the two is larger than a predetermined amount, the signal of 1 is
If the difference between the two is less than or equal to a predetermined amount, a signal of 0 is output from the DETOUT terminal to the control circuit 90.

When 1 is output from the band determination circuit 70, the PCM data and PCM output from the delay circuit 71 are output.
Output from the code converter 20, the selection circuit 80a, ADP
The difference from the PCM data input to the subtractor 72 via the CM code converter 30, the switch 1b, the ADPCM code converter 30, the selection circuit 80d, and the switch 1a is large,
The data input through the interface circuit 10 is determined to be high-speed data such as the Internet or a high-speed FAX signal, and the control circuit 90 causes the selection circuit 80
P output from the PCM code converter 20 at a and 80b
CM data is TD without passing through the ADPCM code converter 30.
The route input to the MA control circuit 40 is selected, and the TDMA control circuit 40 is selected by the selection circuits 80c and 80d.
The route in which the data output from the PCM code converter 20 is input without passing through the ADPCM code converter 30 is selected, and the TDMA control circuit 40 is transmitted to the base station 3
It is instructed to use a frame using 2 time slots for transmitting data for 00.

When 0 is output from the band determination circuit 70, the PCM data output from the delay circuit 71 and the PCM code converter 20 are output, and the selection circuit 80a,
ADPCM code converter 30, switch 1b, ADPCM
The difference from the PCM data input to the subtractor 72 via the code converter 30, the selection circuit 80d, and the switch 1a is small, and the data input via the interface circuit 10 is low-speed data such as voice. Then, the control circuit 90 causes the selection circuits 80a and 80b to perform PCM.
The route in which the data output from the code converter 20 is input to the TDMA control circuit 40 via the ADPCM code converter 30 is selected, and the data output from the TDMA control circuit 40 is selected by the selection circuits 80c and 80d. ADPC
The route input to the PCM code converter 20 via the M code converter 30 is selected, and the TDMA control circuit 40 is also selected.
Is instructed to use a frame in which one time slot is used for transmitting data to the base station 300.

Based on the above band determination result, the PCM data output from the PCM code converter 20 has the selection circuit 80a, the ADPCM code converter 30 and the selection circuit 80d.
Is input to the TDMA control circuit 40 via the TDMA control circuit 40, a frame using one time slot is assembled in the TDMA control circuit 40, and the frame is transmitted to the base station 300 via the transmission / reception circuit 50 and the antenna 60. It is input to the TDMA control circuit 40 via the selection circuits 80a and 80d, a frame using 2 time slots is assembled in the TDMA control circuit 40, and the frame is transmitted to the base station 300 via the transmission / reception circuit 50 and the antenna 60. It

On the other hand, the radio wave signal received by the antenna 60 is input to the TDMA control circuit 40 via the transmission / reception circuit 50, and in the TDMA control circuit 40, the received frame has a pulse signal having a predetermined cycle. And is input as 4-bit data from the ADIN terminal of the selection circuit 80c.

During normal communication, the data input from the ADIN terminal of the selection circuit 80c is switched by the switch 1b to the input terminal A of the ADPCM code converter 30.
It is guided to DIN2, converted into 8-bit PCM data in the ADPCM code converter 30, and output from the DOUT2 terminal.

The data output from the ADPCM code converter 30 is transferred to P via the selection circuit 80d and the switch 1a.
It is input to the DIN1 terminal of the CM code converter 20, and the PCM
The AOU is restored in the code converter 20 into an analog signal.
It is output from the T terminal.

The analog signal output from the PCM code converter 20 is transmitted via the interface circuit 20 to the terminal 20.
Supplied to zero.

The operation of the band determination circuit 70 shown in FIG. 2 will be described in detail below.

FIG. 3 is a diagram for explaining the operation of the band determination circuit 70 shown in FIG. 2, and FIG. 3A is a delay circuit 7 when a high speed signal is input to the interface circuit 10.
1 is a diagram showing an output waveform from FIG. 1, (b) is a diagram showing a waveform of a signal output from the DOUT2 terminal by being fed back by the ADPCM code converter 30 when a high-speed signal is input to the interface circuit 10, ( c) is a subtractor 72
2A is a diagram showing the result of subtracting the signal shown in FIG. 2B from the signal shown in FIG. 2A, and FIG.
0 is a diagram showing an output waveform from the delay circuit 71 when a low speed signal such as voice is input to 0, and (e) shows ADPCM code conversion when a low speed signal such as voice is input to the interface circuit 10. Showing the waveform of the signal output from the DOUT2 terminal by being fed back by the device 30
(F) is a diagram showing a result of subtracting the signal shown in (e) from the signal shown in (d) in the subtractor 72. It should be noted that in FIG. 3, although it is drawn continuously for convenience, it is actually sampling data at intervals of 125 μs.

The signal output from the delay circuit 71 is shown in FIG.
As shown in (a) and (d), since the PCM code converter 20 performs A / D conversion only once,
S / S that has an analog signal input to the M code converter 20
Reproduced with N ratio.

On the other hand, the data output from the ADPCM code converter 30 is AD as shown in FIGS. 3 (b) and 3 (e).
ADPCM conversion and ADPCM conversion by the PCM code converter 30
Since the inverse conversion is performed, there is no portion where the change is sharp as shown in FIG.

Therefore, in the waveform shown in FIG. 3A, there is a portion where the change is steep, while in FIG.
In the waveform shown in FIG. 3B, the portion where the change is sharp as shown in FIG. This is ADPC
This is because the M code converter 30 is configured on the basis of an algorithm that assumes a gently changing voice and cannot follow a waveform in which the amplitude and the phase change abruptly like a high speed modem signal.

Therefore, from the waveform shown in FIG.
When the waveform shown in (b) is subtracted, the signal output from the subtractor 72 becomes a steep waveform with a large amplitude as shown in FIG. 2 (c).

In the case of voice input, ADP
Since the CM code converter 30 can follow the change of the waveform, when the waveform shown in FIG. 2 (e) is subtracted from the waveform shown in FIG. 2 (d), as shown in FIG. 2 (f), A signal having a small amplitude is output from the subtractor 72.

As described above, since there is a clear difference in the calculation result in the subtractor 72 between the case where high-speed data is input and the case where low-speed data such as a voice signal is input, subtraction is performed in the decision circuit 75. It is possible to distinguish between the two by using the calculation result in the device 72.
A control signal for performing different control depending on whether high-speed data for 0 is input or low-speed data such as a voice signal is output.

In this way, when it is determined that the input analog signal is low-speed data such as voice, ADPC
The PCM data transmitted by the M code converter 30 is A
The frame is converted into DPCM data, the TDMA control circuit 40 uses only one 32 kbps time slot to assemble a frame, and the assembled frame is transmitted via the transmission / reception circuit 50 and the antenna 60.
When it is determined that the input analog signal is high-speed data, the PCM data output from the PCM code converter 20 bypasses the ADPCM code converter 30 and TDMA.
It is input to the control circuit 40, the TDMA control circuit 40 uses two time slots to assemble a frame, and the assembled frame is transmitted via the transmission / reception circuit 50 and the antenna 60.

The transmission operation from the terminal shown in FIG. 1 to the base station via the repeater shown in FIG. 2 will be described below.

FIG. 4 is a flow chart for explaining the transmitting operation from the terminal shown in FIG. 1 to the base station via the repeater shown in FIG.

First, as shown in FIGS. 4 (a) and 4 (b),
In the repeater 100, the terminal 20
The band of the analog signal input from 0 is determined. In this determination, the PCM code converter 20 determines that the analog signal is P
It is performed after being digitally converted into CM data. Here, in this example, a case where the analog signal input from the terminal 200 is high-speed data and two time slots are used will be described.

When it is determined in the band determination that the analog signal input from the terminal 200 is high-speed data, the TDMA control circuit 40 in the repeater 100 sends a TCH (traffic channel) to the base station 300. It is required to allocate a total of two. The repeater 10
In the TCH addition request message transmitted from 0 to the base station 300, as shown in FIG. 4C, the TCH addition request message is transmitted to the base station 300 in the time slot T1.

When base station 300 receives the TCH addition request message transmitted from repeater 100, repeater 100 is notified of the available time slot number and carrier frequency. As shown in FIG. 4D, this notification is carried in the reception time slot R1 delayed by a half cycle from the transmission time slot T1 in the repeater 100 and transmitted from the base station 300 to the repeater 100.

When the relay 100 receives the notification carried in the reception time slot R1, the relay 100 uses the transmission time slots T2 and T3 to perform high-speed transmission, as shown in FIG. 4C, for example. Data is 64 kbp
s.

The operation of receiving a call from the base station in the terminal shown in FIG. 1 via the repeater shown in FIG. 2 will be described below.

FIG. 5 is a flow chart for explaining an incoming call operation from the base station in the terminal shown in FIG. 1 via the repeater shown in FIG.

The procedure is the same as that shown in FIG. 4 except that the band determination is performed by the base station 300.

When the base station 300 determines that the data transmitted to the terminal 200 is high-speed data,
First, as shown in FIG. 5C, the repeater 100 is notified of additional allocation of the TCH using the time slot T1. It should be noted that, of course, regarding the relationship between the time slots in FIGS. 4 and 5, the transmission time slot T1 in the base station 300 becomes the reception time slot R1 in the relay 100.

When the repeater 100 receives the notification from the base station 300, as shown in FIG. 5 (d), the repeater 100 adds to the base station 300 the reception time slot R1 in the base station 300. The response will be sent back to you.

When the base station 300 receives the response carried in the reception time slot R1, the base station 300 uses the transmission time slots T2 and T3 to perform high-speed transmission, as shown in FIG. 5C, for example. Data is 64 kbp
s.

Here, since 40 data are collectively transmitted at a 5 ms period from the repeater 100, at least 5 m
Inevitably, a delay of s occurs, and a delay also occurs in other processing. Therefore, if the accumulation period in the accumulator provided in the band determination circuit 70 is set within the required time for all of these, no extra delay occurs. In FIGS. 4 and 5, the total required time is set to 10 ms as an example, and even if the band determination is performed, an extra delay for that purpose does not occur.

The operation of the entire system when a call origination operation is performed by the terminal 200 shown in FIG. 1 will be described below.

FIG. 6 is a sequence diagram for explaining the operation of the entire system when the call origination operation is performed by the terminal 200 shown in FIG. Note that sequences not directly related to the present invention are omitted.

First, the terminal 20 connected to the repeater 100
When 0 is called, a two-wire loop is closed.

When the repeater 100 detects a call from the terminal 200, the repeater 100 sends an LC to the base station 300.
A CH (logical control channel) establishment request is transmitted.

Then, the base station 300 selects the vacant carrier frequency and the time slot, and the LC
It is transmitted to the repeater 100 as a CH assignment message.

A call setup is requested by the repeater 100, and then a ring back tone (RBT) is transmitted from the network. At this time, since one time slot has already been used, the RBT can be transferred to the terminal 200.

When the called party (not shown) answers, the repeater 1
At 00, the polarity of the call current is changed to the Levers polarity and the terminal 200 is notified.

When the terminal 200 transmits high-speed data, the result of the band judgment in the repeater 100 is T
A CH addition request is transmitted from the repeater 100 to the base station 300, and in response thereto, from the base station 300 to the repeater 100.
When the additional TCH allocation is transmitted to the relay station 100 and is received by the relay 100, the high speed modem signal is transferred from the relay 100 using two time slots.

On the other hand, when low-speed data such as voice is input from the terminal 200 to the repeater 100, the repeater 1
It is determined that one time lot is used by the band determination in 00, and no TCH addition request or TCH additional allocation message is generated.

The operation of the entire system when an incoming operation is performed at the terminal 200 shown in FIG. 1 will be described below.

FIG. 7 is a sequence diagram for explaining the operation of the entire system when an incoming operation is performed at terminal 200 shown in FIG.

When an incoming call message arrives at the base station 300 from the network 400, the incoming call message is first transferred from the base station 300 to the repeater 100.

Then, repeater 100 sends an LCCH establishment request to base station 300, base station 300 performs LCCH allocation, and repeater 100 responds to the incoming call.

At the same time, the repeater 100 is connected to the terminal 200.
A ringing signal is sent from and the call is made.

When the terminal 200 responds, the response is transferred from the repeater 100 to the base station 300.

When high-speed data arrives at the base station 300 from the network 400, the base station 300 makes a band determination and the TCH additional allocation is transmitted from the base station 300 to the repeater 100.

Then, repeater 100 transmits a TCH addition response to base station 300, and both base station 300 and repeater 100 operate in two time slots.

When low-speed data such as voice is input, the additional TCH is determined to be unnecessary by the band determination, so the TCH addition sequence does not occur.

[0086]

As described above, in the present invention,
In the data communication between the base station and the repeater, when the speed of the data transmitted between the base station and the terminal is higher than a predetermined speed, the data is converted into PCM data for 2 hours. If the data rate is less than a predetermined rate, the data is converted into ADPCM data and one time slot is used to perform high-speed data processing as a terminal. The data transmitted / received between the base station and the repeater are PCM data and ADPCM depending on whether the data is transmitted / received or the low speed data such as voice is used.
Since it automatically switches to either one of the data, and the number of time slots used for transmission and reception also switches automatically, without wasting the radio band or equipment,
High-speed and low-speed data can be transmitted and received.

As a result, even if the subscriber changes the connection between the telephone and the high-speed modem signal at any time, the trouble of registering the terminal type data in the network becomes unnecessary,
There will be no problem such as service failure due to mismatch between subscriber data and terminal type due to forgetting or making mistakes.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a PHS communication system of the present invention.

FIG. 2 is a diagram showing a configuration of a repeater shown in FIG.

FIG. 3 is a diagram for explaining the operation of the band determination circuit shown in FIG. 2, in which (a) is a diagram showing an output waveform from the delay circuit when a high-speed signal is input to the interface circuit; b) is a diagram showing a waveform of a signal which is fed back by the ADPCM code converter and output from the output terminal when a high-speed signal is input to the interface circuit,
(C) is from the signal shown in (a) in the subtractor (b)
6D is a diagram showing the result of subtracting the signal shown in FIG. 5, FIG. 7D is a diagram showing an output waveform from the delay circuit when a low-speed signal such as voice is input to the interface circuit, and FIG. Is a diagram showing the waveform of the signal output from the output terminal by being fed back by the ADPCM code converter when a low-speed signal such as It is a figure which shows the result of having subtracted the signal shown in e).

FIG. 4 is a flowchart for explaining a transmission operation from the terminal shown in FIG. 1 to the base station via the repeater shown in FIG.

5 is a flow chart for explaining an incoming call operation from the base station in the terminal shown in FIG. 1 via the repeater shown in FIG.

6 is a sequence diagram for explaining an operation of the entire system when a call origination operation is performed by the terminal shown in FIG.

7 is a sequence diagram for explaining an operation of the entire system when an incoming operation is performed by the terminal shown in FIG.

8A and 8B are diagrams for explaining encoding of low-speed data and high-speed data using the ADPCM system, FIG. 8A is a diagram showing a waveform of high-speed data on the Internet, and FIG. 8B is a low-speed data such as voice. It is a figure which shows the waveform of.

[Explanation of symbols]

1a, 1b switch 10 Interface circuit 20 PCM code converter 30 ADPCM code converter 40 TDMA control circuit 50 transmitter / receiver circuit 60 antenna 70 Band judgment circuit 71 Delay circuit 72 Subtractor 73 Rectifier circuit 74 Accumulator 75 Judgment circuit 80a-80d selection circuit 90 Control circuit 100 repeater 200 terminals 300 base stations 400 network

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Claims (5)

(57) [Claims] 1. A base station connected to a network, a terminal for wirelessly communicating with the base station, and a repeater for relaying communication between the base station and the terminal. and, data communication between the repeater and the base station,
If the speed of data transmitted between the base station and the terminal is higher than a predetermined speed, the data is transferred to the PC.
A PHS communication method in which the data is converted into M data and is performed using two time slots, and when the speed of the data is less than or equal to a predetermined speed, the data is converted into ADPCM data and is used in one time slot. , The repeater relays the analog signal transmitted from the terminal to the PCM data.
If the PCM data is input at the same time
PC for decoding the PCM data into the analog signal
The PCM data is composed of only an M code converter and a logic circuit.
It is converted into DPCM data and the ADPCM data is converted.
Data is input, the ADPCM data is transferred to the PCM.
ADPCM code converter for decoding into data and transmission / reception circuit for transmitting / receiving data to / from the base station
And a data frame transmitted / received via the transmission / reception circuit.
TD to assemble using the indicated number of time slots
The MA control circuit and the speed of the data transmitted from the terminal are predetermined
A band determination circuit that determines whether the speed is less than or equal to the speed, and the TDMA based on the determination result of the band determination circuit.
Indicate to the control circuit the number of time slots to use
And the data transmitted between the terminal and the base station.
Whether the data is passed through the ADPCM code converter
A control circuit for controlling the terminal and the terminal and the base station under the control of the control circuit.
ADPCM code converter for data transmitted to and from
And a selection circuit for switching the route to the terminal, the base station predicts the speed of data transmitted to the terminal.
Judgment hand to judge whether the speed is less than the predetermined speed
Has a step, and the speed of the data is greater than the predetermined speed
If it is faster, convert the data to PCM data and
To transmit to the repeater using
If the speed of the data is below a predetermined speed, the data
Data into ADPCM data and one time slot
P is used to transmit to the repeater.
HS communication system. 2. The PHS communication system according to claim 1 , wherein the band determination circuit compares the PCM data converted by the PCM code converter with the PCM data decoded by the ADPCM code converter. By doing so, it is determined whether or not the speed of the data transmitted from the terminal is less than or equal to a predetermined speed, the PHS communication method. 3. The PHS communication system according to claim 2 , wherein the band determination circuit delays the PCM data output from the PCM code converter by a predetermined time and outputs the delayed PCM data, and outputs from the delay circuit. AD from the generated PCM data
A subtractor for subtracting the PCM data decoded by the PCM code converter for each predetermined sampling period; a rectifier circuit for rectifying the subtraction result of the subtractor by detecting an absolute value; An accumulator which accumulates and outputs the rectified PCM data for a predetermined period, compares the data output from the accumulator with a predetermined threshold value, and outputs the comparison result to the control circuit. A determination circuit, and the control circuit indicates the number of time slots to be used to the TDMA control circuit based on the comparison result in the determination circuit, and transmits between the terminal and the base station. Controlling whether or not the data to be passed through the ADPCM code converter is controlled.
Communication method. 4. The PHS communication system according to claim 3 , wherein in the delay circuit, the PCM data output from the PCM code converter is converted into the ADPCM data by the ADPCM code conversion circuit, and the ADPCM data is generated. P output from the PCM code converter only during the time until the data is converted to the PCM data and input to the subtractor.
A PHS communication system characterized by delaying CM data. 5. The PHS communication system according to any one of claims 2 to 4, wherein the repeater, P output from the PCM code converter
The CM data is converted into the A by the ADPCM code conversion circuit.
A PHS communication system comprising a switch forming a loop, which is converted into DPCM data, and the ADPCM data is converted into the PCM data and input to the band determination circuit.