JP3369686B2 - Data processing device using data storage - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device using a data storage body which is installed on a road or the like and which reads the data storage body from the automobile side in a non-contact manner.

[0002]

2. Description of the Related Art Conventionally, as a data storage body capable of contactless data reading by a reader / writer, for example, FIG.
Are known. In FIG. 12, reference numeral 100 denotes a reader / writer, which includes a controller 110, a read controller 120, a transmitter 130, a D00 correlator 140, and a D11 correlator 15.
0, a comparator 160 is provided. A data storage unit 200 includes a transmission unit 220, a control unit 210, a memory 230, and a pseudo random signal generation unit 240.

Data storage 2 by the reader / writer 100
The read operation of 00 is as follows. Data storage 200
When enters into the transmission possible area of the reader / writer 100, the control unit 110 recognizes the existence of the data storage body by a sensor or the like,
The read control unit 120 is activated to issue a read sequence including a command and an address. This read sequence is sent by the transmission unit 130 to the transmission unit 220 of the data storage body 200 by, for example, electromagnetic induction coupling.

Upon receipt of the read sequence from the transmission unit 220, the control unit 210 of the data storage unit 200 receives the memory 23.
A read operation is started by designating an address of 0. Memory 2
A non-volatile E ² PROM is used as 30,
Each time a data return command issued following the read sequence is received, a read operation is performed bit by bit.

The read bit b0 from the memory 230 is applied to the pseudo random signal generator 240 to generate a pseudo random signal D00 or D11 prepared corresponding to each of bits 0 and 1, and the transmitter 220 causes the reader / writer. 100
Send to. The reader / writer 100 inputs the received signal from the transmission unit 130 in parallel to the D00 correlator 140 and the D11 correlator 150, and the pseudo random signal D of the data storage body 200 is input.
The autocorrelation between the same reference signal as 00 and D11 and the received signal is calculated. If the received signal is a pseudo random signal D00 indicating bit 0, a peak value is obtained by bit 0 correlator 140, bit 0 is restored and output to read control section 120. In addition, the received signal is a pseudo random signal D indicating bit 1.
If it is 11, the peak value is obtained by the D11 correlator 150,
Bit 1 is restored and output to read control section 120.

However, in the data processing device using such a conventional data storage body, even if the data is read out from the memory of the data storage body at high speed, the amount of data that can be transmitted at one time is 1 bit. There was a problem that the data transmission speed was limited. Therefore, the inventor of the present application has proposed a data processing device using a data storage body capable of performing high-speed transmission by increasing the amount of data transmission from the data storage body performed using a pseudo-random signal ( Japanese Patent Application No. 5-297642).

FIG. 13 shows a device which the present inventor has already proposed. In FIG. 13, the reader / writer 10 is provided with a control unit 14, a read control unit 16, a transmission unit 18, and a decoding unit 20. The decoding unit 20 uses the pseudo random signals D00, D01, D1 indicating the 2-bit data from the data storage body 12.
In order to restore the bit data 00, 01, 10, 11 from 0, D11, four correlation calculators are provided.

That is, the restored bits 00, 01, 10, 11
A D00 correlation calculator 22-1, a D01 correlation calculator 22-2, a D10 correlation calculator 22-3, and a D11 correlation calculator 22-4 are provided corresponding to the above. The comparator 24 detects the maximum value of the autocorrelation values output from the four correlation calculators 22-1 to 22-4, restores the 2-bit data corresponding to the pseudo-random signal having the maximum value, and outputs the 2-bit data. To do.

The data storage unit 12 includes a transmission unit 26, a control unit 28, and two serial read type memories 30-1 and 30-.
2. A pseudo random sequence generator 32 and a pseudo random signal generator 34 are provided. Serial read type memory 30
-1, 30-2 are serial read type E ² PROMs
To use. According to the data processing device using the data storage body of FIG. 13, a ^2N- bit bit string is shown from the data storage body 12 in response to one data return command from the reader / writer 10 following the read sequence. A unique pseudo-random signal is transmitted, and 2 ^N- bit data can be restored by reception of the auto-correlation of this pseudo-random signal. Therefore, even in the memory read for each data return command, the data transmission speed from the data storage body can be greatly improved.

[0010]

However, as shown in FIG.
When a system is constructed in which the conventional old type device shown in FIG. 9 and the newly proposed new type device shown in FIG. 13 coexist, as shown in FIG. 14, the new type data memory 12 is read by the old type reader / writer 100. Further, as shown in FIG. 15, the old-type data storage body 200 can be read by the new-type reader / writer 10, but there is a problem that read data is mistakenly restored on the reader / writer side.

For example, when the new type data storage body 12 of FIG. 14 is read by the old type reader / writer 100, the new type data storage body 12 outputs 2-bit parallel outputs 00, 01, of the memory.
Pseudo random signals D00 and D0 corresponding to 10 and 11
It is assumed that 1, D10 and D11 are transmitted. In this case, the old reader / writer 100 uses the pseudo random sequences D00 and D11.
However, since it cannot be decoded by the correlation calculation, some bits cannot be decoded.

Further, as shown in FIG. 15, when the old type data storage body 200 is read by the new type reader / writer 10, it is assumed that pseudo random signals D00 and D11 are transmitted from the old type data storage body according to bits 0 and 1. In this case, the new reader / writer 10 restores the 2-bit data 00 and 11 and the wrong data bit 0011 is received.

It is an object of the present invention to obtain correct data even if there are different types of data storages for transmitting the read data of single-bit serial output and multi-bit parallel output using the same pseudo-random signal. Provided is a data processing device using a highly reliable data storage body that can be read and restored.

[0014]

To achieve this object, the present invention is constructed as follows. First, the present invention is directed to a data processing device using a data storage that reads at least data from the reader / writer to the data storage. Regarding the data processing device using such a data storage body, in the present invention, each of the N memories for serial reading in the data storage body and the predetermined command from the reader / writer are received. Memory response means for outputting one of a predetermined 2 ^N types of pseudo-random signals for N-bit parallel data read simultaneously from the memory; and further, when receiving a type read command from the reader / writer, And a type response means for outputting the type information using one predetermined pseudo-random signal.

On the other hand, the reader / writer holds the same signal as the 2 ^N kinds of pseudo-random signals of the data storage body as a reference signal and obtains the autocorrelation with the received signal. Comparing means for obtaining the maximum one of the autocorrelation values for each of the 2 ^N kinds of pseudo-random signals obtained in step 1 and outputting the corresponding N-bit data,
When a type read command is issued to the data storage unit and predetermined type response information is obtained, a type determination means for reading data corresponding to the type response information is provided.

Here, the data storage unit is provided with a memory for performing N-bit parallel reading, and a predetermined 2 ^{N is} set for the N-bit parallel data read from the memory.
One of the types of pseudo-random signals may be returned. As the pseudo random sequence used to read out the transmission from the data storage element, using a single pseudo-random sequence, pseudo-random sequence of 2 ^N type corresponding to the data of N bits by changing the phase of the pseudo-random sequence To get

Further, according to the present invention, data having one bit more than the parallel bit data represented by the pseudo random signal can be transmitted using the same pseudo random signal. Therefore, in the data storage body, memory means for outputting N-bit data in parallel by one read (N-bit parallel read-type memory or serial read-type memory).
When a predetermined command is received from the reader / writer, (N-1) bits except for any one bit of N-bit data read from each memory at the same time are pre-determined for 2 ^N-1 kinds of pseudo. A memory response unit that selects and outputs one of the random signals while controlling non-inversion and inversion with an arbitrary 1 bit, and a predetermined one of pseudo random signals when a type read command is received. And a type response means for outputting the type information by using.

On the other hand, the reader / writer holds the same signal as the 2 ^N-1 kinds of pseudo random signals of the data storage body as a reference signal and calculates the autocorrelation with the received signal. Of the autocorrelation values for each of the 2 ^N-1 types of pseudo-random signals obtained by the means, the maximum one is obtained and the corresponding (N-1) bit data is output. Is issued and predetermined type response information is obtained, the type determination means for reading data corresponding to the type response information and the polarity of the autocorrelation value of the pseudo-random signal obtained as the type response information are set. The polarity of the correlation value received for each data return command is stored and the stored polarity is determined, and (N-
1) A bit adding means for adding a predetermined arbitrary 1 bit to a bit output to restore N-bit data is provided.

[0019]

According to such a data processing device of the present invention,
Prior to reading data, the type of the data storage is first determined, and the data is read only after recognizing that it is the data storage of the type to be read, so data cannot be read correctly. It is possible to prevent the wrong reading operation of the body.

Besides the data reading, the existence of the data memory can be recognized through the exchange of the type information. Further, it is possible to easily transmit parallel data with one bit more by using the pseudo random sequence and its inverted signal.

[0021]

FIG. 1 shows an embodiment of a data processing device of the present invention which outputs parallel bit outputs of a memory of a data storage body in response to one pseudo-random signal. The data storage body is installed along a road. On the other hand, the example is applied to a system in which the reader / writer is installed on the vehicle side.

In FIG. 1, the data processing apparatus of the present invention comprises a high speed vehicle data storage unit 12A installed along a road and a high speed vehicle reader / writer 10A mounted on a high speed vehicle. The reader / writer 10A includes a control unit 14, a type determination unit 15A, a read control unit 16, a transmission unit 18, and a decoding unit 20.
Is provided. The decoding unit 20 is a high speed vehicle data storage unit 12.
Pseudo-random signal D0 indicating 2-bit data from A
Data bits 00,0 from 0, D01, D10, D11
In order to restore 1, 10, 11 four correlation calculators 22
-1 to 22-4 are provided. The comparator 24 detects the maximum value of the autocorrelation values output from the four correlation calculators 22-1 to 22-4, restores the 2-bit data corresponding to the pseudo-random signal having the maximum value, and outputs the 2-bit data. To do.

The type determination unit 15A issues a type read command to the outside via the transmission unit 18 at a constant repetition period. Corresponding to the type read command, predetermined type response information is prepared on the high speed vehicle data storage 12A side. Specifically, four types of pseudo random sequence signals D00, D0 sent from the high speed vehicle data storage 12A
Any one of 1, D10 and D11, for example, a pseudo random signal D11 is sent back as the type response information.

Therefore, the pseudo random signal D11 as the type response information from the high-speed vehicle data storage 12A for the type call command is received, and the comparison unit 24 outputs D11.
When the type determination unit 15A receives the restored bit 11 as a result of detecting the maximum value of the autocorrelation value of the correlation calculator 22-4 through the read control unit 16, the type determination unit 15A that receives the type response information receives the self-correlation value. Recognizes that a data storage exists in the communicable area of. At the same time, by receiving the correct type response information, it recognizes that it is the high-speed vehicle data memory 12A to be read, and activates the read operation to the read control unit 16 via the control unit 14. become.

On the other hand, the data storage unit 12A for high-speed vehicles has a transmission unit 26, a control unit 25, and two serial read type memories 3.
0-1 and 30-2, a pseudo random sequence generation unit 32, a pseudo random signal generation unit 34, and a type response unit 28A realized as a function of the control unit 25 are provided. A serial read type E ² PROM can be used as the serial read type memories 30-1 and 30-2. In the control unit 25 of the high speed vehicle data storage unit 12A, when entering the communication area on the side of the arbitrary reader / writer, first, the type response command is received, and this is decoded and the type response unit 28A generates a pseudo random sequence. The unit 32 generates a pseudo-random sequence corresponding to predetermined type response information, and sends it to the reader / writer side via the pseudo-random signal generator 34 and the transmitter 26.

In the case of the high-speed vehicle data storage 12A, four kinds of pseudo random sequences D00, D01, D10, D11 are defined in the pseudo random sequence generator 32, and the type response unit 28A includes the pseudo random sequences. The random sequence D11 is transmitted as the type response information. When the type response process for the type command is completed, the control unit 25 receives the read command string from the reader / writer side and executes the read operation.

FIG. 2 shows a series of read command sequences issued from the read control unit 16 of the high-speed vehicle reader / writer 10A to the high-speed vehicle data storage 12A. This read command sequence is issued when correct type response information is obtained following the type read command, and first issues a read sequence including the read command and address. In response to the read sequence, a predetermined processing operation is performed on the high-speed vehicle data storage 12A side, and when the end status is obtained, pseudo random signal return commands (data return commands) are sequentially issued, and the necessary data is serially transferred. Request.

The control unit 25 of the high speed vehicle data storage unit 12A of FIG. 1 receives the series of read command sequences shown in FIG.
Serial read type memory 30 by read sequence
When the standby state of the addressing and the read operation for 1 and 30-2 is obtained, the read operation is performed one bit at a time from the memories 30-1 and 30-2 for each pseudo random signal return command received.

Therefore, to the pseudo-random sequence generator 32, 2-bit parallel data b0 b1 are sequentially input from the memory side each time a return command is received. In the pseudo random sequence generator 32, 2 ^N kinds of pseudo random sequences are prepared, where N is the number of bits input in parallel. In this case, since N = 2, 2 ² = 4 types of pseudo-random sequences D00 to D11 are 2-bit data b.
It is prepared corresponding to 00, 01, 10, 11 of 1, b0.

The pseudo-random sequence generator 32 may prepare four different types of pseudo-random sequences, but one pseudo-random sequence is divided and the phase is shifted to create four types of pseudo-random sequences. May be. Eg 1
One pseudo-random sequence is divided into 2 ^N, and 2 ^N kinds of pseudo-random sequences that are phase-shifted for each division field are created. Figure 1
In the case of N, since N = 2, one pseudo-random sequence is divided into four and then phase-shifted to create four types of pseudo-random sequences D00 to D11.

FIG. 3 shows a case where four kinds of pseudo random signals D00 to D11 are generated by shifting after dividing into four, for a pseudo random sequence having a code length of 63 words. Here, the code length M of the pseudo random signal is represented by M = 2 ⁿ −1. For example, if n = 6, the code length M = 63. Therefore, in FIG. 3, each code of 63 words is indicated by a number from 0 to 62.

The first code f ₀ is the original code that is not phase-shifted and is divided into 16, 16, 16 and 15 bits. This is a pseudo random signal D00 of bit 00. The next code f _{M / 4} is a code that is 16-bit phase-shifted to the higher-order bit side and is used as the pseudo random signal D01 of bit 01. Similarly, 16 bits are shifted to the upper bit side to generate a code f _{M / 2} , which is used as a pseudo random signal D10 corresponding to bit 10,
Further shift by 15 bits to make code f _{3M / 4} , bit 1
The pseudo random signal D11 corresponding to 1.

This is generally shown as follows. 1
Consider a case where one code sequence f is divided into 4 by setting 2 ^N , for example N = 2. Here, the code sequence is represented by f _n (i).
n indicates the initial phase, i indicates the phase, and M indicates the code length. The autocorrelation of the code phase-shifted by such division is expressed by the following equation.

[0034]

[Equation 1]

Therefore, bit 0 as shown in FIG.
Code sequence f ₀ corresponding to ₀ , 01, ₁₀ , 11
Pseudo-random sequence D0 having f _{M / 4} , f _{M / 2} , f _{3M / 4}
By using 0, D01, D10, and D11, highly reliable spread spectrum communication can be performed. For example, when using the codes f ₀ and f _{M / 2} as an example, the reference code f
_{When the} received code is ₀ for ₀ and when it is a different code f _{M / 2} ,

[0036]

[Equation 2]

When the received sequences match, the peak value of the autocorrelation value becomes, and in the case of different code sequences, the autocorrelation value becomes -1. On the other hand, the code sequence is g, f
If two types are prepared, the reception sequence is f with respect to the reference sequence f.
And g

[0038]

[Equation 3]

It becomes As described above, when different code sequences are used, the cross-correlation value when the reference sequence and the received sequence do not match exceeds 1 and S / S is smaller than that when one code sequence is divided and phase-shifted. N becomes low. Therefore, it is desirable to use 2 ^N kinds of pseudo-random sequences obtained by dividing one code sequence into 2 ^N and performing phase shift.

Referring again to FIG. 1, the pseudo random sequence generator 32 includes the four types of pseudo random sequence D shown in FIG.
00 to D11 are prepared in advance, and the pseudo random sequence corresponding to the 2-bit inputs b1 and b0 by the bit read for each return instruction from the serial read type memories 30-1 and 30-2 is sent to the pseudo random signal generator 34. Output. The pseudo random signal generation unit 34 generates a pseudo random signal according to the input bit sequence, and sends it from the transmission unit 26 to the high speed vehicle reader / writer 10A.

In the pseudo random signal generator 34,
A pseudo random signal (rectangular pulse train) corresponding to the input pseudo random bit sequence on a one-to-one basis may be output, or if necessary, phase modulation may be performed and output. The transmission unit 18 of the high-speed vehicle reader / writer 10A receives the pseudo-random signal transmitted from the high-speed vehicle data storage 12A, and the four correlation calculators 22-1 to 22-2 provided in the decoding unit 20.
2-4 is supplied in parallel. Four correlation calculators 22-1
22 to 22-4 hold the same pseudo-random sequences D00 to D11 as the data storage side shown in FIG. 3 as a reference signal, and calculate the autocorrelation between the reference signal and the received signal.

Specifically, the received signal is input to a shift register having the same word length as the reference signal, and the autocorrelation value is calculated every time bit shift is performed. When the received signal sequence matches the reference sequence, the autocorrelation peak value is obtained at that timing. The comparison unit 24 includes four correlation calculators 22-1 and 22-2.
The autocorrelation peak values output from 2-4 are compared, the autocorrelation peak value exceeding a predetermined value is detected, and the data bit corresponding to the correlation calculator that has obtained this autocorrelation peak value is decoded. It is output to the read control unit 16.

Specifically, any one of the maximum outputs from the correlation calculators 22-1 to 22-4 from which the autocorrelation peak value is obtained is used as an address pointer to restore bits 00, 01, 1
The table storing 0 and 11 is referred to and the corresponding 2-bit data is read. Therefore, the decoding unit 20 has a function as a decoder that decodes the received pseudo random signal and outputs the corresponding 2-bit data.

On the other hand, when the data storage is the low-speed vehicle data storage 12B shown in FIG. 4, the pseudo random signal D00 is sent as the type response information in response to the type call command. In this case, the type determination unit 15A recognizes from the decoding bit 20 from the decoding unit 20 that the data storage unit is the low-speed vehicle data storage unit 12B, and instructs the comparison unit 24 of the DOO correlation calculator 22-1. Bit 0 is restored by the determination of the correlation peak value, and the D11 correlation calculator 22
The decoding function is set so as to restore bit 1 by discriminating the correlation peak value of -4. Therefore, the high-speed vehicle reader / writer 10A can also read data from the low-speed vehicle data storage body 12.

FIG. 4 shows a low-speed vehicle reader / writer 10B and a low-speed vehicle data storage 12B used in combination with the high-speed vehicle reader / writer 10A and the high-speed vehicle data storage 12A shown in FIG. This low speed car reader / writer 10B
The low-speed vehicle data storage 12B is the old-type reader / writer 100 and the old-type data storage 2 shown in FIG.
However, in the present invention, as shown in the low-speed vehicle reader / writer 10B regarding the old-type reader / writer and the data storage body, a new type determining unit 1 is newly added.
5B is provided, and as shown in the control unit 25 of the low-speed vehicle data storage body 12B, a type response unit 28B is newly provided.

Further, only one serial memory 30 is provided in the low-speed vehicle data storage 12B, so that a read output is generated bit by bit for each read return command received by the control unit 25. Therefore, the pseudo random sequence generator 32 is prepared in advance with two types of pseudo random sequences D00 and D11 corresponding to the 1-bit output b0 from the memory. The pseudo random sequence generator 32 generates a pseudo random sequence signal D00 corresponding to 1-bit output from the serial read type memory 30 for each pseudo random signal return command.
Alternatively, one of D11 and the reader / writer 10 for a low speed vehicle is passed through the pseudo random signal generator 34 and the transmitter 26.
Send to B side.

The type determining unit 15B provided in the low-speed vehicle reader / writer 10B is the high-speed vehicle reader / writer 10 shown in FIG.
Similar to the case of A, the type read command is always issued at a constant cycle, and when the correct type response information is obtained from the data storage side for this type read command, the read operation is activated. Control unit 25 of data storage 12B for low-speed vehicle
Upon receiving the type read command from the reader / writer side, the type response unit 28B provided in the device sends out predetermined type response information.

As the type response information, a pseudo random sequence D00 is used in the case of the low speed vehicle data storage 12B. That is, when the type response unit 28B receives the type read command from the reader / writer side, it causes the pseudo random sequence generation unit 32 to send pseudo random D00 as the type response information to the reader / writer side. Therefore, in the type determining unit 15B of the low-speed vehicle reader / writer 10B, when the pseudo random signal D00 is sent from the data storage side for the type reading command, the autocorrelation peak is output from the D00 correlation calculator 22-1 of the decoding unit 20. A value is obtained, which is discriminated by the comparison unit 24 and the data bit 0 is obtained to recognize that the correct type response information is obtained. Only when the correct type response information is obtained, the control unit 14 is operated. The read control unit 16 is activated via the
Start the read operation for B.

FIG. 5 shows in (A) the relationship between the pseudo-random signal and the data bit used in the data processing device for a high-speed vehicle shown in FIG. 1, and in the low-speed vehicle reader / writer and data storage of FIG. The relationship between the pseudo-random signal and the data bit is collectively shown in (B). Next, the operation of the entire system will be described. The high-speed vehicle data storage 12A shown in FIG. 1 and the low-speed vehicle data storage 12B shown in FIG. 4 are installed on the road in a mixed state.
For high-speed vehicles, the high-speed vehicle reader / writer 10A shown in FIG.
On the other hand, it is assumed that the low-speed vehicle reader / writer 10B shown in FIG.

Assuming that a high-speed vehicle is traveling, the high-speed vehicle is equipped with the high-speed vehicle reader / writer 10A shown in FIG. 1, and the high-speed vehicle reader / writer 10A is classified by the type determination unit 15A at regular intervals while traveling. The response command is sent from the transmission unit 18. When the high speed vehicle data storage unit 12A installed on the road enters the communication area of the high speed vehicle reader / writer 10A during traveling, the type response unit 28A sends a pseudo random sequence signal D11.

This is decrypted by the decryption unit 20, and the type determination unit 15A recognizes that the correct type response information is obtained. Therefore, in this case, the read control unit 16 is activated via the control unit 14 and data is read from the high-speed vehicle data storage body 12A by issuing the read command sequence shown in FIG. On the other hand, when the low-speed vehicle data storage 12B of FIG. 4 enters the communicable range of the high-speed vehicle reader / writer 10A, the low-speed vehicle data storage of FIG. 4 is issued in response to the type read command from the reader / writer. The type response unit 28B of the body 12B sends back a pseudo random signal D00 indicating its type.

However, in the high speed vehicle reader / writer 10A of FIG. 1, the returned pseudo random signal D
Although the type response information decoded by the decoding unit 20 upon receiving 00 is 2-bit data of 00 and the presence of the data storage is recognized, it is determined to be the low-speed vehicle data storage 12B. In this case, if necessary, the read operation is performed on the low-speed vehicle data storage 12B, and bit 0 or 1 of bit 1 is received from the received pseudo-random signal D00 or D11.
Restores bit data. Therefore, it is possible to prevent erroneous restoration of data from the low-speed vehicle data storage body 12B in which the bit data of the pseudo random signal has a different meaning.

On the other hand, the low-speed vehicle reader / writer 12B shown in FIG.
For low-speed vehicles equipped with
Only for the data storage unit 12B for low-speed vehicles to be returned,
Data is read out and data for high-speed vehicles in Fig. 1 with different type information is read.
Data was not read from the memory unit 12A
It prevents the data from being read. FIG. 6 corresponds to FIG.
Another example of the data storage body 12A for high-speed vehicles used in the embodiment
An example is shown. In FIG. 1, the serial read type memory 30
Serial E as -1,30-2 ²Using PROM
However, in the case of FIG. 6, 8 bits are set for one read operation.
Parallel E that produces parallel output²Using PROM
It is characterized by that.

In FIG. 6, a serial read type memory 30 is provided.
-1 is provided with a parallel E ² PROM 36, a count register 38 and a shift register 40. The parallel E ² PROM 36 outputs 8-bit parallel data b0 to b7 each time it receives a read operation instruction from the control unit 28. The 8-bit parallel data b0 to b7 from the parallel E ² PROM are converted into serial data using the shift register 40 and output to the pseudo random sequence generator 32 in bit units.

The count register 38 increments the address for the parallel E ² PROM 36 each time the parallel output for 8 bits from the shift register 40 is completed. That is, the shift clock CLK is given from the control unit 28 to the shift register 40, and the parallel E ² PRO is performed by the shift operation by this shift clock.
The 8-bit data b0 to b7 loaded from M36 are output to the pseudo random sequence generator 32 in bit units.

The shift clock CLK is a count register
38 is also given. In the count register 38,
At the stage of the first read sequence, the control unit 28
Le E ²The start address of the PROM is set. Coun
The register 38 counts eight shift clocks CLK.
The current register value is incremented by 1 for each
Rel E²The read address of the PROM 36 is updated.

By having the configuration shown in FIG. 6,
The serial read type memories 30-1 and 30-2 can be constructed by using the parallel E ² PROM. FIG. 7 shows the embodiment of FIG. 1 as a generalized embodiment in which N serial read memories 42-1 to 42-N are provided in the data storage body 12A for high-speed vehicles as shown in the figure. Corresponding to the number of memories N provided in the high speed vehicle data storage 12A,
The pseudo random sequence generator 32 is prepared with 2 ^N kinds of pseudo random sequences. The decoding unit 20 of the reader / writer 10 is also provided with the same reference series and correlation calculator as the pseudo random series generated in the 2 ^N kinds of data storage bodies 12.

FIG. 8 is a block diagram showing another embodiment of the present invention. This embodiment is characterized in that a parallel read type memory is used as the high speed vehicle data storage 12A. . In FIG. 8, the high-speed vehicle data storage 12
A parallel read type memory 36 is provided in A, and the control unit 2
Every time the pseudo random signal return command following the read sequence from 8 is decoded, for example, 8-bit data b0 to b
Produces a 7 read output. The pseudo random sequence generator 32 assigns a pseudo random sequence to the 8-bit parallel data b0 to b7 from the parallel read type memory 36, for example, in units of 4 bits, and transfers it to the reader / writer 10 side.

That is, when 4-bit parallel data is sent by one pseudo random signal, N = 4, and in this case, it is necessary to prepare 2 ^N = 16 types of pseudo random sequences. This pseudo-random sequence can be created by dividing one pseudo-random sequence having a predetermined word length into 16 and then phase-shifting it as shown in FIG. Corresponding to the pseudo-random sequence generator 32, a high-speed vehicle reader / writer 10
The code unit 20 of A is provided with 16 correlation calculators and a comparator for detecting the autocorrelation peak value of each correlation calculator and outputting the corresponding 4-bit data, as in the first embodiment. There is. The 16 autocorrelators hold the same sequence as the 16 types of pseudo-random sequences on the data storage 12A side as a reference sequence.

The pseudo random sequence generator of the high speed vehicle data storage 12A includes circuits similar to the count register 38 and the shift register 40 shown in FIG. 6, for example. The parallel E ² PROM shown in FIG. 6 corresponds to the parallel read type memory 36 shown in FIG. Therefore, referring to FIG. 8, after loading the 8-bit parallel data b0 to b7 from the parallel E ² PROM into the shift register 40, each shift clock CLK obtained based on the decoding result of the pseudo random signal return command from the control unit 28. The loaded 8-bit parallel data b0 to b7 is output in units of 4 bits, that is, in units of bits b0 to b3 and b4 to b7, and a corresponding pseudo random sequence is generated.

The count register 38 increments the address that has already been set by one by 2 counts of the shift clock CLK and outputs the parallel E ² PROM 3
The address next to 6 will be designated. FIG. 9 shows another embodiment of the pseudo random sequence generator 32 provided in the high speed vehicle data storage 12A of the present invention. In this embodiment, four types of pseudo random sequence signals D00 to D11 and their inversion signals * D00 to * D11 are used to output 3 signals from the memory.
The feature is that bit parallel data can be sent.

In FIG. 9, the pseudo random sequence generator 3
2 is a 3-bit output b2 b of the parallel read type memory 36.
The lower 2 bits b1 b0 of 1 b0 are input.
Lower 2 bits b1 from the parallel read type memory 36
Four kinds of pseudo random sequences D00 to D11 are prepared in advance corresponding to the 2-bit input of b0. The most significant bit b2 of the 3-bit output of the parallel read type memory 36
Controls whether the bit string of pseudo-random D00 to D11, which is input to the EX-OR circuit 44 via the inverter 42 and is output from the pseudo-random sequence generator 32, is output as it is or inverted.

That is, when the most significant bit b2 is 1, the output of the inverter 42 is inverted to 0, so that EX-
The OR circuit 44 outputs the bit string of each sequence from the pseudo random sequence generator 32 as it is. On the other hand, when the most significant bit b2 of the parallel read type memory 36 becomes 0, the output of the inverter 42 becomes 1 by inversion, so that the EX-OR circuit 44 inverts and outputs the pseudo random signal. Becomes

That is, the pseudo random sequence generator 32 of FIG.
The data storage body 12A for a high speed vehicle of the present invention equipped with FIG.
Eight types of pseudo-random signals are output for the 3-bit data indicated by 0. FIG. 11 corresponds to FIG. 9 and is a decoding unit 2 provided in the high speed vehicle reader / writer 10A of the present invention.
An example of 0 is shown.

In FIG. 11, the decoding unit 20 includes four correlation calculators 22-1 to 22-4 corresponding to four types of pseudo random signals D00 to D11 on the data storage side, and a comparison unit 2.
4, a bit addition unit 48 and a polarity determination unit 50. Correlation calculators 22-1 to 22-4 hold the same pseudo random signals D00 to D11 as the data storage side, respectively, as reference signals, and calculate the autocorrelation value with the reception sequence.

Here, in the correlation calculators 22-1 to 22-4, when the autocorrelation value between the reference signal held in advance and the same received signal is calculated, the autocorrelation having a positive polarity is calculated. The peak value is output. On the other hand, when the autocorrelation with the inversion signal of the reference signal held in advance is calculated, the autocorrelation peak value has a negative polarity.

The comparing section 24 includes correlation calculators 22-1 to 22-.
2-bit data 00 corresponding to the received pseudo random D00 to D11 based on the absolute value of the autocorrelation peak value of 4
It outputs ~ 11. The polarity determination unit 50 determines the polarity of the autocorrelation peak value obtained from the correlation calculator 22-4 for the pseudo random signal D11 as the type response information for the type read command performed in the first exchange with the data storage side. Based on this determination result, the bit addition unit 48 is controlled to add the upper 1 bit to the lower 2 bits output of the comparison unit 24 based on the pseudo random signal subsequently sent from the data storage side.

Here, when the high-speed vehicle data storage body 12A is positioned in the correct direction with respect to the high-speed vehicle reader / writer 10A, the respective transmission units 18 and 26 are not coupled by electromagnetic induction coupling using coils. Since they are contact-coupled and the winding directions of the two coils are aligned in a predetermined prescribed direction, the pseudo-random signal sent from the data storage body is received by the reader / writer while maintaining its polarity. .

Therefore, the pseudo random signal D11 as the type response information sent from the data storage side in response to the type read command has the same bit sequence as the pseudo random signal held as a reference signal in the correlation calculator 22-4. , Therefore, its autocorrelation peak value has a positive polarity. In this way, when the polarity determination unit 50 determines that the pseudo random signal D11 as the type response information has a positive polarity, the next correlation calculator 22- is obtained.
When the autocorrelation peak value from any one of 1 to 22-4 has the same positive polarity, bit 1 is added to the head of the 2-bit output from the comparison unit 24 to provide a 3-bit output. On the other hand, when the polarity of the autocorrelation peak value of any one of the correlation calculators 22-1 to 22-4 is a negative polarity, at the beginning of the 2-bit data output from the comparison unit 24 at this time. Add bit 0.

On the other hand, when the high-speed vehicle data storage body 12A is located on the back side of the high-speed vehicle reader / writer 10A, the directions of the electromagnetic induction coupling coils provided in the respective transmission units 18 and 26 are reversed. The bit sequence of the pseudo-random signal output from the data storage side becomes an inverted bit sequence. Therefore, in the polarity determination unit 50 of FIG. 11, the polarity of the autocorrelation peak value output from the correlation calculator 22-4 is a negative polarity for the pseudo random signal D11 as the type information that is first sent back from the data storage body side. If so, the bit addition unit 4
If the polarity of the autocorrelation peak value at that time is negative, the bit 1 is added to the 2-bit output from the comparison unit 24 based on the autocorrelation peak value obtained subsequently for 8.
If it is positive, bit 0 is added.

Based on such polarity judgment of the type information received first, it is judged whether the data storage body side is correctly aligned on the front side or conversely face down, and according to each state. 3 sent by either of pseudo-random signals D00-D11 and its inverted signals * D00- * D11 with the addition of the appropriate most significant bit
Bit parallel data can be accurately restored.

In FIG. 9, the inversion control of the pseudo-random signal generated based on the lower bit is performed in the most significant 1 bit of the parallel output bits from the memory. There is no limitation, and any one bit may be used for the inversion control. . Further, in the decoding unit 20 of FIG. 11, the correlation calculators 22-1 to 22-4 are commonly provided for the pseudo random signal and its inverted signal, but the correlation is performed for each of the pseudo random signal and its inverted signal. A total of eight arithmetic units may be provided.

In the above embodiment, the E ² PROM is used as the memory provided on the data storage side, but the memory only needs to be able to hold data, and may be a RAM with a battery. Further, in the above embodiment, the electromagnetic induction coupling is used as the non-contact coupling between the reader / writer and the data storage body, but radio wave coupling or optical coupling may be used instead. Further, it is not limited to non-contact bonding, but may be contact bonding. The code length of the pseudo random sequence is not limited to 63 bits, 127 bits,
255 bits, 511 bits, 1023 bits, etc. can be appropriately determined as necessary.

In the above embodiment, the system configuration in which the data storage unit is installed on the road and the reader / writer is mounted on the automobile side is taken as an example, but the present invention is not limited to this, and the present invention can be applied to an appropriate mobile unit or portable unit. Can be applied.

[0075]

As described above, according to the present invention, even when different data storage bodies having different bit data meanings of the same pseudo random signal are mixedly used, other data of different types are used. It is possible to prevent data from being recalled by calling data from the memory,
The reliability of data reading when the data storages of different types are mixed can be greatly improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention of a high-speed vehicle that reads two memories in parallel.

FIG. 2 is an explanatory diagram of a read command string issued by the reader / writer according to the present invention.

FIG. 3 is an explanatory diagram showing four types of pseudo random sequences obtained by phase shifting from a single pseudo random sequence used for 2-bit simultaneous transmission according to the present invention.

FIG. 4 is a block diagram showing an embodiment of the present invention for a low speed vehicle in which a memory is read bit by bit.

FIG. 5 is an explanatory diagram of correspondence between data bits and pseudo random signals in the data storage body of the present invention.

6 is a block diagram of a data storage body when an 8-bit parallel type memory is used in the embodiment of FIG.

FIG. 7 is a block diagram showing another embodiment of the present invention for reading N memories in parallel.

FIG. 8 is a block diagram of another embodiment of the present invention using an 8-bit parallel type memory.

FIG. 9 is a block diagram showing an embodiment of a data storage side that generates a pseudo random signal and its inverted signal.

FIG. 10 is an explanatory diagram of correspondence between the pseudo random signal and the theta bit in FIG. 9;

FIG. 11 is a block diagram showing a circuit embodiment on the reader / writer side for receiving the pseudo-random signal of FIG.

FIG. 12 is a block diagram of a conventional device that transfers bit by bit.

FIG. 13 is a block diagram of an apparatus proposed by the inventors of the present application.

FIG. 14 is an explanatory diagram of read data error caused by the old type reader / writer and the new type data storage body.

FIG. 15 is an explanatory diagram of read data error caused by the new type reader / writer and the old type data storage body.

[Explanation of symbols]

10A: Reader / writer for high-speed vehicles 10A: Reader / writer for low-speed vehicles 12A: High-speed vehicle data storage 12B: data storage for low speed vehicles 14, 25: control unit 15A, 15B: Type determination unit 16: Read control unit 18, 26: Transmission unit 20: Decoding unit (decoder) 22-1 to 22-4: D00 correlation calculator to D11 correlator 24: Comparison section 28A, 28B: Type response unit 30-1 to 30-N: Serial read type memory 36: Parallel read type memory 38: Count register 40: Shift register 42: Inverter 44: EX-OR circuit (exclusive OR circuit)

─────────────────────────────────────────────────── --Continued from the front page (56) References JP-A-5-217031 (JP, A) JP-A-3-181238 (JP, A) JP-A-60-5637 (JP, A) JP-A-63- 296424 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06K 17/00 G06K 19/00-19/18 H04B 1/59 H04B 1/707

Claims (4)

(57) [Claims] 1. A data processing device using a data storage unit for reading at least data from a reader / writer to the data storage unit, wherein N memories for serial reading are provided in the data storage unit, Memory response means for outputting one of a predetermined 2 ^N kinds of pseudo-random signals for N-bit parallel data read simultaneously from the memories when a predetermined command is received from the reader / writer. A type response means for outputting type information using a predetermined one of the pseudo-random signals when a type read command from the reader / writer is received, and the reader / writer stores the data storage a correlation operation means for the same signal as 2 ^N kinds of pseudo random signal body held as a reference signal determining the autocorrelation of the received signal, said correlation Starring Of autocorrelation values for each 2 ^N kinds of pseudo random signal obtained by means previously issued and comparing means for outputting the N-bit data corresponding seeking maximum one, the type read command to said data storage member A data processing device using a data storage body, comprising: a type determining means for reading data corresponding to the type response information when the determined type response information is obtained. 2. A data processing device using a data storage body for reading at least data from a reader / writer to a data storage body, comprising: a memory for reading N-bit parallel data in the data storage body; Responsive means for returning one of a predetermined 2 ^N kinds of pseudo-random signals to N-bit parallel data read from the memory, and the pseudo-random signal when the type read command from the reader / writer is received. And a type response means for outputting the type information using one of the predetermined ones, and the reader / writer holds the same signal as the 2 ^N types of pseudo random signals of the data storage body as a reference signal. of the correlation calculation means for obtaining the autocorrelation of the received signal, said correlation autocorrelation value for each pseudo random signal 2 ^N types obtained by the calculation means Te, up to Comparing means for obtaining an item and outputting corresponding N-bit data, and data reading corresponding to the type response information when a type read command is issued to the data memory to obtain predetermined type response information. A data processing device using a data storage body, which is provided with a type determination means for performing the above. 3. A data processing device using the data storage body according to claim 1, wherein a single pseudo random sequence is used as a pseudo random sequence used for read transmission from the data storage body, A data processing device using a data storage body, characterized in that the phase of the pseudo random sequence is changed to obtain 2 ^N kinds of pseudo random sequences corresponding to the N-bit data. 4. A data processing device using a data storage body for reading at least data from a reader / writer to the data storage body, wherein N-bit data is read in parallel to the data storage body by one reading. And (n-1) bits excluding any one bit of N-bit data read simultaneously from each memory upon receiving a predetermined command from the reader / writer. Memory response means for outputting ^{one of the} defined 2 ^N-1 kinds of pseudo-random signals by controlling non-inversion and inversion by the arbitrary 1 bit of the parallel output, and when receiving a type read command on, the pseudo random signal using one determined in advance provided a type responsive means for outputting the type information, and the reader writer, the data storage of 2 ^N-1 type of pseudo A correlation calculating means for obtaining an autocorrelation between the received signal to hold the same signal as the random signal as a reference signal, among autocorrelation values of every 2 ^N-1 types of pseudo random signal obtained by the correlation computing means, Comparing means for obtaining the maximum value and outputting corresponding (N-1) bit data, and a type response when a type response information is obtained by issuing a type read command to the data storage body. Type determining means for reading data corresponding to the information, polarity of the autocorrelation value of the pseudo-random signal obtained as the type response information is determined, and (N-1) of the comparing means according to the polarity determination result. A data processing device using a data storage body, comprising: a bit adding unit for adding arbitrary 1 bit to a bit output to restore N-bit data.