JP3373132B2 - Digital encoding device and digital decoding device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital encoder and a digital decoder, and more particularly to JPEG.
(Joint Photographic Experts Group), MPEG (Mo
ving Picture Experts Group) and DVC (Digita
The present invention relates to a digital encoding device and a digital decoding device in image processing such as Video Camera).

[0002]

2. Description of the Related Art In recent years, rapid advances in compression technology have made it possible to handle video signals requiring a large amount of data processing at high speed with a personal computer, a video camera or the like.

FIG. 7 shows JPE which is one of the compression techniques.
It is a block diagram showing a schematic structure of a G system image processing device. This image processing apparatus uses a discrete cosine transform (hereinafter referred to as DCT) to transform pixel data.
A DCT calculation unit 101, a quantizer 102 for quantizing a DCT calculation result, a quantization table 103 referred to when the quantizer 102 quantizes, and a continuous zero of quantized data. The zero length counting unit 105 for counting the number, the grouping unit 104 for grouping the quantized data, the variable length coding unit 106 for performing the two-dimensional Huffman coding, and the variable length coding unit 106 are two. The code table 107 to be referred to when performing the dimension Huffman coding, the fixed length conversion unit 108 for packing and outputting the variable length code obtained by the variable length coding unit 106, and the fixed length conversion unit 108 The processor 109 for inputting / outputting the compressed data and the compressed data input from the processor 109 into a predetermined bit. Variable length decoding unit 111 for bit extraction section 110 for decomposing the length data from the compressed data obtaining a zero-length and grouping factor, the variable length decoding unit 1
Decoding table 11 to be referred to by 11 when performing decoding
2. An inverse quantization unit 113 for performing inverse quantization using the zero length and the group coefficient obtained by the variable length decoding unit 111, and an inverse discrete cosine transform (Inverse Discrete Cosine Transform) of the inversely quantized data. Transform, hereinafter referred to as IDCT).

In JPEG image compression, an input image is divided into 8 × 8 pixel blocks and the blocks are input to the image processing apparatus shown in FIG. First, D
The CT calculation unit 101 performs a discrete cosine transform, which is a type of orthogonal transform, and maps an image to the spatial frequency domain. Human visual sense has different visual sensitivities between a low-frequency component and a high-frequency component of a spatial frequency, and is mainly sensitive to low-frequency components and low to high-frequency components. Therefore, the quantizer 102 quantizes low frequency components finely and high frequency components roughly. The quantization characteristic is stored in the quantization table 103, and the quantizer 102 reads the table value in synchronization with the output from the DCT operation unit 101 and performs quantization.

Since the quantized DCT operation result is roughly quantized by high frequency components, it is often data in which zeros continue. Therefore, the zero length counting unit 105 counts the number of consecutive zeroes to obtain the zero length. On the other hand, the grouping unit 104 uses the non-zero valued coefficient shown in FIG.
Grouping as shown in (1) is performed to decompose into group coefficients and additional coefficients. The additional coefficient means an offset value within the grouping, and ssss represents a group coefficient.

As shown in FIG. 9, the zero length (nnnn) obtained by the above processing and the group coefficient (ssss) are combined and input to the variable length coding unit 106. The variable length coding unit 106, from the code table 107, the Huffman code (maximum 16 bits) and the code length (4 bits) corresponding to the number of zeros (4 bits of 1 to 16) and the group coefficient (4 bits). Read-out, further grouping unit 1
The additional coefficient obtained in 04 is merged from the least significant bit (LSB) of the variable length code and input to the fixed length conversion unit 108.

The fixed length conversion unit 108 packs the variable length code into 8 bits or 16 bits and outputs the packed code to the external processor 109.

In the JPEG image expansion, the bit extraction unit 110 decomposes the fixed length compressed data input from the processor 109 into, for example, 16 bits and outputs it. The variable length decoding unit 111 includes a zero length (nnnn) and a group coefficient (s) corresponding to 16-bit compressed data.
sss) is obtained by referring to the decoding table 112. The decoding table 112 stores codes, group coefficients (ssss), coding lengths thereof, zero length (nnnn), and code length.

The dequantization unit 113 has a group coefficient (ss
The number of bits of the code coefficient is calculated from ss) and the zero length (nnn
Inverse quantization is performed using n), the group coefficient (ssss), and the additional coefficient. Then, the IDCT conversion unit 113
Performs inverse CT transform IDCT to obtain restored pixel data that is a reproduced image.

[0010]

[Problems to be Solved by the Invention] However, the conventional JPE
In the variable-length coding in the G system image processing device,
The code table 107 has an address of zero length (nnn
n) 4 bits and group coefficient (ssss) 4 bits in total, 8 bits in total, 16 bits which is the longest code length of the Huffman code defined by the JPEG method as data, and 4 bits indicating code length, 20 bits in total table are required. Next to
A total of 5,120 bits (2 ⁸ × 20) of memory is required.

In variable length decoding in a conventional JPEG image processing apparatus, the decoding table 112 has 16 bits of fixed-length code data as an address, 4 bits of zero length (nnnn) as data, and a group coefficient (s).
A total of 12-bit table of sss) 4 bits and actual code length (len) 4 bits is required, and a total of 78
A 6,432-bit (2 ¹⁶ × 12) memory is required.

As a technique for reducing the table memory in encoding and decoding, there is the invention disclosed in Japanese Patent Laid-Open No. 8-84081. In the encoding according to the present invention, the code length of the variable length code in the code table is reduced by 4 bits, and the code length is calculated from the code. However, this method also requires 16 bits of data, and a total of 4,096 bits (2 ⁸ × 1
Since the memory of 6) is required, the memory capacity cannot be significantly reduced.

Similarly, in decoding, the decoding table 1
The data width is reduced to 8 bits by reducing the code length of 4 bits by 12 and calculating the code length by calculation, but the total capacity is still large at 524,288 bits (2 ¹⁶ × 8), and it is inexpensive. Further realization of advanced hard logic requires further capacity reduction.

The present invention has been made to solve the above problems, and an object of the present invention is to reduce the capacity of a table referred to in variable length coding. Is.

An object of the invention described in claims 3 to 8 is to reduce the capacity of a table referred to in variable length decoding.

[0016]

According to a first aspect of the present invention, there is provided a digital encoding device, which comprises a conversion means for orthogonally converting input data, a zero length and a value coefficient of the input data orthogonally converted by the conversion means. A first output means for outputting the code length and the frequency of occurrence of the code in the code length based on the zero length and the valence coefficient extracted by the extraction means; Second output means for outputting the code having the highest occurrence frequency among the codes of the code length based on the code length output from the first output means, and the occurrence frequency output from the first output means And a first adding means for adding the code having the highest occurrence frequency output from the second output means.

The first output means stores only the code length and the frequency of occurrence of the code at this code length, and the second output means stores only the code having the highest frequency of occurrence among the codes of the code length. . Therefore, the storage capacities of the first output means and the second output means can be reduced.

According to a second aspect of the present invention, there is provided a digital encoding apparatus according to the first aspect, wherein the extracting means is a zero length counting means for counting zero length, and the value coefficient is a group coefficient. And a grouping means for converting into additional bits, and the digital encoding device further includes a second addition for adding the group coefficient converted by the grouping means and the code length output by the first output means. Means and fixed length conversion means for converting the code added by the first adding means and the additional bit converted by the grouping means into a fixed length code and outputting the fixed length code.

According to a third aspect of the present invention, there is provided a digital decoding device in which a code data extracting means for extracting code data having a predetermined bit length from a fixed length code and a code length from the code data extracted by the code data extracting means. Code length extracting means for extracting, cutout means for cutting out a code from code data having a predetermined bit length based on the code length extracted by the code length extracting means, and code cut out by the cutting means And third output means for outputting a zero length and a group coefficient based on

The third output means stores only the zero length and the group coefficient. Therefore, it is possible to reduce the storage capacity.

A digital decoding device according to a fourth aspect is the digital decoding device according to the third aspect, wherein the code data extracting means is the code length extracted by the code length extracting means and the third output means. The start address of the code data having a predetermined bit length is calculated based on the output group coefficient.

A digital decoding device according to a fifth aspect of the present invention is the digital decoding device according to the third aspect, wherein the code length extraction means outputs the code having the highest occurrence frequency among the codes of the code length. For determining the code length by comparing the first plurality of bits of the code data extracted by the code data extraction means with the code with the highest frequency of occurrence output by the fourth output means. And determining means.

A digital decoding device according to a sixth aspect of the present invention is the digital decoding device according to the third aspect, wherein the code data extracting means adds the additional bits based on the group coefficient output by the third output means. Cut out.

According to a seventh aspect of the present invention, there is provided a digital decoding device in which a code data extracting means for extracting code data having a predetermined bit length from a fixed length code and a code length from the code data extracted by the code data extracting means. A code length extraction unit for extracting the occurrence frequency of the code in the code length, and a variable length code of the code with the highest occurrence frequency among the codes of the code length based on the code length extracted by the code length extraction unit Fifth for outputting the overall occurrence frequency ranking
Output means, the occurrence frequency extracted by the code length extraction means, and the occurrence frequency rank in the entire variable length code of the code having the highest occurrence frequency among the codes of the code length output from the fifth output means. And a sixth output means for outputting the group coefficient and zero length.

The fifth output means stores only the occurrence frequency rank of the code having the highest occurrence frequency among the codes of the code length in the entire variable length code, and the sixth output means stores only the group coefficient and the zero length. Remember. Therefore, it is possible to further reduce the storage capacity as compared with the digital decoding device according to the fifth aspect.

The digital decoding apparatus according to claim 8 is
The digital decoding device according to claim 7, wherein the fifth output means outputs the cumulative number of codes having a code length shorter than this code length based on the code length extracted by the code length extraction means.

[0027]

DETAILED DESCRIPTION OF THE INVENTION

[Embodiment 1] FIG. 1 is a block diagram showing a schematic configuration of a digital encoding / decoding apparatus in Embodiment 1 of the present invention. This digital encoding / decoding apparatus includes a DCT calculator 1 for performing a discrete cosine transform on image data.
1. a quantizer 12 for quantizing a DCT operation result,
The quantization table 13 referred to by the quantization unit 12 when performing quantization, the zero length counting unit 14 for counting the number of consecutive zeros of the quantized data, and the grouping for the quantized data Grouping unit 15, variable-length coding unit 16 for performing two-dimensional Huffman coding, fixed-length coding unit 17 for packing and outputting the variable-length code obtained by the variable-length coding unit 16, fixed-length A processor 18 for performing processing such as input / output of compressed data packed by the digitizing unit 17,
A variable length decoding unit 19 for obtaining quantized data from the compressed data input from, an inverse quantization unit 20 for performing inverse quantization using the quantized data obtained by the variable length decoding unit 19, And an IDCT operation unit 21 for performing an inverse discrete cosine transform on the dequantized data.

The present invention particularly relates to a variable length code and is a DCT which is a part of the processing procedure of JPEG compression and expansion.
Since the techniques related to / inverse DCT transform and quantization / inverse quantization are known techniques, refer to, for example, "International Standard of Multimedia Coding (edited by Maruzen, Hiroshi Yasui, 1991)" and the like.

First, luminance (Y) and color difference (Cb, C
The 8-bit image data decomposed into r) has a horizontal direction of 8
Pixels, 8 pixels in the vertical direction are cut out and input as image data. The DCT operation unit 11 maps the input pixel data of 64 pixels to the spatial frequency domain and converts it into 64 DCT coefficients with 11-bit precision. The quantizer 12 quantizes the 64 DCT coefficients with reference to the quantization table 13. The quantization table 13 is, for example, the table shown in FIG. 8B, and the quantization unit 12 divides the remainder by the value of the quantization table corresponding to the input value and rounds the remainder.

Further, the quantizer 12 includes 64 DCTs.
The quantized coefficients are rearranged and output in an order called a zigzag path. The zero length counting unit 14 counts the number of consecutive zeros in the DCT quantized coefficient, and outputs it as a zero length (nnnn). Further, the grouping unit 15 converts the value coefficient in the quantized coefficient output from the quantization unit 12 into a group coefficient (ssss) and an additional bit (fk) and outputs the group coefficient (ssss) and the additional bit (fk). For example, the DCT quantization coefficient “000 shown in FIG.
When “0012” (decimal expression) is input to the zero length counting unit 14 and the grouping unit 15, a zero length (nnnn)
, 5 as a group coefficient, 4 as a group coefficient (ssss), and 1100B as an additional bit (fk). Since the value coefficient “12” shown in FIG. 6 is included in the group coefficient 4 shown in FIG. 8A and is the 13th from the minimum value “−15” of the additional coefficient, the additional bit is 1100B. Becomes The zero length (nnnn) takes a numerical value of 1 to 63, but when the run length of the invalid coefficient (0) exceeds 15, ZRL (Zero Run Length) representing the run length of 16 invalid coefficients.
Is continuously output until the remaining run length becomes 15 or less, and then the remaining run length is output as a zero length (nnnn). Also, the group coefficient (s
As shown in FIG. 8A, sss) is represented by 4 bits of 0 to 11, and the additional bit (fk) is represented by maximum 16-bit data (when the group coefficient is 16).

Zero length counting section 14 and grouping section 1
The zero length (nnnn), the group coefficient (ssss), and the additional bit (fk) obtained in 5 are input to the variable length coding unit 16. The variable length coding unit 16 performs Huffman coding based on the zero length (nnnn) and the group coefficient (ssss) and outputs a code of up to 32 bits to which the additional bit (fk) is added to the fixed length conversion unit 17. To do. The fixed length conversion unit 17 converts the input code into fixed length data having 16 bits as one word, and outputs the data to the processor 18. The processor 18 stores the fixed length data output from the fixed length conversion unit 17 in a hard disk device (not shown) as a compressed file.

On the other hand, when decompressing a compressed file stored in a hard disk or the like, the processor 18 outputs the compressed data read from the hard disk to the variable length decoding section 19 in a 16-bit word structure. The variable length decoding unit 19 calculates the zero length (nnnnn) from the input code.
2), group coefficient (ssss2), additional bit (fk)
2) is obtained, 64 pieces of quantized data are created and output to the inverse quantization unit 20. The inverse quantization unit 20 rearranges the input 64 pieces of quantized data on the inverse zigzag path, and
By multiplying the values in the quantization table shown in (b), the DCT
Find the coefficient. Finally, the IDCT calculation unit 21
The coefficient is inversely orthogonally transformed to obtain 64-pixel restored pixel data.

FIG. 2 is a block diagram showing the internal structure of the variable length coding unit 16 in this embodiment. The variable-length coding unit 16 converts the zero length (nnnn) and the group coefficient (ssss) into the code length (len) of the Huffman code and the occurrence frequency rank (hind) of the code length (1), a table 1 (22), The code length (len) from the table 1 (22) is input, and the table 2 (23) for outputting the code (dpat) having the highest occurrence frequency among the codes of the code length, the group coefficient (ssss), An adder 25 for adding the code length (len), and an adder 24 for adding the occurrence frequency rank (hind) and the code (dpat) having the highest occurrence frequency among the codes of the code length. Including.

A total of 8 bits of zero length (nnnn) 4 bits and group coefficient (ssss) 4 bits are input to the table 1 (22) as addresses. Table 1 (2
2) stores the code length (len) of the Huffman code corresponding to the zero length and the group coefficient and the occurrence frequency order (hind) of the code in the code length, and the zero length and the group coefficient input as addresses. The code length of the Huffman code corresponding to and the generation frequency rank (hind) of the code in the code length are output. The occurrence frequency order means, in the case where m codes are assigned to a certain code length y, the number of the code among the plurality of codes having the code length y in the coding element (sssss, nnnn). It is a ranking indicating whether or not. In other words, it represents the order of occurrence frequency in the code of code length y. For example, assuming the Huffman code shown in FIG.
Three codes are assigned to the bit code length, and the code with the highest frequency of occurrence is (ssss, nnnn) = (0,
5), and it can be seen that the occurrence frequency is low in the order of (0, 6) and (0, 0). Table 1 (22) is shown in FIG.
The code length and the occurrence frequency shown in (a) are stored as data.

The code length (len) output from the table 1 (22) is input as the address of the table 2 (23), and the pattern (dpat) having the highest occurrence frequency corresponding to the code length is stored as data. ing. For example, in the case of the Huffman code shown in FIG.
The data having the content shown in (b) is stored.

In JPEG encoding, 1 to 1
Although it may take 6 bits, the table logic created in the hardware description language is converted into hard logic to reduce unnecessary table logic. That is, a table 1 (2
When 2) is configured, 16 × 16 = 256 bits are required, but when configured by hard logic (1 + 2 + ... + 1)
6) = 136 bits.

Code length (len) from Table 2 (23)
Huffman code (dpa
t) is output, and the target Huffman code can be obtained by adding the occurrence frequency already output from Table 1 (22) with the adder 24. Also, the number of additional bits (fk) is the same as the group coefficient and s
Since it is sss, the Huffman code (dpat) is MSB
A code in which the additional bits (fk) are connected to the LSB side is output to the side, the code length (len + ssss) is obtained by the adder 25, and is output as the code length (tlen). The Huffman code and the code length obtained in this way are fixed in length by the fixed length conversion unit 17
And is packetized into data having a 16-bit length as one word.

As described above, the variable length coding unit 16
In the above, the code length and the frequency of occurrence and the table that outputs the code with the highest frequency of occurrence of the codes of that code length are used to calculate the desired code, thereby reducing the circuit scale required for encoding. As a result, the device becomes inexpensive and low power consumption driving becomes possible. With the above table configuration, the capacity of the table 1 (22) becomes 2 ⁸ × 8 bits and the table 2 (23) becomes 2 ⁴ × 16 bits, and the capacity is reduced to 2,304 bits in total. Also,
By configuring the table 2 (23) with random logic, it is possible to further reduce the circuit scale.

FIG. 4 is a block diagram showing the configuration of the variable length decoding unit 19. The variable length decoding unit 19 includes a first bit extracting unit 41 for extracting code data of a predetermined length, a comparing unit 42 for extracting a code length from the code data, and a comparing unit 4.
2 is referred to in order to extract the code length from table 3 (4
3), a second bit extraction unit 44 for extracting a code from code data, a table 4 (45) for outputting a zero length (nnnn2) and a group coefficient (ssss2) corresponding to the code, and a zero length (nnnn2) And group coefficient (s
From sss2) and the additional bits (fk2), a coefficient expansion unit 46 for obtaining 64 quantized coefficients, an adder 47, and a start address of a predetermined length of code data extracted by the first bit extraction unit 41 are calculated. A head address calculation unit 48 for

First, the first bit extraction unit 41 extracts 16 bits from the first bit of a 16-bit 1-word compressed data string (consecutive of fixed length data) input from the processor 18.
The bit is cut out and output to the comparison unit 42. The leading bit position (m) has been reset to zero at the beginning of the image input. The comparing unit 42 sequentially reads, from the table 3 (43), the code pattern having the highest occurrence frequency among the codes of each code length from the code length of 1 bit to 16 bits, and the code pattern and the first bit extracting unit 41 The output 16-bit data is compared with the data (kdt) obtained by cutting out the MSB in the order of 1 bit, 2 bits, ..., 16 bits. As a result of this comparison, the code length at which the magnitude relationship changes is determined as
en). For example, when the code data shown in FIG. 3 (d) is input, first, 1 extracted from the code data is input.
The bit data (kdt) is compared with the code (dpat) that has the highest frequency of occurrence with a code length of 1, and kdt
It can be seen that is larger than dpat. Next, 2-bit data (kdt) is cut out from the code data, and the code pattern (dp) with the highest frequency of occurrence in the code of code length 2 is extracted.
It can be seen that kdt is larger than dpat in comparison with (at). It is understood that the size relationship has changed in the comparison between the cut-out 4-bit data (kdt) and the code pattern (dpat) having the highest occurrence frequency in the code having the code length of 4 by sequentially repeating this process. The value obtained by subtracting 1 from 4 in which the magnitude relationship has changed is determined as the code length.

The second bit extraction unit 44 cuts out a code from the MSB of the 16-bit code data by the code length (clen) and fills the remaining (16-clen) bits with "0" to obtain the 16-bit data in Table 4. It is output to (45) as an address. For example, if 1011011011101101 is input as 16-bit fixed-length code data, the code 101 is cut out as shown in FIG. 3D, and the address is 101000000000000.
0 is output to Table 4 (45). Table 4 (4
5) has a zero length (nnn) corresponding to a 16-bit code.
n2) and the group coefficient (ssss2) are stored, the zero length (nnnn2) is output to the coefficient expansion unit 46, and the group coefficient (ssss2) is output to the first bit extraction unit 4
1 to the coefficient expansion unit 46 and the adder 47. The adder 47 has a code length (c
len) and the group coefficient (ssss2) output from the table 4 (45) are added, and the result is output to the start address calculation unit 48 as clen2. Start address calculator 4
8 calculates the head bit position m = m + clen2, and outputs the head address m of the code to be read next to the first bit extraction unit 41. The first bit extraction unit 41 cuts out 16-bit code data from the head bit position output from the head address calculation unit 48 and outputs the code data to the comparison unit 42.

On the other hand, the first bit extracting unit 41 outputs the group coefficient (ssss2) output from the table 4 (45).
Is input, the code data for the group coefficient (ssss2) is cut out from the MSB side from the newly calculated head bit position, and is output to the coefficient expansion unit 46 as an additional bit (fk2). The coefficient expansion unit 46 uses the additional bits (fk2) output from the first bit extraction unit 41 and the table 4 (4
From the zero length (nnnn2) and the group coefficient (ssss2) output from (5), 64 quantized coefficients are obtained and output to the inverse quantization unit 20.

As described above, the variable length decoding unit 19
In Table 1, the decoding is performed by using the table 3 (43) for storing the code length and the code with the highest frequency of occurrence of the code length and the table 4 (45) for storing the zero length and the group coefficient. The tables required for the conversion can be a total of 524,288 bits. That is,
This is because the table 3 (43) is the same as the table 2 (23) shown in FIG. 2 and therefore can be shared with the variable length coding unit 16, and the capacity of the table 4 (45) is 2 ¹⁶ × 8 bits.

[Embodiment 2] The digital coding / decoding apparatus according to Embodiment 2 of the present invention has a schematic configuration and a variable-length coding section having an internal configuration as shown in FIG. 1 and FIG. The general configuration of the decoding / decoding device and the internal configuration of the variable length coding unit 16 are the same, and therefore detailed description will not be repeated.

FIG. 5 is a block diagram showing the configuration of the variable length decoding unit 19 in the second embodiment. The variable length decoding unit 19 includes a bit extraction unit 51 for extracting code data of a predetermined length, a comparison unit 52 for extracting a code length and a code occurrence frequency (chind) in the code length from the code data, and a comparison unit 52. Table 3 (43) referred to when the unit 52 extracts the code length and the frequency of occurrence, to output the cumulative number of codes having a code length shorter than the code length output from the comparison unit 52. Table 5 (54),
Table 6 (5) for outputting the zero length (nnnn2) and group coefficient (ssss2) corresponding to the code
5), zero length (nnnn2) and group coefficient (sssss)
2) and the additional bit (fk2) and a coefficient expansion unit 56 for obtaining 64 quantized coefficients, and a start address calculation unit 57 for calculating the start address of the code data of a predetermined length extracted by the bit extraction unit 51. , And adders 58 and 59
including.

First, the bit extraction unit 51 is the processor 1
16 bits are cut out from the first bit of the 16-bit 1-word compressed data string input from 8 and output to the comparison unit 52. The comparison unit 52 obtains the code length (clen) by the method described with reference to FIG. Further, the difference between the code (dpat) having the highest occurrence frequency used in the comparison and the cut-out data (kdt), that is, kdt-dpat
Is calculated and output to the adder 59 as the occurrence frequency (chind).

The table 5 (54) receives the code length (clen) output from the comparing section 52 as an address,
The cumulative number of coded elements up to the code length of (clen-1) is stored as data. That is, it outputs the number of occurrences of the code (dpat) having the highest occurrence frequency in the entire variable length code. For example, in FIG.
In the case of the code shown in (a), the data shown in FIG. 3 (c) is stored in the table 5 (54).

The adder 59 adds the cumulative number of codes output from the table 5 (54) and the occurrence frequency (chind) output from the comparator 52, and outputs the result to the table 6 (55) as an address. The table 6 (55) stores, as data, the group coefficient (ssss2) and the zero length (nnnnn2) in the order of the code having the shortest code length and the code having the highest frequency of occurrence of coding elements. That is, the frequency of occurrence in the entire variable length code is input as an address, and the group coefficient (ssss2) and zero length (nnnn2) corresponding to this frequency of occurrence are output.

The head address calculation unit 57 is the same as that of the first embodiment.
The head address is calculated by the same method as the head address calculation unit 48 described in 1 above and output to the bit extraction unit 51. The bit extraction unit 51 inputs the group coefficient (ssss2) output from the table 6 (55), and the group coefficient (sssss) from the newly calculated start bit position.
The code data for 2) is cut out from the MSB side and is output to the coefficient expansion unit 56 as an additional bit (fk2). The coefficient expansion unit 56 extracts 64 quantized coefficients from the additional bit (fk2) output from the bit extraction unit 51, the zero length (nnnn2) and the group coefficient (ssss2) output from the table 6 (55). It is obtained and output to the inverse quantization unit 20.

As described above, the variable length decoding unit 19
In, the cumulative number of codes with a code length shorter than the code length
Table 5 (54) for storing zero length and glue
Table 6 (55) that stores the coefficient
Therefore, reduce the total number of tables required for decoding.
You can That is, the capacity of the table 5 (54) is 2 ^Four
× 8 bits, table 6 (55) capacity is 2⁸× 9 bits
And is reduced to a total of 2,432 bits.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a digital encoding / decoding device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an internal configuration of a variable length coding unit 16 according to Embodiment 1 of the present invention.

FIG. 3A is a diagram showing an example of a Huffman code. (B) is a figure which shows an example of the content of the table 2 (23) of FIG. (C) is the table 5 (54) in FIG.
It is a figure which shows an example of the content of. (D) is a figure for demonstrating the determination of the code length in the comparison part 42 of FIG.

FIG. 4 is a block diagram showing a configuration of a variable length decoding unit 19 in the first embodiment.

FIG. 5 is a block diagram showing a configuration of a variable length decoding unit 19 in the second embodiment.

FIG. 6 is a diagram showing DCT quantized coefficients rearranged in a zigzag path order.

FIG. 7 is a diagram showing a configuration of a conventional digital encoding / decoding device.

FIG. 8A is a diagram showing a relationship between a group coefficient (ssss) and an additional coefficient. (B) is a figure which shows the quantization table used at the time of quantization.

FIG. 9 is a diagram showing a conventional encoding table and decoding table.

[Explanation of symbols]

11 DCT calculator 12 Quantizer 13 Quantization table 14 Zero length counter 15 Grouping part 16 Variable length coding unit 17 Fixed length part 18 processors 19 Variable length decoding unit 20 Dequantizer 21 IDCT operation unit 22 Table 1 23 Table 2 24,25,47,58,59 adder 41 First Bit Extractor 42 Comparison section 43 Table 3 44 Second Bit Extractor 45 Table 4 46,56 Coefficient expansion unit 48,57 Start address calculator 51-bit extractor 52 Comparison Department 54 Table 5 55 Table 6

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-8-84081 (JP, A) JP-A-8-56164 (JP, A) JP-A-7-212243 (JP, A) JP-A-6- 225156 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H03M 7/40 H03M 7/46 G11B 20/10 301 H04N 1/41

Claims (8)

(57) [Claims] 1. A conversion means for orthogonally transforming input data, an extraction means for extracting a zero length and a valence coefficient of the input data orthogonally transformed by the conversion means, and an extraction means for extracting the zero length and a valence coefficient. Based on the zero length and the value coefficient, the first output means for outputting the code length and the occurrence frequency of the code in the code length, and the code length output from the first output means. hand,
Second output means for outputting the code with the highest occurrence frequency among the codes of the code length; the occurrence frequency output from the first output means and the second
And a first adding means for adding the most frequently generated code output from the output means of. 2. The digital encoding device, wherein the extracting means includes zero length counting means for counting the zero length, and grouping means for converting the valued coefficients into group coefficients and additional bits. Further includes a second coefficient for adding the group coefficient converted by the grouping means and the code length output by the first output means.
And a fixed length conversion unit for converting the code added by the first addition unit and the additional bit converted by the grouping unit into a fixed length code and outputting the fixed length code.
The digital encoding device according to claim 1. 3. Code data extracting means for extracting code data having a predetermined bit length from a fixed length code, and code length extracting means for extracting code length from the code data extracted by the code data extracting means. A cutout unit for cutting out a code from the code data having the predetermined bit length based on the code length extracted by the code length extraction unit; and a zero length based on the code cut out by the cutout unit. And a third output means for outputting the group coefficient and the digital decoding device. 4. The code data extraction means, based on the code length extracted by the code length extraction means and the group coefficient output by the third output means, the head of the code data having the predetermined bit length. Calculate the address,
The digital decoding device according to claim 3. 5. The code length extracting means includes a fourth output means for outputting a code having the highest occurrence frequency among codes having a code length, and a first output of the code data extracted by the code data extracting means. 4. The digital decoding apparatus according to claim 3, further comprising: a deciding means for deciding a code length by comparing a plurality of bits of ## EQU1 ## with a code having the highest frequency of occurrence output by the fourth output means. 6. The digital decoding device according to claim 3, wherein said code data extracting means cuts out additional bits based on the group coefficient output by said third output means. 7. Code data extraction means for extracting code data of a predetermined bit length from a fixed length code, code length from the code data extracted by the code data extraction means, and frequency of occurrence of the code at the code length. Based on the code length extracted by the code length extraction means, a code length extraction means for extracting the Fifth for outputting
Output means, the occurrence frequency extracted by the code length extraction means, and the occurrence frequency rank in the entire variable length code of the code having the highest occurrence frequency among the codes of the code length output from the fifth output means, And a sixth output means for outputting the group coefficient and zero length based on 8. The digital according to claim 7, wherein the fifth output means outputs the cumulative number of codes having a code length shorter than the code length based on the code length extracted by the code length extraction means. Decoding device.