JP3375283B2 - Semiconductor device and circuit module including the same - Google Patents
Semiconductor device and circuit module including the sameInfo
- Publication number
- JP3375283B2 JP3375283B2 JP18697998A JP18697998A JP3375283B2 JP 3375283 B2 JP3375283 B2 JP 3375283B2 JP 18697998 A JP18697998 A JP 18697998A JP 18697998 A JP18697998 A JP 18697998A JP 3375283 B2 JP3375283 B2 JP 3375283B2
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- semiconductor device
- lead terminals
- circuit module
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
- H05K1/0256—Electrical insulation details, e.g. around high voltage areas
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【0001】[0001]
【産業上の利用分野】 この発明は、比較的高い直流電
圧を取り扱う半導体装置、特にその端子間の電気絶縁を
確保し得る構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device handling a relatively high DC voltage, and more particularly to a structure capable of ensuring electrical insulation between its terminals.
【0002】[0002]
【従来の技術】 例えば、人工衛星に搭載する進行波管
(TWT) 駆動用電源に用いられる整流器としては、複数直
列接続した高耐圧ダイオードを4個ブリッジに接続して
なる半導体装置が一般的である。この半導体装置は数kV
以上の直流高電圧を扱うにもかかわらず、小型で軽量で
あることが強く求められる。2. Description of the Related Art For example, a traveling wave tube mounted on an artificial satellite
(TWT) As a rectifier used for a driving power source, a semiconductor device in which a plurality of high voltage diodes connected in series are connected to four bridges is general. This semiconductor device is several kV
Despite handling the above DC high voltage, it is strongly demanded to be small and lightweight.
【0003】 このため、図4に示すようにかかる従来
の半導体装置では、高電圧ダイオードD1〜D4を4個
ほぼ正四角形のそれぞれの頂点に、互いに並行するよう
に配置して、内部リード線にてブリッジに結線すると共
に、外囲体1で被覆する前に外部リード端子2A〜2D
を結線部分にそれぞれ機械的にからめ、ハンダSにて固
定する。しかる後に、電気絶縁樹脂のような外囲体1に
よってそれらをモールドし、外囲体1の対向する一対の
短辺側面1Xに外部リード端子2A、2B、2C、2D
をそれぞれ導出している。導出された各外部リード端子
は、図5に示すようにプリント基板3側に折り曲げて適
当な長さに切断され、プリント基板3のスルーホール
(図示せず)を通してハンダ付けにより取り付けられて
いた。Therefore, in the conventional semiconductor device as shown in FIG. 4, four high-voltage diodes D1 to D4 are arranged at the respective apexes of a substantially regular quadrangle so as to be parallel to each other and are connected to the internal lead wires. External lead terminals 2A to 2D before being connected to the bridge and covered with the outer enclosure 1.
Are mechanically entangled in the connection parts and fixed with solder S. Thereafter, they are molded with an outer envelope 1 such as an electrically insulating resin, and the external lead terminals 2A, 2B, 2C, 2D are formed on a pair of short side surfaces 1X of the outer envelope 1 facing each other.
Are derived respectively. As shown in FIG. 5, each lead-out external lead terminal was bent to the printed board 3 side, cut into an appropriate length, and attached through a through hole (not shown) of the printed board 3 by soldering.
【0004】 ここで、外部リード端子2Aと2Bは直
流出力端子であり、外部リード端子2Cと2Dは交流入
力端子である。内部構造上から、外部リード端子2Aと
2Bはほぼ同一の高さで外囲体1から導出され、外部リ
ード端子2Cと2Dは高さは異なるが、左右方向のずれ
はない位置で外囲体1から導出され、外囲体1の外部に
て図5のように曲げられる。The external lead terminals 2A and 2B are DC output terminals, and the external lead terminals 2C and 2D are AC input terminals. From the internal structure, the outer lead terminals 2A and 2B are led out from the outer enclosure 1 at substantially the same height, and the outer lead terminals 2C and 2D have different heights, but the outer lead terminals 2C and 2D are not displaced in the left-right direction. 1 and is bent outside the envelope 1 as shown in FIG.
【0005】 また、半導体装置は勿論のこと、これを
搭載する回路モジュールにも非常に高い信頼性が求めら
れるために、前述のような半導体装置が回路モジュール
のプリント基板3に搭載された後に、半導体装置のすべ
ての外部リード端子2A〜2Dが露出しないように、特
定の樹脂などで少なくとも最も高い位置にある外部リー
ド端子2の根元部分からプリント基板3の表面までを電
気絶縁樹脂4でモールドすることが多い。また、図示し
ていないが、プリント基板3における外部リード端子2
A〜2Dのハンダ付け部分5も気中に露出されないよう
に電気絶縁樹脂4と同じ樹脂6でモールドすることも行
われる。Further, not only the semiconductor device but also the circuit module mounting the semiconductor device is required to have very high reliability. Therefore, after the semiconductor device as described above is mounted on the printed circuit board 3 of the circuit module, In order to prevent all of the external lead terminals 2A to 2D of the semiconductor device from being exposed, a portion of at least the highest position of the external lead terminal 2 from the root of the external lead terminal 2 to a surface of the printed circuit board 3 is molded with an electrically insulating resin 4 with a specific resin or the like. Often. Although not shown, the external lead terminals 2 on the printed circuit board 3 are also shown.
The soldering parts 5 of A to 2D are also molded with the same resin 6 as the electrically insulating resin 4 so as not to be exposed to the air.
【0006】[0006]
【発明が解決しようとする課題】 しかしかかる構造の
ものは、外部リード端子2A〜2Dの一部、例えば2C
が外囲体1のかなり上側から導出されているために、モ
ールド樹脂の量が多くなり、半導体装置を小型・軽量化
しても回路モジュールとしては軽量化されないという問
題があった。However, the one having such a structure has a part of the external lead terminals 2A to 2D, for example, 2C.
However, there is a problem that the amount of the molding resin is large and the semiconductor module is not lightened as a circuit module even if the semiconductor device is made smaller and lighter.
【0007】 また、半導体装置の外囲体1の下面をプ
リント基板3に接触させて樹脂モールドしているので、
外囲体1の下面とプリント基板3表面との間に多数のボ
イドが残留することになり、外部リード端子2Aと2B
との間の絶縁耐力が低下するという問題もあった。Further, since the lower surface of the outer enclosure 1 of the semiconductor device is brought into contact with the printed board 3 and resin-molded,
A large number of voids remain between the lower surface of the envelope 1 and the surface of the printed circuit board 3, and the external lead terminals 2A and 2B
There was also a problem that the dielectric strength between and was reduced.
【0008】 さらに、半導体装置の小型化が達成され
て、外部リード端子間の間隔が狭くなるほど、そのまま
外部リード端子をプリント基板3のスルーホールに挿入
すると、プリント基板3の表面における外部リード端子
間の沿面距離が短くなり、リーク電流の増大や電気絶縁
破壊を招く問題があった。Further, as the size of the semiconductor device is reduced and the distance between the external lead terminals becomes narrower, if the external lead terminals are directly inserted into the through holes of the printed circuit board 3, the external lead terminals on the surface of the printed circuit board 3 are separated. However, there was a problem that the creepage distance was shortened, causing an increase in leak current and electrical breakdown.
【0009】[0009]
【問題を解決するための手段】 前述のような課題を解
決するため、第1の発明では、一つ以上の半導体素子を
封止してなる外囲器の同一露出面から複数の外部リード
端子が導出された半導体装置において、前記外部リード
端子間の沿面距離を長くするための突起部を前記外部リ
ード端子間に形成すると共に、前記突起部が形成された
同一露出面に該突起部よりも背の高いストッパ部を備え
たことを特徴とする半導体装置を提供する。In order to solve the above-mentioned problems, in the first invention, a plurality of external lead terminals are formed from the same exposed surface of the envelope formed by sealing one or more semiconductor elements. In the semiconductor device derived from, the protrusions for increasing the creepage distance between the external lead terminals are formed between the external lead terminals, and the protrusions are formed on the same exposed surface more than the protrusions. A semiconductor device having a tall stopper portion is provided.
【0010】 前述のような課題を解決するため、第2
の発明では、一つ以上の半導体素子を封止してなる外囲
体の同一露出面から複数の外部リード端子が導出された
半導体装置において、ほぼ等間隔に互いに並行するよう
複数の高電圧ダイオードを配置して全波整流回路を構成
し、該全波整流回路の正電極、負電極、交流電極それぞ
れ外部リード端子を接続し、これら外部リード端子を一
方向に折り曲げ、その折り曲げ部分を外囲体で包囲し、
外部リード端子の導出された前記外囲体外面に突起部を
設けると共にそれよりも背の高いストッパ部を備えたこ
とを特徴とする半導体装置を提供する。In order to solve the above problems, the second
According to another aspect of the invention, in a semiconductor device in which a plurality of external lead terminals are led out from the same exposed surface of an enclosure that seals one or more semiconductor elements, a plurality of high voltage diodes are arranged so as to be parallel to each other at substantially equal intervals. To form a full-wave rectifier circuit, connect external lead terminals to the positive electrode, negative electrode, and AC electrode of the full-wave rectifier circuit, bend these external lead terminals in one direction, and surround the bent portion. Surrounded by the body,
There is provided a semiconductor device characterized in that a protrusion is provided on the outer surface of the outer body from which the external lead terminal is led out, and a stopper that is taller than the protrusion is provided.
【0011】 前述のような課題を解決するため、第3
の発明では、請求項1又は請求項2の半導体装置を備え
た回路モジュールにおいて、前記半導体装置の外部リー
ド端子が挿入され半田付けされるスルーホールとスルー
ホールとの間隔の狭いスルーホール間のプリント基板に
狭いスリットを設けて前記スルーホール間の沿面距離を
長くしたことを特徴とする回路モジュールを提供する。In order to solve the above problems, the third
According to another aspect of the present invention, in a circuit module including the semiconductor device according to claim 1 or 2, the external lead terminals of the semiconductor device are inserted and soldered between the through holes, and the printing between the through holes having a narrow gap between the through holes. Provided is a circuit module characterized in that a narrow slit is provided on a substrate to increase a creepage distance between the through holes.
【0012】 前述のような課題を解決するため、第4
の発明では、請求項1又は請求項2の半導体装置を備え
た回路モジュールにおいて、前記半導体装置の外部リー
ド端子が挿入され半田付けされるスルーホールとスルー
ホールとの間隔は前記外部リード端子の根元の間隔より
も広く、これら外部リード端子を拡げて前記スルーホー
ルに挿入したことを特徴とする回路モジュールを提供す
る。In order to solve the above problems, the fourth
According to another aspect of the present invention, in the circuit module including the semiconductor device according to claim 1 or 2, the distance between the through hole into which the external lead terminal of the semiconductor device is inserted and soldered is the root of the external lead terminal. A circuit module is provided in which the external lead terminals are widened and are inserted into the through-holes.
【0013】[0013]
【発明の実施の形態及び実施例】 図1乃至図3により
本発明にかかる半導体装置の一実施例を説明する。これ
ら図において、図4及び図5で用いた記号と同一の記号
は相当する部材を示すものとする。Embodiments and Examples of the Invention An embodiment of a semiconductor device according to the present invention will be described with reference to FIGS. In these figures, the same symbols as those used in FIGS. 4 and 5 indicate corresponding members.
【0014】 この半導体装置は図1から分かるよう
に、ダイオードD1〜D4の配置と接続構造は従来と同
じであるが、外部リード端子2A、2B、2C、2Dは
ハンダSでハンダ付けした後、一方向に折り曲げ、その
折り曲げ部分も含めて外囲体1で被覆する構造になって
いる。簡単に説明すると、図2(D)に示すように、複
数のダイオードペレットを積層し接着してなるガラスモ
ールドタイプのダイオードD1〜D4を4個ブリッジ構
成に接続して全波整流回路を構成し、その正電極2aに
接続された外部リード端子2A、負電極2bに接続され
た外部リード端子2B、交流電極2c、2dにそれぞれ
接続された外部リード端子2C、2Dを有する。これら
外部リード端子は外囲体1の底面からほぼ垂直に導出さ
れている。As can be seen from FIG. 1, this semiconductor device has the same arrangement and connection structure of the diodes D1 to D4 as the conventional one, but after the external lead terminals 2A, 2B, 2C and 2D are soldered with solder S, The structure is such that it is bent in one direction, and the bent portion is covered with the outer envelope 1. Briefly, as shown in FIG. 2D, a glass-wave type diode D1 to D4 formed by laminating and adhering a plurality of diode pellets is connected in a four-bridge structure to form a full-wave rectifier circuit. , An external lead terminal 2A connected to the positive electrode 2a, an external lead terminal 2B connected to the negative electrode 2b, and external lead terminals 2C and 2D connected to the AC electrodes 2c and 2d, respectively. These external lead terminals are led out substantially vertically from the bottom surface of the outer envelope 1.
【0015】 外部リード端子2Aと2B間,2Cと2
D間は、小型軽量化という制約から外部リード端子2A
と2C間、2Bと2D間よりも狭くなっており、電気絶
縁の面から不安がある。したがって、外部リード端子2
Aと2B間,2Cと2D間の沿面距離を大きくして電気
絶縁距離を確保するため、それらの間に突起部1A、1
Bを形成した。また、外囲体1の底面中央に短円筒状の
ストッパ部1Cを形成した。これは沿面距離拡大用の突
起部1A、1Bの高さよりも高くなっており、外囲体1
をプリント基板3に搭載するとき、沿面距離拡大用の突
起部1A、1Bがプリント基板3に接触しないようなス
トッパ機能を果たす。突起部1A、1Bとストッパ部1
Cとの高さの差は、突起部1A、1Bとプリント基板3
との間にモールド樹脂が容易に流れ込む程度の間隔が開
けば良い。Between the external lead terminals 2A and 2B, 2C and 2
Between D, the external lead terminal 2A is used due to the restriction of size and weight reduction.
It is narrower between 2C and 2C than between 2B and 2D, and there is concern about electrical insulation. Therefore, the external lead terminal 2
In order to increase the creepage distance between A and 2B and between 2C and 2D to secure the electrical insulation distance, the protrusions 1A, 1
B was formed. Further, a stopper portion 1C having a short cylindrical shape is formed at the center of the bottom surface of the outer envelope 1. This is higher than the height of the protrusions 1A and 1B for increasing the creepage distance, and
When mounted on the printed circuit board 3, the projections 1A and 1B for increasing the creepage distance serve as a stopper function so as not to contact the printed circuit board 3. Protrusions 1A and 1B and stopper 1
The difference in height from C is that the protrusions 1A and 1B and the printed circuit board 3
A space may be provided between and so that the mold resin easily flows.
【0016】 また、この実施例ではプリント基板3の
スルーホールに外部リード端子2A〜2Dを挿入し、は
んだ付けしたときにプリント基板3における外部リード
端子2Aと2B間及び2Cと2D間の沿面距離が短くな
り、電気絶縁上での不安があるために、外部リード端子
2Aと2B間,2Cと2D間に対応するプリント基板3
に細長い透孔であるスリット3Aを形成してある。Further, in this embodiment, when the external lead terminals 2A to 2D are inserted into the through holes of the printed board 3 and soldered, the creepage distances between the external lead terminals 2A and 2B and between the external lead terminals 2C and 2D on the printed board 3 are measured. Is shortened and there is concern about electrical insulation. Therefore, the printed circuit board 3 corresponding to between the external lead terminals 2A and 2B and between 2C and 2D is used.
A slit 3A, which is a long and narrow through hole, is formed in the.
【0017】 図2はプリント基板3にこの半導体装置
を搭載した例を示す。この図からも分かるように、プリ
ント基板3の表面にはストッパ部1Cが当接し、プリン
ト基板3の表面と沿面距離拡大用の突起部1A、1Bと
の間には隙間が形成されており、外部リード端子2A〜
2Dが露出しないように半導体装置の下部からプリント
基板3面までを電気絶縁樹脂4でモールドするとき、プ
リント基板3の表面と沿面距離拡大用の突起部1A、1
Bとの間に電気絶縁樹脂4が容易に入り込むので、従来
のようなボイドがそれらの間に形成されない。したがっ
て、外部リード端子2Aと2B間,2Cと2D間には所
期の電気絶縁が得られる。FIG. 2 shows an example in which this semiconductor device is mounted on the printed circuit board 3. As can be seen from this figure, the stopper portion 1C abuts on the surface of the printed board 3, and a gap is formed between the surface of the printed board 3 and the projections 1A and 1B for increasing the creepage distance. External lead terminal 2A ~
When the lower part of the semiconductor device and the surface of the printed circuit board 3 are molded with the electrically insulating resin 4 so that the 2D is not exposed, the surface of the printed circuit board 3 and the protrusions 1A, 1
Since the electrically insulating resin 4 easily enters into the gap between B and B, a void unlike the conventional case is not formed between them. Therefore, desired electrical insulation can be obtained between the external lead terminals 2A and 2B and between the external lead terminals 2C and 2D.
【0018】 以上の実施例では、沿面距離拡大用の突
起部1A、1Bを直線状のものにしたが、外部リード端
子2A〜2Dをそれぞれ囲むリング状の突起部、あるい
は波状などそれら外部リード端子間の沿面を増大させる
構造ならば特に形状を制限するものではない。In the above embodiments, the protrusions 1A and 1B for increasing the creepage distance are linear, but the ring-shaped protrusions respectively surrounding the external lead terminals 2A to 2D, or the external lead terminals such as wavy ones. The shape is not particularly limited as long as it is a structure that increases the creepage between them.
【0019】 また、同様にストッパ機能を行うストッ
パ部1Cも外部リード端子間の沿面距離を低減しない限
り、外囲体1の底面における設置箇所、大きさ、個数、
形状などを制限するものではなく、同じ高さのものを複
数個設けてももちろん良い。Similarly, the stopper portion 1C that also performs the stopper function, unless the creepage distance between the external lead terminals is reduced, is set on the bottom surface of the outer envelope 1, the size, the number,
The shape and the like are not limited, and it is of course possible to provide a plurality of pieces having the same height.
【0020】 プリント基板3のスリットは必ずしも必
要ではなく、プリント基板3のスルーホール間隔を所望
の電気絶縁が確保できる程度に拡げて形成し、外部リー
ド端子2A〜2Dの間隔を拡げてスルーホールに挿入し
てももちろん良い。さらに、実施例では整流用ダイオー
ドについて述べたが、数kV以上の比較的高電圧を扱う
半導体装置については、同様に本発明を適用することが
できる。The slits of the printed circuit board 3 are not always necessary, and the through hole intervals of the printed circuit board 3 are formed to be wide enough to ensure desired electrical insulation, and the intervals of the external lead terminals 2A to 2D are expanded to form the through holes. Of course you can insert it. Further, although the rectifying diode is described in the embodiments, the present invention can be similarly applied to a semiconductor device that handles a relatively high voltage of several kV or more.
【0021】[0021]
【発明の効果】 以上述べたようにこの発明では、比較
的高電圧を取り扱う半導体装置を小型化した場合にも外
部リード端子間の電気絶縁距離を十分に確保でき、しか
も外部リード端子が露出しないように外部リード端子と
これを取り付けるプリント基板間を樹脂などでモールド
した場合にも、半導体装置の外囲体の突起とプリント基
板間にボイドができないので電気絶縁性を確保できる。As described above, according to the present invention, the electrical insulation distance between the external lead terminals can be sufficiently secured even when the semiconductor device handling a relatively high voltage is downsized, and the external lead terminals are not exposed. Even when the external lead terminal and the printed circuit board to which the external lead terminal is mounted are molded with resin or the like as described above, voids are not formed between the projection of the outer casing of the semiconductor device and the printed circuit board, so that electrical insulation can be ensured.
【図1】 本発明の半導体装置を説明するための図であ
る。FIG. 1 is a diagram illustrating a semiconductor device of the present invention.
【図2】 本発明の実施例にかかる半導体装置を示す図
である。FIG. 2 is a diagram showing a semiconductor device according to an example of the invention.
【図3】 本発明の実施例にかかる回路モジュールを示
す図である。FIG. 3 is a diagram showing a circuit module according to an embodiment of the present invention.
【図4】 従来の半導体装置を示す図である。FIG. 4 is a diagram showing a conventional semiconductor device.
【図5】 従来の回路モジュールを示す図である。FIG. 5 is a diagram showing a conventional circuit module.
1・・・半導体装置の外囲体 1A、1B・・・半導体装置の底面に形成された突起部 1C・・・ストッパ部 2・・・外部リード端子 3・・・プリント基板 4、6・・・接触防止用シート 5・・・はんだ D1〜D4・・・ダイオード 1 ... Enclosure of semiconductor device 1A, 1B ... Protrusions formed on the bottom surface of the semiconductor device 1C ... Stopper 2 External lead terminal 3 ... Printed circuit board 4, 6 ... Contact prevention sheet 5 ... Solder D1-D4 ... Diode
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭50−79268(JP,A) 特開 昭54−159867(JP,A) 特開 昭63−18653(JP,A) 特開 平5−235501(JP,A) 特開 平8−97333(JP,A) 特開 平6−45478(JP,A) 実開 昭59−173372(JP,U) 実開 昭62−140744(JP,U) (58)調査した分野(Int.Cl.7,DB名) H01L 23/28 H01L 25/04 H01L 25/18 H05K 1/18 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-50-79268 (JP, A) JP-A-54-159867 (JP, A) JP-A-63-18653 (JP, A) JP-A-5- 235501 (JP, A) JP-A-8-97333 (JP, A) JP-A-6-45478 (JP, A) Actual opening Sho 59-173372 (JP, U) Actual opening Sho 62-140744 (JP, U) (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 23/28 H01L 25/04 H01L 25/18 H05K 1/18
Claims (4)
囲器の同一露出面から複数の外部リード端子が導出され
た半導体装置において、前記外部リード端子間の沿面距
離を長くするための突起部を前記外部リード端子間に形
成すると共に、前記突起部が形成された同一露出面に該
突起部よりも背の高いストッパ部を備えたことを特徴と
する半導体装置。1. In a semiconductor device in which a plurality of external lead terminals are led out from the same exposed surface of an envelope formed by encapsulating one or more semiconductor elements, a creeping distance between the external lead terminals is increased. The semiconductor device is characterized in that the protrusion is formed between the external lead terminals, and a stopper portion that is taller than the protrusion is provided on the same exposed surface on which the protrusion is formed.
囲体の同一露出面から複数の外部リード端子が導出され
た半導体装置において、ほぼ等間隔に互いに並行するよ
う複数の高電圧ダイオードを配置して全波整流回路を構
成し、該全波整流回路の正電極、負電極、交流電極それ
ぞれ外部リード端子を接続し、これら外部リード端子を
一方向に折り曲げ、その折り曲げ部分を外囲体で包囲
し、外部リード端子の導出された前記外囲体外面に突起
部を設けると共にそれよりも背の高いストッパ部を備え
たことを特徴とする半導体装置。2. In a semiconductor device in which a plurality of external lead terminals are led out from the same exposed surface of an enclosure that seals one or more semiconductor elements, a plurality of high voltages are arranged so as to be parallel to each other at substantially equal intervals. A diode is arranged to form a full-wave rectifier circuit, the positive electrode, the negative electrode, and the AC electrode of the full-wave rectifier circuit are connected to external lead terminals, respectively, and these external lead terminals are bent in one direction, and the bent portion is outside. A semiconductor device which is surrounded by an enclosure and is provided with a protruding portion on the outer surface of the outer enclosure from which the external lead terminals are led out, and a stopper portion which is taller than the protruding portion.
体装置を備えた回路モジュールにおいて、前記半導体装
置の外部リード端子が挿入され半田付けされるスルーホ
ールとスルーホールとの間隔の狭いスルーホール間のプ
リント基板に狭いスリットを設けて前記スルーホール間
の沿面距離を長くしたことを特徴とする回路モジュー
ル。3. A circuit module comprising the semiconductor device according to claim 1 or 2, wherein an external lead terminal of the semiconductor device is inserted and soldered, and a through hole having a narrow gap between the through holes. A circuit module characterized in that a narrow slit is provided on a printed circuit board between the holes to increase a creepage distance between the through holes.
導体装置を備えた回路モジュールにおいて、前記半導体
装置の外部リード端子が挿入され半田付けされるスルー
ホールとスルーホールとの間隔は前記外部リード端子の
根元の間隔よりも広く、これら外部リード端子を拡げて
前記スルーホールに挿入したことを特徴とする回路モジ
ュール。4. A circuit module comprising the semiconductor device according to claim 1 or 2, wherein an external lead terminal of the semiconductor device is inserted and soldered, and the distance between the through holes is the above. A circuit module characterized in that the external lead terminals are wider than the roots and are inserted into the through holes by expanding these external lead terminals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18697998A JP3375283B2 (en) | 1998-06-17 | 1998-06-17 | Semiconductor device and circuit module including the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18697998A JP3375283B2 (en) | 1998-06-17 | 1998-06-17 | Semiconductor device and circuit module including the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000012742A JP2000012742A (en) | 2000-01-14 |
| JP3375283B2 true JP3375283B2 (en) | 2003-02-10 |
Family
ID=16198086
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18697998A Expired - Fee Related JP3375283B2 (en) | 1998-06-17 | 1998-06-17 | Semiconductor device and circuit module including the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3375283B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5067437B2 (en) * | 2010-03-19 | 2012-11-07 | 株式会社安川電機 | Electronic component mounting structure, power conversion device using the mounting structure, and electronic component mounting method |
| JP6539998B2 (en) * | 2014-11-26 | 2019-07-10 | 富士電機株式会社 | Semiconductor power converter |
-
1998
- 1998-06-17 JP JP18697998A patent/JP3375283B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000012742A (en) | 2000-01-14 |
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