JP3375878B2 - Measuring device and control method therefor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a measuring device provided with a DRAM and a control method thereof, and more particularly to a measuring device having a small fluctuation rate of power consumption due to a writing / reading operation of the DRAM and suppressing changes in the power consumption thereof. On how to do.

[0002]

2. Description of the Related Art DRAM (Dynamic Random-Access)
Memory) is used as a high-density, low-power consumption write / read semiconductor memory in various devices and apparatuses in addition to computer systems.

The relationship between the drive signal supplied to the DRAM and the power consumption thereby will be described with reference to FIG.

FIG. 3 shows a DRAM having four memory systems.
FIG. 6 is a waveform diagram for explaining a relationship between a drive signal of a DRAM and power consumption due to the drive signal in an example of a measuring device including the above. That is, FIG. 3A shows the waveform of the drive signal supplied to the memory system 1 among the four memory systems,
FIG. 3B shows the waveform of the drive signal supplied to the memory system 2. Further, FIG. 3C shows the transition of the power consumption of this DRAM.

Since the DRAM is volatile, a refresh period is set when the DRAM is not in operation, and a refresh signal is periodically supplied within the refresh period to retain the memory contents. When the DRAM is composed of a plurality of memory systems, only one of them is selected at the time of operation, but the refresh is performed by simultaneously applying a predetermined number of refresh pulses to all the memory systems within the refresh period. By supplying.

As shown in FIGS. 3A and 3B, in both the memory systems 1 and 2, the refresh pulse Pr is supplied three times within the refresh period Tr at equal intervals Tm. Regarding the memory system 1, the operation signal Po of the cycle T1 is supplied five times in the operation period To after the refresh period, whereby data writing or data reading is performed with respect to the memory system 1.

As described above, during operation, a large number of operation signals Po are supplied within a short operation period, whereas during a refresh period much longer than the operation period, power consumption of DRAM is reduced. Therefore, the data is held by supplying the fresh signal a required minimum number of times. Therefore, the power consumption of these drive signals is
There will be a large difference between the time of operation and the time of non-operation.

FIG. 3C shows the power consumption P of this DRAM.
It shows the transition of. As shown in the figure, in the refresh period Tr, the average power consumption is Wa, whereas in the operation period To, the power consumption becomes Wo, and the power consumption changes rapidly. Such a drastic change in power consumption is not a particular problem for a computer system or the like that is composed of only digital circuits.

[0009]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
As the use of M expands, not only digital circuits but also digital / analog mixed circuits will be equipped with DRAMs. Such a drastic change in power consumption causes a large change in the current value flowing in the analog circuits. This may affect the analog circuit, resulting in malfunction of the device.

[0010] For example, recently, studies have been actively conducted to search for a new information processing method by visualizing brain / nerve activity. This is because of the discovery of a less toxic dye (called voltage-sensitive dye) whose fluorescence and absorptance change in proportion to the membrane potential of nerve activity. The nerve activity is analyzed by irradiating the axon with light, imaging the light that has passed through it with a CCD area sensor, and amplifying the obtained image signal to measure a weak change in light intensity. Even with such a device for measuring an imaged signal of brain / nerve activity, a large-capacity DRA is used as a memory for storing enormous measurement data.
Mounting of M is desired. Here, the change rate of light intensity corresponding to the nerve excitation of the voltage-sensitive dye is about 0.1% at the most. Therefore, in a measuring device that converts such a weak change into an image signal and processes it, for example, if a large current change occurs in the analog signal amplifier circuit, an erroneous measurement result may be output. There was a problem.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a precise measuring device and a control method therefor in which the rate of change in the power consumption of the DRAM is small and which operates stably as a whole. Especially.

[0012]

The present invention solves the above problems by the following means.

That is, according to the present invention (Claim 1), a measuring means for detecting desired data from a measurement object and outputting a measurement signal, a measurement processing circuit for processing the measurement signal, and the measurement signal A dynamic write / read memory (DRAM) for storing detection data based on the above, and a refresh period for supplying the DRAM with a refresh signal for holding the stored content within a refresh period, which is narrower than the minimum required interval for holding the stored content. Provided is a measuring device including a memory drive circuit that generates the refresh signal at intervals and supplies the refresh signal to the DRAM.

According to the present invention (Claim 3), measuring means for detecting desired data from the object to be measured and outputting a measurement signal, a measurement processing circuit for processing the measurement signal, and the measurement signal A dynamic write / read memory (DRAM) for storing detection data based on the above, and a refresh signal for holding the stored contents of the DRAM are generated to generate the D
The DRA is used in a measuring device provided with a memory drive circuit for supplying to the RAM, and the refresh signal is provided at a narrower interval than the minimum required interval for retaining the memory of the DRAM.
A method of controlling a measuring device for supplying to M is provided.

When the DRAM is composed of a plurality of memory systems, it is desirable that the refresh signal be supplied to the DRAM at an interval obtained by dividing the minimum required interval for holding the stored contents by the number of the memory systems. .

[0016]

DETAILED DESCRIPTION OF THE INVENTION Some embodiments of the present invention will be described below with reference to the drawings. In each of the following drawings, the same parts as those in FIG. 3 are designated by the same reference numerals and the description thereof will be omitted.

According to the present invention, when the DRAM is not in operation, the refresh signal is supplied to all the memory systems at intervals narrower than the minimum required for data retention, thereby increasing the power consumption in the non-operation. Therefore, the feature is that the change in the power consumption of the entire DRAM is suppressed.

FIG. 1 is a waveform diagram for explaining one embodiment of the control method of the measuring device according to the present embodiment.

That is, FIGS. 1 (a) and 1 (b) show waveforms of drive signals supplied to the memory systems 1 and 2 in a measuring device equipped with a DRAM consisting of four systems of memories, respectively. 1 (c) is a DRAM based on this drive signal
Shows the change in power consumption of.

As can be seen from the comparison with FIG. 3, a large number of refresh signals Pr are supplied within the refresh period Tr in both the memory systems 1 and 2. In FIG. 3, the refresh signal Pr is supplied only three times at intervals of Tm in the refresh period Tr, but in the present embodiment, the refresh signal Pr is supplied 12 times in the same refresh period Tr. . The best result can be obtained by setting the interval at which the refresh signal Pr is supplied to be the interval at which the minimum required for holding the stored contents is divided by the number of the memory system to be mounted.

That is, assuming that the minimum required interval for holding the stored contents is Tm (see FIG. 3) and the number of memory systems is n, the optimum interval Tb for refresh signal supply according to the present invention is Tb = Tm / given by n.

In the present embodiment, as shown in FIG.
As shown in (b), it can be seen that the refresh signal Pr is supplied 12 times within the refresh period Tr at the optimum interval of T2 = Tm / 4.

FIG. 1C is a waveform diagram showing the transition of the power consumption of the DRAM by the control method of the measuring device according to this embodiment.

As shown in the figure, the refresh period Tr
The electric power P is Wb (> Wa), and the difference from the electric power Wo at the time of access by the operation signal of the period T1 is extremely small.

As described above, by supplying the refresh signal to all the memory systems at an interval narrower than the minimum interval required to hold the memory contents when the memory is not operating, the DRA
The change in the power consumption of M can be suppressed. In particular, in the present embodiment, the refresh signal Pr is provided at intervals T2 obtained by dividing the interval Tm, which is the minimum required to hold the memory contents, by the number 4 of the memory systems in which the memory contents are mounted, during the refresh period.
Therefore, the change in the power consumption of the DRAM, and thus the entire measuring device, is extremely small.

Next, an embodiment of the measuring device according to the present invention will be described with reference to the drawings.

FIG. 2 is a block diagram showing the basic configuration of an embodiment of the measuring apparatus according to the present invention.

The measuring device 10 shown in the figure has a measuring means 30 for detecting data based on a minute analog signal from a measuring object, a processing device 20 for processing the measured data supplied from the measuring means 30, An input means 40 for supplying an operation signal to the processing device 20 is provided.

The processing device 20 performs various processing on the output signal of the analog circuit 70 for amplifying the measurement data and the like, the DRAM 50 which is a memory of a plurality of systems for storing the measurement data, and the analog circuit 70. DRAM5
0, and a digital circuit 60 for supplying a drive signal. The digital circuit 60 generates a refresh signal based on the control method of the above-described embodiment to generate a DRAM.
Supply 50. That is, the digital circuit 60
An operation signal for writing / reading data to / from the RAM 50 is supplied, and during the non-operation refresh period,
The refresh signal is supplied at an interval divided by the number of memory systems equipped with the minimum required interval for holding the stored contents.

Therefore, according to the measuring apparatus 10 according to the present embodiment, the change in the power consumption of the DRAM 50 as a whole is suppressed, so that the change in the current supplied to the analog circuit 70 can be suppressed. Thereby, even if the measurement data detected by the measuring means 30 is a small signal, accurate measurement can be performed.

[0031]

As described above in detail, the present invention has the following effects.

That is, according to the control method of the measuring device of the present invention, the refresh signal is DR at a narrower interval than the minimum necessary interval for holding the stored content within the refresh period.
Since it is supplied to the AM, the rate of change in the power consumption of the entire DRAM can be reduced. As a result, it is possible to suppress the influence on other circuits, particularly analog circuits.

Further, when the refresh signal is supplied at an interval obtained by dividing the minimum required interval for holding the stored contents by the number of memory systems to be mounted, the difference between the power consumption during operation and the power consumption during refresh is calculated. Can be extremely small. As a result, the rate of change in the power consumption of the DRAM is suppressed to the minimum, so that the change in the current supplied to other circuits, particularly the analog circuit, is suppressed. As a result, it is possible to prevent malfunction of the measuring device and stably perform accurate processing of the measurement result.

Further, according to the measuring device of the present invention, the memory drive circuit for supplying the refresh signal to the DRAM is provided at a narrower interval than the minimum required interval for holding the stored contents during the refresh period. The rate of change in power consumption of the entire DRAM can be suppressed. This provides a measuring device that operates accurately.

Further, when the memory drive circuit supplies the refresh signal at an interval divided by the number of the memory system in which the minimum required interval for holding the stored contents is divided, the rate of change in the power consumption of the entire DRAM is calculated. It can be suppressed significantly. This suppresses a change in current supplied to other circuits, particularly an analog circuit, so that a precise measurement device capable of performing accurate processing on a measurement result without causing a malfunction is supplied.

[Brief description of drawings]

FIG. 1 is a waveform diagram for explaining an embodiment of a control method for a measuring device according to the present invention. That is, FIG. 1 (a)
Shows the waveform of the drive signal supplied to the memory system 1, and FIG. 1B shows the waveform of the drive signal supplied to the memory system 2. Further, FIG. 1C shows the transition of the power consumption of the entire DRAM.

FIG. 2 is a block diagram showing a basic configuration of an embodiment of a measuring apparatus according to the present invention.

FIG. 3 is a DR including a plurality of systems of memory according to a conventional technique.
It is a wave form diagram for explaining the control method of AM. That is,
FIG. 3A shows the waveform of the drive signal supplied to the memory system 1, and FIG. 3B shows the waveform of the drive signal supplied to the memory system 2. Further, FIG. 3C shows the transition of the power consumption of the entire DRAM.

[Explanation of symbols]

10 Measuring device 20 processing equipment 30 Measuring means 40 Input means 50 DRAM 60 digital circuits 70 analog circuit Tm Minimum period required to retain memory contents of DRAM To operation period Tr refresh period Po motion signal Pr refresh signal

Claims (4)

(57) [Claims] 1. A measuring means for detecting desired data from a measurement object and outputting a measurement signal, a measurement processing circuit for processing the measurement signal, and a dynamic write / read memory for storing detection data based on the measurement signal ( DRAM) and the refresh signal is generated at a narrower interval than the minimum required interval for holding the stored content within a refresh period in which a refresh signal for holding the stored content is supplied to the DRAM. And a memory drive circuit for supplying to the measuring device. 2. The DRAM comprises a plurality of memory systems, and the memory drive circuit outputs the refresh signal to the DRAM at intervals that are a minimum required interval for holding the stored contents divided by the number of the memory systems. The measuring device according to claim 1, further comprising: 3. A measuring means for detecting desired data from a measurement object and outputting a measurement signal, a measurement processing circuit for processing the measurement signal, and a dynamic write / read memory for storing detection data based on the measurement signal ( DRAM),
It is used in a measuring device provided with a memory drive circuit which generates a refresh signal for retaining the memory content of the DRAM and supplies the refresh signal to the DRAM, and the refresh signal is more than a minimum interval required for retaining the memory of the DRAM. A method for controlling a measuring device that supplies the DRAM at narrow intervals. 4. The DRAM comprises a plurality of memory systems, and the refresh signal is supplied to the DRAM at intervals that are a minimum required interval for holding the stored contents divided by the number of the memory systems. The method for controlling a measuring device according to claim 3, which is characterized in that.