JP3376245B2 - Semiconductor switching device, semiconductor stack device and power conversion device using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor switching device having a gate electrode and a gate driver for supplying a turn-off current between a gate electrode and a cathode electrode of the semiconductor switching device via a current path. The present invention relates to a switching device, a semiconductor stack device and a power conversion device using the semiconductor switching device.

[0002]

FIG. 31 shows an example of a circuit configuration of a conventional semiconductor switching device. In the figure, reference numeral 3
P is a semiconductor switching element, here it is a GTO (gate turn-off thyristor). GT
A gate driver 4P that generates a gate turn-on control current I _GP is connected between the gate and the cathode of O3P, and the driver 4P applies the gate turn-on control current I _GP to the gate of the GTO 3P, thereby allowing GT
Turn on O3P. Furthermore, the driver 4P is
A gate reverse current I _GQP given with a current change rate dI _GQP / dt of 20 to 50 A / μs is applied from the gate to the cathode. The gate reverse current I _GQP is a shunt of the anode current I _AP . At this time, the turn-off gain has a value within the range of 2 to 5, and the GTO 3P turns off.

Further, the voltage V between the anode electrode and the cathode electrode
_A snubber circuit is generally used to suppress the rate of increase in _AKP (dV _AKP / dt) and the surge voltage. Here, the snubber circuit is configured as follows. That is, the snubber capacitor Cs and the snubber diode D _S are connected in parallel to the GTO 3P, and the snubber resistor R _S causes the snubber diode R _S to discharge the charge stored in the snubber capacitor Cs when the GTO 3P is turned off. It is connected in parallel to D _S.

Further, the inductance 1P is the rate of increase dI of the anode current I _AP flowing when the GTO 3P is turned on.
_AP / dt is to be suppressed to 1000 A / μs or less, and the free wheeling diode 2P connected in parallel with the inductance 1P is to return the energy generated in the inductance 1P when the GTO 3P is turned off.

The inductance Ls is the stray inductance of the wiring of the snubber circuit.

A measured waveform obtained by performing a turn-off test on the circuit of the semiconductor switching device described above is
It shows in FIG. In the figure, waveforms C1P, C2P, and C3P are waveforms showing the anode current I _AP , the voltage V _AKP between the anode electrode and the cathode electrode, and the gate reverse current I _GQP , respectively, and the horizontal axis is the time axis.

In FIG. 32, at time tP1, GTO3
P is in the turn-on state and the gate reverse current I _GQP is in the 0 state. At this time, the rate of increase d of the gate reverse current I _GQP
The gate reverse current I _GQP is raised with the absolute value of I _GQP / dt set to 20 to 50 A / μs, and the turn-off gain (absolute value of the ratio given by the anode current I _AP / gate reverse current I _GQP ) of the GTO3P itself is measured. When the turn-off gain reaches the threshold value (time tP2), the anode current I _AP begins to decrease, and the voltage V between the anode electrode and the cathode electrode of the GTO 3P becomes V.
_AKP begins to rise. At this time, the current I _S also flows out to the snubber circuit side described above, and a voltage is generated by the rate of increase of this current I _S and the inductance (snubber inductance) Ls of the snubber circuit. This voltage is generated between the anode electrode and the cathode electrode. As a result of being superimposed on the voltage V _AKP , a spike voltage V _DSP is generated (time tP3). This spike voltage V _DSP causes power loss. For example, about 40
When a current of 00A flows, the power loss becomes several MW. Therefore, it is necessary to suppress this spike voltage V _DSP to a value as low as possible, and efforts have been continued to reduce the snubber inductance L _S than before.

Further, the rate of increase dV _AKP / d of the voltage V _AKP between the anode electrode and the cathode electrode after the spike voltage V _DSP is generated.
t changes abruptly, the maximum value is generated in the anode current I _AP (time tP4), and after that, the tail current is generated. Therefore, by the product of this tail current and the voltage V _AKP ,
Further power loss occurs. The voltage V _AKP is
At time tP5, the peak voltage is reached. After that,
The voltage V _AKP reaches the power supply voltage V _DD .

Therefore, such a rate of increase dV _AKP / dt
In order to suppress the above, the snubber capacitor C _{S described} above is required. The capacitance value is represented by I _AP / (dV _AKP / dt), and is usually selected so as to satisfy the relational expression of dV _AKP / dt ≦ 1000 V / μs.

33 and 34 show the GTO3P used in the conventional semiconductor switching device shown in FIG.
(The structure is roughly divided into a GTO element package and two stack electrodes), and both figures are shown including a gate driver 4P. 33 shows a side view of the GTO 3P viewed from the arrow direction DP2 shown in FIG. 34, but only a part thereof is shown in a sectional view form. Also, FIG.
FIG. 34 is a plan view of a portion excluding the stack electrode 27Pa when the GTO 3P is viewed from the arrow direction DP1 shown in FIG. 33.

In both FIGS. 33 and 34, the reference numerals indicate the following members. That is, 20P is a GTO element, 4PL is an internal inductance of the gate driver 4P, and 21P and 22P are a gate external lead (gate lead-out wire) and a cathode external lead (gate lead wire) each of which is a coaxial shield wire or twisted lead wire. (Cathode extraction line). Then, the gate terminal 25P of the GTO element 20P and one end of the gate external lead 21P are welded or soldered to the metallic connecting member 23P or are fitted to each other to integrate the two 25P and 21P, and The cathode terminal 26P and one end of the cathode external lead 22P are welded, soldered, or fitted to the metallic connecting member 24P to integrate the two 26P and 22P. As a result, both terminals 25P and 26P are connected to the gate driver 4P via the leads 21P and 22P, respectively.

Reference numerals 27Pa and 27Pb are stack electrodes for pressing the GTO element 20P.

Reference numeral 28P is a semiconductor substrate on which a GTO segment is formed, and the gate electrode 2 of A1 (aluminum) is formed on the outermost peripheral portion of the upper surface of the semiconductor substrate 28P.
9 Pa is formed, and a cathode electrode 29Pb is formed corresponding to each segment on the upper surface inside the gate electrode 29Pa. Also, 30P and 31P
Are cathode strain buffer plates and cathode post electrodes, which are sequentially stacked and arranged on the upper surface of the cathode electrode 29Pb on the upper surface of the semiconductor substrate 28P, respectively,
32P and 33P are anode electrodes (not shown) formed on the back surface of the semiconductor substrate 28P (in the back surface,
The cathode electrode 29Pb is an anode strain buffer plate and an anode post electrode, which are sequentially stacked on a surface located on the opposite side).

Further, 34P is a ring-shaped gate electrode which is in contact with the upper surface of the gate electrode 29Pa of the semiconductor substrate 28P and 3
5P is a ring-shaped gate electrode 3 via an annular insulator 36P.
Disc spring for pressing 4P against the gate electrode 29Pa, 37P
The ring-shaped gate electrode 34P to the cathode strain buffer plate 30.
38P is an insulating sheet for insulating from P and the post electrode 31P. One end of 38P is the ring-shaped gate electrode 34.
P is a gate lead fixed to P by brazing or welding and the other end is electrically connected to the gate terminal 25P. One of 39P is fixed to the cathode post electrode 31P and the other end is the cathode terminal 26P. 40P is a second flange whose one end is fixed to the anode post electrode 33P, and 41P is a projection in which the gate terminal 25P is arranged on the inner surface of the opening. Both ends 43P are insulating cylinders having a portion 42P and projecting from the upper and lower surfaces of the insulating cylinder 41P.
a and 43Pb are the first and second flanges 39P, respectively.
And 40P are airtightly fixed, which allows GTO
The element 20P has a sealed structure.

[0015]

The conventional semiconductor switching devices are roughly divided into two problems.

(1) First, as shown in FIG. 34, the first is that the lead 21P for taking out the gate reverse current is taken out from a local portion of the ring-shaped gate electrode 34P. is there. Therefore, the gate reverse current is taken out in one direction. As a result, at turn off,
The non-uniformity of the cathode current occurs, and the power loss such as the spike loss and the loss due to the tail current described above is locally concentrated on a part of the cathode surface inside the GTO, and the local temperature rise causes each element of the GTO. Also, there is a high probability that each segment will be destroyed and brought into conduction, resulting in a failure in turn-off, resulting in a problem with the reliability of the device.

This point is schematically explained with a plan view of the GTO element of FIG. 35 and a sectional view of the GTO element of FIG. FIG. 36 is a longitudinal sectional view taken along the line CSA-CSB shown in FIG. That is, in each of the GTO elements formed in the cylindrical wafer, the ring-shaped gate electrode 34P is formed.
Closer to, for example, a region formed in the region REO, the gate reverse current thereof is more inward than the region REI.
It will be pulled out much sooner than in the case of the GTO element in and will therefore be turned off sooner. On the other hand, the segment of the GTO formed in the region REC in the central portion of the wafer requires the longest time to be turned off most, and the segment of the GTO in the central region REC toward the cathode electrode Since the cathode current I _K will flow in from each of the surrounding segments, current concentration will occur in a part of the inside of the GTO wafer.

(2) The second problem is due to the presence of the snubber circuit, especially the snubber capacitor. That is, as described above, the snubber capacitor Cs is turned off at the time of turn-off.
It is necessary to completely discharge the electric charge charged up in (FIG. 31) by the next turn-off. Therefore, when the GTO 3P is turned on, the charges are discharged through the snubber resistor R _S , which causes a large power loss. At this time, the capacity of the power consumption generated in the snubber resistor R _S is PW = 1/2 * Cs * f (V _DD ² + (V
_DM- V _DD ) ² ). Here, V _DD is a power supply voltage, and V _DM is a voltage when the snubber capacitor CS is charged up at turn-off. Therefore, it becomes necessary to provide a cooling device for cooling the entire device.

When a snubber resistor having such a power capacity is connected, only the amount of power generated by the snubber resistor becomes a loss in the power that should be originally transmitted, resulting in a decrease in efficiency and the above-mentioned. This requires the installation of a cooling device, which is a very big problem in simplifying and downsizing the entire device.

Therefore, in order to solve these problems, the first electrode has the first, second and third electrodes, and when it is turned on in response to the turn-on control current applied to the third electrode, the first electrode is turned on. Is connected between the semiconductor switching element for directly flowing the main current flowing into the first electrode to the second electrode and the third electrode and the second electrode, and generates the turn-on control current to generate the turn-on control current. Drive control means for applying to three electrodes, and at the time of turn-off, all of the main current is commutated from the first electrode to the drive control means via the third electrode in a direction opposite to the turn-on control current. I devised a semiconductor switching device, and tried to solve it. However, as a result of further studies in order to actually commercialize the product, it was found that a high processing accuracy was found in the connection between the semiconductor switching element and the gate driver, especially in the configuration of the connecting portion between the conductor and the semiconductor switching element connecting both. It was found that it is necessary to solve the problem that the assembly work is complicated.

The present invention has been made to solve the above problems, and prevents power loss from locally concentrating on a part of semiconductor switching elements in a semiconductor wafer to prevent element destruction. In a semiconductor switching device, etc., which prevents the above and improves the reliability of the device, the semiconductor switching device has a structure in which the conductor and the semiconductor switching element are easily coupled and the assembly work is easy and simple. An object is to obtain a semiconductor stack device and a power conversion device.

[0022]

According to another aspect of the present invention, there is provided a semiconductor switching device including a gate terminal extending in a circumferential direction of a semiconductor switching element, wherein a contact portion is provided at an end of the current path opposite to the gate driver. The gate terminal and the contact portion are formed into a pair of connectors, one of which is a male type and the other of which is a female type and which can be contacted and separated from each other.

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is a first conductive layer forming a gate side current path and a cathode side current. A wiring board formed by laminating a second conductive layer forming a path with an insulating layer interposed therebetween,
The gate is provided with a female connector fixed to one surface of the wiring board where the first conductive layer is exposed and having a recess into which the gate terminal can be introduced; The terminal is introduced into the concave portion of the female connector, and the gate terminal is pressed against the elastic contact to electrically connect the gate terminal to the first conductive layer.

According to a third aspect of the present invention, there is provided a semiconductor switching device according to the second aspect, wherein the semiconductor switching device is in contact with a cathode electrode of the semiconductor switching element and is fixed by axially pressure-contacting the conductive plate and a second conductive member of the wiring board. A cathode spacer is provided between the other surface of the exposed layer and the conductive plate to electrically connect the second conductive layer to the conductive plate.

According to a fourth aspect of the present invention, there is provided a semiconductor switching device having a gate terminal and a cathode terminal for connecting a gate driver, which are formed on the front and back sides of the semiconductor switching element in the circumferential direction and are electrically insulated from each other. ,
The current path is a wiring board in which a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path are laminated with an insulating layer interposed therebetween, and the first wiring board is the first wiring board.
A first connector piece fixed to one surface of which the conductive layer is exposed, and a second connector piece fixed to the other surface of the wiring board where the second conductive layer is exposed, A female connector having a recess formed so that the both connector pieces face each other and into which the gate terminal and the cathode terminal can be introduced, and an elastic contact mounted in the recess, and the gate terminal and the cathode terminal are The gate terminal and the cathode terminal are electrically connected to the gate terminal and the first conductive layer by being introduced into the concave portion of the female connector and pressing the gate terminal and the cathode terminal with the elastic contact. It is intended to connect to.

A semiconductor switching device according to a fifth aspect of the present invention is the semiconductor switching device according to any one of the second to fourth aspects, wherein the female connector has a concave portion facing the entire circumference of the semiconductor switching element, and is detachable from each other. It is composed of a pair of possible female connector pieces for a half circumference.

According to another aspect of the semiconductor switching device of the present invention, a current path is formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer. And a gate terminal having a recess in which the semiconductor switching element extends in the circumferential direction and into which the wiring board can be introduced, and an elastic contact mounted in the recess. The exposed portion of the first conductive layer is used as a male connector portion, the male connector portion is introduced into the recess of the gate terminal, and the male connector portion is pressure-contacted by the elastic contactor to thereby form the gate terminal. And the first conductive layer are electrically connected to each other.

A semiconductor switching device according to a seventh aspect of the present invention is the semiconductor switching device according to the sixth aspect, wherein the conductive plate is in contact with the cathode electrode of the semiconductor switching element and is fixed by pressure in the axial direction. A cathode spacer is provided between the exposed portion of the layer and the conductive plate to electrically connect the second conductive layer to the conductive plate.

According to another aspect of the semiconductor switching device of the present invention, a current path is formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer. A wiring board consisting of a semiconductor switching element extending in the circumferential direction, electrically insulated from each other, and formed on the front and back sides for connecting the gate driver and the gate terminal for connecting the gate driver, and formed so that both terminals face each other. And having a recess into which the wiring board can be introduced,
The male connector part is provided with an elastic contactor mounted in the recess, and the portion where the first conductive layer is exposed on one surface of the wiring board and the second conductive layer is exposed on the other surface. By introducing the male connector portion into the recess of the semiconductor switching element and pressing the male connector portion with the elastic contact, the gate terminal, the first conductive layer, the cathode terminal and the first terminal The two conductive layers are electrically connected to each other.

A semiconductor switching device according to a ninth aspect of the present invention is the semiconductor switching device according to any one of the sixth to eighth aspects, wherein the male connector portion extends over the entire circumference of the semiconductor switching element, and is a pair of detachable members. It is made up of a half-round male connector part.

According to a tenth aspect of the semiconductor stack device,
The semiconductor switching device according to any one of claims 1 to 9 is used, wherein a semiconductor switching element and a cooling member for radiating heat generated from the semiconductor switching element are stacked and arranged in a mounting frame. .

A power converter according to an eleventh aspect uses the semiconductor switching device according to any one of the first to tenth aspects, and is provided with a gate controller for controlling the gate of the semiconductor switching element to perform power conversion. It is a thing.

[0033]

BEST MODE FOR CARRYING OUT THE INVENTION The semiconductor switching device or semiconductor switching element of the present invention is used in various power conversion devices such as a vehicle power conversion device, a UPS (Uninterruptible Power System), and an industrial power conversion device. , A power device.

The core of the novel method for controlling a semiconductor switching element proposed by the present invention is that all of the main current flowing through the semiconductor switching element in the ON state is diverted to the drive circuit. The point is to turn off.

In the following, as such a semiconductor switching element, a gate turn-off thyristor (hereinafter, referred to as G
An example using (TO) will be shown. In this case, GTO
The first, second and third electrodes of the anode electrode,
It corresponds to the cathode electrode and the gate electrode. The semiconductor switching element is not limited to the one having a four-layer structure such as GTO, and a transistor having a three-layer structure can be used as the semiconductor switching element of the present invention. In this case, when using the NPN transistor, the first, second, and third electrodes correspond to the collector electrode, the emitter electrode, and the base electrode, respectively.
When using a PNP transistor, the first, second and third electrodes correspond to an emitter electrode, a collector electrode and a base electrode, respectively.

Embodiment 1. FIG. 1 shows a circuit configuration of a semiconductor switching device 10 according to the first embodiment of the present invention. In the figure, each reference numeral indicates the following circuit element. That is, 3 is a GTO as a semiconductor switching element, and the gate driver 4 is provided between the gate electrode 3G of the GTO 3 and the node 13 of the cathode electrode 3K.
(Drive control means) is connected.

The gate driver 4 has its driving power supply 4a.
(Power supply voltage V _GD (for example, 20 V)), capacitor 4b,
It is composed of an inductance 4C and a transistor 4d. still,
The detailed configuration is shown in FIG. 2 described later.

The gate driver 3 generates a turn-on control current I _G for turning on the GTO 3, and applies this current I _G to the gate electrode 3G via the wiring path or the line L1. In response to this, the GTO 3 is turned on. Reference numeral 11 is a node, and 9 is a power supply for driving the device 10, that is, a main circuit power supply (power supply voltage V _DD ) of the device 10.

On the other hand, 1 is the rate of increase dI _A / dt of the main current or anode current I _A flowing when the GTO 3 is turned on.
Is an inductance for suppressing the
This is a free-wheeling diode for freeing the energy generated in the inductance 1 when 3 is turned off.

Reference numeral 5 is connected in parallel with the GTO 3 between the node 11 of the anode electrode 3A and the node 12 of the cathode electrode 3K, and the voltage V _AK between the anode and the cathode electrode rises when the GTO 3 is turned off. It is a peak voltage suppression circuit for suppressing only the peak voltage generated due to. As will be described later, the circuit 5 has a function of holding or clamping the voltage V _AK at a predetermined voltage value determined according to the voltage blocking capability of the GTO 3 for a predetermined time when the voltage V _AK is turned off.

Here, at the time of turn-off, the rate of change or rate of rise (gradient) dI _GQ / of the gate reverse current I _GQ that has conventionally been shunted from the main current I _A and flowed into the gate driver 4 side.
Make the absolute value of dt as large as possible (ideally, |
dI _GQ / dt | is ∞), and all of the main current I _A is passed to the node 12 via the gate driver 4 as the gate reverse current I _GQ . That is, the turn-off gain G (= | I _A / determined by the absolute value of the ratio of the main current I _A and the gate reverse current I _GQ
I _GQ |) is set to 1 or less (G ≦ 1), so that all of the main current I _A flows in the opposite direction to the turn-on control current I _G from the anode electrode 3A through the gate electrode 3G. And the commutation to the node 12 side, thereby turning off the GTO 3. At this time, the cathode current I _K flowing directly inside the GTO 3 from the anode electrode 3A toward the cathode electrode 3K immediately stops flowing at all. In that sense, this method, rather than the shunt of the main current I _A, with each other to achieve a "commutation of the main current I _A."

Here, the value of the rate of increase dI _GQ / dt can be changed according to the relationship between the power supply voltage value V _GD of the drive power supply (main power supply) 4a of the gate driver 4 and the inductance value of the loop R1. Therefore, by appropriately setting the values of both 4 (4a) and R1, by setting the increase rate | dI _GQ / dt | to an extremely large value close to the infinite value,
All of the main current I _A can be commutated to the gate driver 4 side in an extremely short time.

On the other hand, it is easy to realize such commutation of the gate reverse current I _GQ by the gate driver 4 alone because the power supply voltage V _GD that the drive power supply 4a of the driver 4 can have is limited. However, on the other hand, the absolute value of the rate of increase dI _GQ / dt required to set the gate turn-off gain G to 1 or less is set by setting the driving power supply voltage V _GD of the gate driver 4 to a practical value that can be set. Possible loop R
It is actually possible to set the value of the internal inductance of 1.

Therefore, the line L1 from the gate electrode 3G to the gate driver 4, the gate driver 4, the line L2 from the gate driver 4 to the cathode electrode 3K through the node 13, and the GTO3 between the gate and the cathode electrode.
It is required to reduce the value of the (floating) internal inductance in the loop consisting of the internal path or the path R1 to a value necessary for setting the turn-off gain G to 1 or less.

However, the gate driver 4 must be set so as to have a capacitance enough to allow the gate reverse current I _GQ having a value equal to or larger than the main current I _A to flow.

For example, when the power supply voltage V _GD of the main power supply 4 _a of the gate driver 4 is set to 20 V and the absolute value of the rising rate dI _GQ / dt is set to about 8000 A / μs, the inductance of the loop R1 is set. The value is preferably 2.5 nH or less, and the internal inductance value of the gate driver 4 is preferably 1 nH or less.

A concrete circuit diagram of the gate driver 4 having such capacitance is shown in FIG. In the figure, a drive power source 50 is a main power source for driving the gate driver 4, a sub power source 51 is a power source for a turn-on gate current, a sub power source 52 is a turn-on transistor Tr1,
Power supply for drive circuit 56 for driving Tr2, sub power supply 5
3 is a power supply for the turn-off gate current, and sub power supply 54 is a drive circuit 5 for driving the turn-off transistor Tr3.
The power supply 7 and the sub power supply 55 are power supplies for driving the circuit unit 58 that generates the turn-on signal and the turn-off signal from the control signal 62, and the transistor Tr1 supplies the turn-on high gate current I _G1 shown in FIG. Transistor Tr2 is a switch for supplying turn-on / steady gate current I _G2 , and transistor Tr3.
Is a switch for supplying a turn-off gate current I _GQ (gate reverse current). The currents I _G1 and I _G2 are collectively referred to as the turn-on control current I _G. C1 is a capacitor for the turn-on gate current I _G , and C2 is a capacitor for the turn-off gate current I _GQ .

In the above gate driver circuit 4, when the control signal 62 is given from the outside, the noise cut circuit 59 is provided.
Removes a noise component included in the control signal 62 from the control signal 62, receives the noise-removed control signal, and outputs the turn-on signal generation circuit 60 and the turn-off signal generation circuit 61.
Respectively generate a turn-on signal 63 and a turn-off signal 64 and supply the signals 63 and 64 to the corresponding drive circuits 56 and 57.

The two drive circuits 56 and 57 which have received the signals 63 and 34 operate as follows. That is, at the time t ₀₁ , the drive circuit 56 generates a signal enough to drive the transistor Tr1 and supplies it to the base of the transistor Tr1. Here, both capacitors C1 and C2 are
Since they are charged by the sub power source 51 and the sub power source 53, respectively, the turn-on high gate current I _G1 is generated by the capacitor C.
1 to GTO3 through the transistor Tr1.
Then, at time t ₀₂ , the drive circuit 56 stops the supply of the base current of the transistor Tr1, generates the base current enough to drive the transistor Tr2, and supplies this to the base of the transistor Tr2. As a result, the transistor Tr1 is turned off, the transistor Tr2 is turned on instead, and the turn-on / steady gate current I _G2 flows from the capacitor C1 to the GTO 3 through the transistor Tr2.

At time t ₁ , the drive circuit 56 stops the supply of the base current of the transistor Tr 2 and the drive circuit 57.
Generates the base current necessary to turn on the transistor Tr3 in response to the signal 64, and supplies this to the transistor T3.
Supply to the base of r3. As a result, the transistor Tr2
Turns off and instead the transistor Tr3 turns on,
The electric charge stored in the capacitor C2 is the transistor T
It is discharged to the GTO3 side via r3, so that the turn-off gate current I _GQ flows from GTO3 through the transistor Tr3 to the node 13 of the cathode electrode 3K of GTO3. Moreover, this current I _GQ becomes equal to or greater than the absolute value of the main current I _{A in} a very short time, and conversely, the cathode current decreases to 0 value in a very short time.

As described above, in order to realize the rate of increase dI _GQ / dt such that the turn-off gain G is 1 or less, the loop R1 including the wiring route inside the gate driver 4 is used.
It is necessary to reduce the overall inductance value.
It is desired to realize this point by improving the mechanical parts such as the wiring of the GTO element or the package structure.

However, since the package structure of the conventional GTO 3P has the structure shown in FIGS. 33 and 34, the internal inductance of the GTO element 20P (lead 21P-ring-shaped gate electrode 34P-cathode electrode 30P). ~ Inductance of the path to lead 22P)
Was a large value, for example, about 50 nH. At this value, the rate of increase dI _GQ / d is about 8000 A / μs.
t cannot be achieved. Therefore, in order to reduce the internal inductance value of the GTO element 20P to a desired value such as 2 nH or less, the gate-side connecting portion 23P and the cathode-side connecting portion 24P, the gate terminal 25P of the GTO element 20P, and the like. Loss caused by each coupling with the cathode terminal 26P and the gate external lead 2
1P and cathode external lead 22P and gate driver 4
Loss caused by each coupling with P and gate lead 3
It is necessary to reduce the inductance value of 8P, and further, the inductance value of each of the external lead wires 21P and 22P of the gate and the cathode which occupy 90% of the total inductance value in the loop R1.

Therefore, the applicant of the present application examined the package structure of the GTO element from the above viewpoint and made improvements, and as a result, realized a pressure contact type semiconductor element having the following structure.

That is, FIG. 4 shows a pressure contact type GTO element 20,
Stack electrodes 27a, 27 for pressing it from above and below
5 is a cross-sectional view showing the GTO element 20 in the direction of the arrow D1 shown in FIG. 4 (excluding the stack electrode 27a). Therefore, the line SA-S in FIG.
FIG. 4 is a vertical cross-sectional view of B.

In both FIGS. 4 and 5, each reference numeral indicates the following member. That is, 20 is a pressure contact type semiconductor element, that is,
Here, the entire GTO element is shown, and 28 is a semiconductor substrate on which each GTO segment is formed.
A gate electrode 29a of A1 (aluminum) is formed on the surface located on the outer peripheral side of the upper surface of 8, and each segment is formed on the upper surface of the semiconductor substrate 28 inside the gate electrode 29a. Each cathode electrode 29b is formed corresponding to the position. The structure of each segment or the wafer structure of the GTO element is similar to the structure shown in the sectional view of FIG.

Reference numerals 30 and 31 respectively denote the semiconductor substrate 28.
On the upper surface of the cathode electrode 29b are the cathode strain buffer plate and the cathode post electrode, which are sequentially stacked on the upper surface of the cathode electrode 29b, while 32 and 33 are the semiconductor substrate 8 respectively.
An anode strain buffer plate and an anode post electrode, which are sequentially stacked on the surface (a surface opposite to the cathode electrode 29b) of an anode electrode (not shown) formed on the back surface of
Reference numeral 34 is a ring-shaped gate electrode that is in contact with the upper surface of the gate electrode 29a of the semiconductor substrate 28, and 38 is a ring-shaped gate terminal made of an annular metal plate, and an inner peripheral plane 25 thereof.
Are slidably contacted with and arranged on the ring gate electrode 34. Reference numeral 35 is an elastic body such as a disc spring or a wave spring for pressing the ring-shaped gate electrode 34 against the gate electrode 29a together with the ring-shaped gate terminal 38 through the annular insulator 36, and 37 is
An insulator made of an insulating sheet or the like for insulating the ring-shaped gate electrode 34 from the cathode strain buffer plate 30 and the cathode post electrode 31, and 26 is a first flange whose one end is fixed to the cathode post electrode 31. And
40 is a second flange whose one end is fixed to the anode post electrode 33, 41 is an insulating cylinder which is made of ceramic or the like and is divided into upper and lower parts with the ring-shaped gate terminal 38 in between and which has a protrusion 42. is there. The outer peripheral portion 23 of the ring-shaped gate terminal 38 projects outward from the side surface of the insulating tube 41, and a plurality of mounting holes 21 are provided at a predetermined interval at a position closer to the inner peripheral side than the other end 38E. . The portion 43 a protruding upward from the upper surface of the upper insulating cylinder 41 is the other end portion 2 of the first flange 26.
6E is airtightly fixed, and the portion 43b protruding downward from the back surface of the lower insulating cylinder 41 is airtightly fixed to the other end of the second flange 40, whereby the pressure contact type semiconductor element 20 is hermetically sealed. It has a package structure.
The inside is replaced with an inert gas.

FIG. 6 is a plan view showing the mechanical portion of the gate driver 4, and FIG. 7 shows the GTO element 20 (stack electrodes 27a and 27b in the gate driver 4 having the structure shown in FIGS. 4 and 5). It is a longitudinal cross-sectional view showing a state in which (pressurized) is mounted. In both FIGS. 6 and 7, reference numeral 4A
Shows a case for covering the gate driver main body 4C, 4B shows a case which becomes a seat of the gate driver main body 4C, and 70 shows the gate driver main body 4 and the GTO.
The whole board | substrate in which the circuit pattern for electrically connecting with the element 20 was formed is shown. The substrate 70 is just the gate lead wires 21P and 22P of the conventional package.
(FIG. 33) and has strength enough to support the weight of the GTO element 20. Reference numeral 71 denotes a cathode electrode connected by pressure contact with the cathode electrode 29b of the GTO element 20, and corresponds to the stack electrode 27a. 21
A is a substrate 7 for connecting the GTO element 20 through the mounting hole 21 corresponding to the substrate 70 of the gate driver 4.
The mounting holes are provided at 0, and in order to connect the gate driver 4 and the GTO element 20, for example, about 6 mounting holes 21A are required.

The above-mentioned substrate 70 has the following two circuit pattern substrates facing each other with the insulator interposed therebetween. That is, the substrate 70 includes a gate lead substrate 72, a cathode lead substrate 73, and an insulator 74 for insulating the two substrates 72 and 73.
And have. The multilayer substrate structure is provided in order to reduce the internal inductance on the gate driver 4 side. The GTO element body 20 has screws 75 and 76.
Alternatively, it is connected to the gate driver main body 4C by welding, caulking or the like.

As described above, the airtight package of the present GTO 3 has the internal gate electrode 29 formed on the semiconductor substrate.
It has a ring-shaped or disk-shaped gate electrode 38 extending from the side a toward the side of the gate driver body 4C,
Moreover, in the package (20), the outer peripheral portion of the ring-shaped gate electrode 38 is directly connected to the main body 4C of the gate driver 4.
Connected to the extended board 70 via the mounting hole 21A.
It is connected to the gate driver 4 only by fixing it. Therefore, no gate lead wire is used for the connection. Therefore, all the problems in the conventional configuration are improved. That is, the coupling loss that has conventionally been caused by the coupling between the internal gate lead portion of the GTO element and the gate terminal and cathode terminal of the GTO element is
As described above, by taking out the gate lead with the disk-shaped structure, it is significantly reduced, and the power loss corresponding to the coupling loss conventionally generated by the coupling between the external gate lead wire and the gate driver is reduced by the present invention. In this case, since the entire disc-shaped gate lead portion or the gate electrode 38 is directly connected to the gate current conducting substrate 70 of the gate driver 4, it is significantly reduced. Furthermore, the inductance of the external gate leads themselves, which conventionally occupied 90% of the total inductance of the loop R1, does not exist because they are not used in the present invention.

In this way, it is possible to reduce the internal inductance of the GTO element 20 (3) and the internal inductance of the gate driver 4. In addition to these improvements, the connection between the GTO element 20 and the gate driver 4 is further devised as described above (FIG. 7), so that the GTO element 3 is provided with a turn-off gain G ≦ 1. Rate of rise d that can be turned off
It has become possible to actually generate the I _GQ / dt region.

The gate current may be taken out in two or four directions diagonally located by using the substrate 70A shown in the plan view of FIG. You may make it take out an electric current.

The operation of the semiconductor switch device having the above circuit structure and mechanism will be described with reference to FIGS. 9 and 10. Note that FIG. 9 shows operation waveforms, and FIG.
An equivalent model in which TO3 is replaced with a circuit configuration including a PNP transistor 80 and an NPN transistor 81 is shown.

In FIG. 9, when the GTO 3 is turned on and the anode current I _A is flowing (time t ₁ ), the gate driver 4 rapidly changes the gate reverse current I _GQ in response to the control signal 62 (FIG. 2). If the gate reverse current I _GQ reaches a current value whose absolute value is equal to the absolute value of the anode current I _A in an extremely short time (I _GQ = -I).
_A ) (time T ₂ ). In this state, all the anode current I _A flowing into the anode electrode 3A of the GTO 3 is commutated to the gate driver 4 via the gate electrode 3G and the wiring path L1, and | GT
The relational expression of the anode current I _A | ≦ | gate reverse current I _GQ | of O3 is established, and the cathode current I _K = 0. After that, the gate reverse current I _GQ continues to maintain the state of | I _A | ≦ | I _GQ | until the GTO 3 is completely turned off.

The current difference ΔI _GQ shown in FIG. 9 is considered to be the recovery current of the NPN transistor 81 shown in FIG. This is caused by the following phenomenon. That is, in FIG. 10, when the GTO 3 is turned on and the anode current I _A is flowing in the semiconductor substrate, the current I _A is separated from the anode electrode 3A of the GTO 3 into the loop 82 and the loop 83, and the cathode electrode 3K. Is flowing to. From this state, when GTO3 is turned off,
All of the anode current I _A is strongly pulled by the gate driver 4 and flows to the loop 84 and the loop 85. At this time, the base current of the NPN transistor 81 is inverted from the positive direction to the negative direction, the NPN transistor 81 is suddenly turned off, and its internal carrier becomes a recovery current and flows in a superimposed manner. The increase in the recovery current is expressed as the above-mentioned current difference ΔI _GQ, and at this time, | gate reverse current I _GQ |> | anode current I _A |.

In this way, the gate reverse current | I _GQ |> | anode current I _A | becomes, and the NPN transistor 8 of FIG.
When 1 is turned off, PNP transistor 80
The base current becomes zero (I _B = 0), PNP transistor 80 will shift to the turn-off.

[0066] the voltage blocking capability and starts to recover (time T ₃₎ of the PNP transistor 80, the voltage V _AK between the anode and cathode electrode shown in FIG. 9 begins to rise, the anode-cathode voltage V _AK is the power supply voltage When a value equal to V _DD is reached (time T ₄ ), the anode current I _A begins to decrease and GTO3
Turns into a turn-off state. At this time, the rising rate dV _AK / dt of the voltage V _AK between the anode and the cathode electrode is G
It is determined only by the speed at which the voltage blocking function of TO3 is restored, not by the external connection circuit or the like. In this respect, the present invention is clearly different from the prior art in which the increase rate of the voltage between the anode and the cathode electrode is determined depending on the snubber capacitor C _S.

In FIG. 9, the peak voltage (surge voltage) V _P of the present invention means the main circuit (loop from the power supply 9 to the node 11, GTO 3, node 12 to the power supply 9) when the GTO 3 is turned off. Stray inductance L
Electromotive force generated due to (the energy is E = 1 /
2 * L * I ² ) is a voltage obtained by superimposing it on the power supply voltage V _DD . If this peak voltage V _P is GTO
If the voltage blocking capability of 3 is exceeded, the GTO 3 will be destroyed. Therefore, the peak voltage suppressing circuit 5 that suppresses the anode-cathode electrode voltage V _AK that continues to increase toward the peak voltage V _P when the GTO 3 is turned off so as not to exceed the voltage blocking capability of the GTO 3 is provided at the node 1 of the GTO 3.
It is necessary to connect GTO3 between 1 and 12 in parallel. The peak voltage suppression circuit 5 of FIG. 1 has such a function, and is a voltage clamp circuit including, for example, a Zener diode, a varistor, a celestor, and an arrester. After the voltage V _AK that continues to rise when the GTO is turned off reaches a predetermined voltage value V _SP set within a range that does not exceed the voltage blocking capability of the GTO 3, the circuit 5 is
If If there is no same circuit 5 the voltage V _AK reaches the peak voltage V _P, a predetermined time Delta] t (Fig. 9) is the time required for the returns to a predetermined voltage value V _SP, the voltage V _AK The peak voltage after suppression is kept at V _SP . Therefore, the peak voltage V _P is not generated, and the GTO3 element is never destroyed.

As described above, in the present invention, at the time of turn-off, the GTO 3 is turned off by controlling the GTO 3 in the region RA of the rate of increase dI _GQ / dt shown in FIG. In the figure, the point PA on the curve CA is the main current I _A.
Is a commutation point where commutation of the
In this case, it is in an ideal state when it is considered that there is no recovery current described above. In reality, since the recovery current is superimposed on the commutated main current, the turn-off gain G <1
The turn-off of GTO3 is realized in the area of.

FIG. 12 and FIG. 13 are diagrams relatively showing the flow of the main current I _A at turn-off in the prior art and the present invention, respectively. Prior art, for example, Japanese Patent Laid-Open No. 5-
No. 111262 (Swiss application number 9110619)
19) and Japanese Patent Application Laid-Open No. 6-188411 (German application No. P4227063).
As shown in, the cathode current I _K is flowing in the GTO 3P even at turn-off. That is, the main current I _A is
At the time of turn-off, the cathode current is _{divided into} I _K and I _GQP . However, in this case, even if the cathode current I _K flowing through each segment is a small value, they will intensively flow into some of the segments, so the GTO
The problem of element destruction is inherent.

On the other hand, in the present invention, as shown in FIG. 13, at the time of turn-off, the cathode current I _K does not flow at all, and all the main current I _A commutates to the path on the side of the gate driver 4 to generate the recovery current. Gate reverse current I _GQ
Is the sum of the absolute value of the main current I _{A and} the absolute value of the recovery current, and the relational expression | I _GQ | ≧ | I _A | holds (in the prior art, | I _GQP | <| I _A |).

As described above, according to the present invention, since the new gate commutation system in which | anode current I _A | ≦ | gate reverse current I _GQ | The current I _K = 0,
The cathode current does not flow into the cathode surface inside the GTO 3P at all, and localized current concentration on the cathode surface, which has conventionally been a cause of turn-off failure, cannot occur at all. Therefore, in the present invention, there is no possibility of element destruction due to turn-off failure, and the reliability of the device is significantly improved. It can be said that this effect is the core effect of the present invention and is an advantage that cannot be obtained even by the combination of the techniques shown in the above-mentioned respective documents.

In addition, the voltage V between the anode and cathode electrodes
_{Since the} circuit 5 for suppressing the rise in _AK and suppressing the surge voltage is provided, the spike voltage is cut by the circuit 5 and is not generated at all. Therefore, the snubber capacitor C _S , which was conventionally required to discharge the electric charge accumulated at the time of turn-off, can be eliminated. That is, the snubber circuit, which is indispensable in the prior art, can be dispensed with, and the device can be made compact, simple, low cost, and highly efficient.

FIG. 14 shows a circuit configuration of a semiconductor switching device which employs a peak voltage protection circuit different from that of FIG. In the figure, the same reference numerals as those in FIG. 1 denote the same components. As the package structure of the GTO 3 and the mechanism of the gate driver 4, those described in FIG. 1 are used. Each of the reference numbers 6 to 8 is G
It is an element that constitutes a protection circuit that suppresses or reduces power loss due to a spike voltage or a peak voltage (surge voltage) that occurs when TO3 is turned off, and shows a diode, a resistance element, and a capacitor in order. In particular,
Here, one end 15 of the capacitor 8 (capacitance element) included in the bypass line BL arranged in parallel with the GTO 3 between the node 11 and the node 12 includes the resistance element 7 and is connected to the power supply 9 at the node 14. It is characterized in that it is connected to the power supply 9 through the formed wiring route R4.

The semiconductor switching device 10A as described above
Or, the operation of the GTO 3 will be described with reference to FIG.

The operation of the GTO 3 in this case is shown in FIG.
1 is the same as the operation in the device of FIG. 1, and only the peak voltage suppressing operation of the voltage V _AK between the anode and the cathode electrode is different from the case of FIG. The measured waveform of FIG. 15 is I _A = 1000 (A /
d), V _AK = 1000 (V / d), I _GQ = 1200 (A
/ D), V _GD = 20 (V / d), and t = 2 (μs / d). In the figure, curves C1, C2, C3,
C4 shows the measured waveforms of the anode current I _A , the anode-cathode electrode voltage V _AK , the gate reverse current I _GQ , and the gate voltage V _G , respectively.

In FIG. 14, the capacitor 8 is constantly charged to the power supply voltage V _DD through the resistance element 7, and during the turn-off operation, the generated spike voltage V _DSP and peak voltage V _P exceed the power supply voltage V _DD . Only the current due to the voltage portion (V _DSP -V _DD , V _P -V _DD ) is absorbed by the capacitor 8 through the diode 6. Therefore, only the excess portion is newly charged to the capacitor 8 for the excess time.

The above points will be described with reference to FIG.
The capacitor 8 does not function until the voltage V _AK between the anode and the cathode electrode reaches the power supply voltage V _DD , and this period (t ₂
The rate of increase dV _AK / dt of −t ₁ ) is determined by the capability of the GTO 3 (at this time, the total main current I _A is commutated to the gate driver 4 side). Then, when the anode-cathode electrode voltage V _AK reaches the power supply voltage V _DD and the anode current I _A starts to decrease (time t ₂ ), at the same time, the node 11
The main current flowing into the capacitor is through the diode 6 and the capacitor 8
The flow starts to the side, that is, to the bypass path BL. At this time, the rate of increase di / dt of the bypass current i flowing in and G
An electromotive voltage is generated by the closed circuit composed of TO3, the diode 6 and the capacitor 8 or the inductance (L _f1 ) floating in the first loop R2. This is
Is the spike voltage V _DSP shown at (time t ₃ ). After that, until time t ₅ , the voltage V between the anode and the cathode electrode is
The difference between the peak voltage V _{P of AK} and the power supply voltage V _DD is absorbed by the capacitor 8. At that time, the amount of overcharge absorbed by the capacitor 8 should be equal to or lower than the voltage blocking capability of the GTO 3.
The capacitance value of the capacitor 8 is appropriately determined. That is, it is determined by the capacitance value of the capacitor 8 so that the peak value V _{P of} the anode-cathode electrode voltage V _AK that rises from the time t ₄ to the time t ₅ becomes equal to or lower than the voltage blocking ability of the GTO 3.

The overcharged portion of the peak voltage absorbed by the capacitor 8 is discharged through the resistance element 7 to the power source 9 side by the next turn-off. On the other hand, even when the GTO 3 is turned on, the voltage or charge charged in the capacitor 8 is blocked by the diode 6 even if it tries to discharge, so that it is not discharged. Therefore, the capacitor 8 is always charged to a voltage equal to the power supply voltage V _DD .

The peak voltage V _P from time t ₄ to time t ₅ is based on the electromotive force generated by the stray inductance (L _A2 ) in the second loop R3 and the capacitance value of the capacitor 8.

As described above, the energy stored in the capacitor 8 of the peak voltage suppression circuit or the protection circuit of the semiconductor switching device 10A is entirely reduced to 0 by the snubber resistance like the snubber capacitor in the prior art. Instead of being discharged, only the overcharged portion is discharged, and the discharge loss of the snubber circuit, which has been a problem in the past, can be significantly reduced. Moreover, this semiconductor switching device 10A
Then, by simply using the members used in the snubber circuit of the related art and directly connecting the wiring of the resistance element used as the snubber resistance to the node 14 of the power supply 9 as the wiring route R4, Since the structure can be simplified, that is, the conventional snubber circuit can be used as it is to sufficiently reduce the discharge loss, there is an advantage that a highly realizable device can be realized. Of course, also in the device 10A, like the device 10 of FIG. 1, it is possible to completely prevent the element breakdown of the GTO 3 at the time of turn-off.

As mentioned in the previous section, the semiconductor switching device described above with reference to FIGS.
Although the conventional problems are basically solved, in order to achieve actual commercialization, in addition to the structure, workability at the time of manufacturing and maintenance, as well as implementation of peripheral devices and parts It is necessary to consider it, and it is necessary to solve the problems raised in these embodiments.

That is, in the semiconductor switching device according to the present invention, since a turn-off current flows from the gate driver to the gate electrode of the semiconductor switching element, the ring-shaped gate terminal of the semiconductor switching element and the conductor from the gate driver are electrically connected. Need to be connected to
In the examples shown in FIGS. 6 and 7, the connection has a structure in which a screw is used to tighten the connection. In this case, since the current flowing into the gate terminal is required to be evenly distributed along the circumferential direction, the screw mounting pitch cannot be increased, and as a result, the number of screws increases. At least 16 in case of 4000A rated GTO prototyped by the inventors
You need a book of screws. Therefore, there is a new problem that the required accuracy of the screw hole size of the relevant portion becomes extremely high, the processing cost increases, and the workability at the time of attaching and detaching the relevant portion becomes extremely complicated.

FIG. 16 is a block diagram showing a semiconductor switching device according to the first embodiment of the present invention, which solves the above-mentioned new problems, and FIG. Is a side view thereof. In addition, FIG.
It is sectional drawing cut | disconnected by the X1-X1 line of (1). In addition,
In the following, since the main points of interest differ from the contents described with reference to FIGS. 1 to 15, the same or corresponding parts will be described with new reference numerals.

In the figure, 100 is a GTO as a semiconductor switching device having a ring-shaped gate terminal 101 extending in the circumferential direction, and 102 and 103 are GTO 10.
An anode electrode and a cathode electrode formed on the upper and lower ends of 0 in the axial direction, and 104 are insulating cylinders that insulate the respective electrode terminals. Reference numeral 200 is a gate driver. 110 is GTO1
00 and the gate driver, the wiring board constitutes a current path, and as shown in the detailed cross section of FIG.
It is equipped with 4. Then, the first conductive layers 111 and 113 of the first and third layers form a gate side current path, and one end (the left end not shown in FIG. 18) of the gate side of the gate driver 200. The second conductive layers 112 and 114 of the second and fourth layers are connected to the gate-side output terminal and form cathode-side current paths, one end of each of which is the gate driver 2
00 to the cathode side output terminal. Note that the first conductive layers 111 and 113 and the second conductive layers 112,
114 is in the vicinity of the connection position of the gate terminal 101,
The through holes 116 are electrically connected to each other.

Returning to FIGS. 16 and 17, reference numeral 120 denotes a flat conductor plate, as will be described later with reference to FIG. Is fixed. Conductor plate 120
The left end of is fixed to a gate driver 200 (not shown). Reference numeral 121 denotes a cathode spacer made of a conductive material, which is integrally fixed to the conductor plate 120 with countersunk screws 122.
The lower surface of the wiring board 110 with the second conductive layer 114 exposed is in contact with the upper surface thereof.

Reference numeral 123 denotes a female connector as a contact portion,
The upper surface of the wiring board 110 exposing the first conductive layer 111 is in contact with the lower surface thereof. A recess 124 into which the gate terminal 101 can be introduced is formed at the right end of the female connector 123.
As shown in FIG. 5, a groove 125 is provided and a leaf spring-like elastic contact 126 is attached to the groove 125. 127, 128
Is a bolt, the cathode spacer 121 and the female connector 1
The wiring board 110 is sandwiched and pressed by 23 and 23 to integrally fix the three. Reference numerals 129 and 130 denote insulating spacers that insulate the bolts 127 and 128.

In the semiconductor switching device shown in FIGS. 16 to 18, countersunk screws 122 and bolts 127 and 12 are previously provided.
8, the female connector 123, the wiring board 110, the cathode spacer 121, the conductor plate 120, and the gate driver 200 are assembled together. Of course, the elastic contact 126 is mounted in the recess 124 of the female connector 123. Then, as shown by the arrow in FIG. 16 (2), the GTO 100 is moved to the left, and the cathode terminal 103 is in contact with the conductor plate 120.
01 is introduced into the recess 124 of the female connector 123.
In this case, the gate terminal 101 operates as a male connector paired with the female connector 123. That is, GTO1
00 and the female connector 123 reach a predetermined relative position, the elastic contact 126 presses the gate terminal 101 from both upper and lower surfaces thereof, and the gate terminal 101 is pressed through the elastic contact 126 and the female connector 123. 101 and the first conductive layer 111 are electrically connected. Since the conductive layer 111 is connected to the conductive layer 113 through the through hole 116, the current from the gate side output terminal of the gate driver 200 will flow to the gate terminal 101 through both conductive layers 111 and 113.

Further, the cathode electrode 103 is the conductor plate 120.
And the second conductive layer 11 via the cathode spacer 121.
4 is connected. Since the conductive layer 114 is connected to the conductive layer 112 through the through hole 116,
The current from the cathode side output terminal of the gate driver 200 flows to the cathode electrode 103 through both conductive layers 112 and 114. As described above, the gate driver 20
0 and the GTO 100 are connected to each other by a wiring board 110 formed by laminating a pair of conductive layers in which currents flow in directions opposite to each other. Therefore, the desired steep turn-off current can be easily and surely supplied based on the above-mentioned principle.

To disconnect the gate terminal 101, the GTO 100 is moved to the right, contrary to the arrow in FIG. 16 (2), and the gate terminal 101 is moved to the recess 12 of the female connector 123.
It should be derived from 4. As described above, in the connection / detachment structure of the gate terminal of the semiconductor switching device according to this embodiment, the gate terminal 101 is connected to the female connector 12
The workability can be extremely simplified because the attachment / detachment can be performed simply by introducing and guiding the same into / from the recess 124 of No. 3. Moreover,
Unlike the previous FIGS. 6 and 7, since a large number of screw holes are not required, a particularly high processing accuracy is not required, and the product price can be reduced. In addition, when there are many small-diameter screw holes, there is a possibility that short circuit will occur between the gate and the cathode due to screw chips during the assembly work. Becomes

FIG. 19 shows a structure in which a plurality of semiconductor switching devices described above are used and are assembled together with other peripheral components as a semiconductor stack device. FIG. 1A is its structural diagram, and FIG. 2B is its circuit block diagram.
In the figure, 100 is a GTO, 200 is a gate driver, 201 is a freewheeling diode, 202 is a snubber diode, 203 is a cooling fin as a cooling member, 204 is a stack electrode, and 205 is an insulating spacer. Of these, a water cooling pipe 206 is connected to the cooling fin 203, and the GTO
100, freewheeling diode 201 and snubber diode 20
The heat generated from 2 is radiated to the cooling water. Reference numeral 210 denotes a mounting frame that stacks the above-mentioned components and tightens them from above and below to store the components in a pressed state. As can be seen from FIG. 19, in this embodiment, the gate driver 200 is supported via the conductor plate 120 and is integrated with the stack structure.

Embodiment 2. 20 is a configuration diagram showing a main part of a semiconductor switching device according to a second embodiment of the present invention. FIG. 1A is its plan view, and FIG. 2B is its side view. Further, FIG. 21 shows X2- of FIG.
It is sectional drawing cut | disconnected by X2 line. In the figure, the configuration of the cathode of the GTO 100 is largely different from the previous embodiment. That is, in the structure shown in FIG. 20, a cathode terminal 105 for connecting a gate driver is additionally provided in addition to the cathode electrode 103 for flowing the main current. The gate terminal 101 and the cathode terminal 105 are separated from each other by the insulating ring 10.
The front and back surfaces of 6 are integrally formed in a ring shape extending in the circumferential direction. A flexible wiring board 110B, which will be described later with reference to FIG. 22, is used as the wiring board. Therefore, the conductor plate 120 is not used, and the cooling fin 203 can be directly brought into contact with the cathode electrode 103, so that the heat transfer property of heat radiation is improved accordingly.

Further, the structure of the contact portion side is as follows. That is, 131 is a first connector piece, and the upper surface of the flexible wiring board 110B exposing the first conductive layer 111 is in contact with the lower surface thereof. Reference numeral 132 is a second connector piece, and the lower surface of the flexible wiring board 110B exposing the second conductive layer 114 is in contact with the upper surface thereof. A concave portion 133 is formed at the right end of the connector pieces 131 and 132. Further, grooves 134 are formed on the upper and lower surfaces of the recess 133, and the elastic contacts 135, 136 are attached to the grooves 134. 137 is a bolt, which is used for the first connector piece 131 and the second connector piece 1
The flexible wiring board 110B is sandwiched and pressed with 32 to fix the three members integrally. Reference numeral 138 is an insulating spacer for insulating the bolt 137. 139 and 140 are second connector pieces 132 for reinforcing the flexible wiring board 110B.
Bolts and insulating spacers for fixing to.

The procedure for assembling is the same as in the case of FIG. 16 described above, except that the gate terminal 101 and the cathode terminal 105 of the GTO 100 are introduced into the recess 133.
Is set to a predetermined position, the elastic contactor 135 presses the gate terminal 101 from above, and the elastic contactor 136 presses the cathode terminal 105 from below. Therefore, the gate terminal 101 is electrically connected to the first conductive layer 111, and the cathode terminal 105 is electrically connected to the second conductive layer 114. As in the case of FIG. The workability of connecting and disconnecting becomes extremely simple.

FIG. 22 shows a structure in which a plurality of semiconductor switching devices shown in FIG. 20 are used and are assembled together with other peripheral parts as a semiconductor stack device. It should be noted that detailed symbols are omitted in FIG. Here, the flexibility of the flexible wiring board 110B is used to bend the flexible wiring board 110B in the middle thereof, and each gate driver 200 is attached to the fixing frame 250 of the device shown in the cross section in the figure, and the weight of the gate driver 200 is increased. Has a structure that does not apply to the GTO100 side. Therefore, the external dimensions of the semiconductor stack device are significantly reduced, and the vibration resistance characteristics are improved.

Although FIG. 22 shows the case where the surface of the gate terminal 101 of the GTO 100 and the surface of the gate driver 200 are at a right angle, the flexible wiring board 110B is used in the current path connecting them. , It is possible to fit any shape without being limited to the right angle. Further, the flexible wiring board 110B can also absorb an error in the mounting position of the gate driver 200. Furthermore, multiple GTOs assembled with a common mounting frame 210
It is also possible to attach the gate drivers 200 of 100 in different relative positions and orientations.

Embodiment 3. 23 is a configuration diagram showing a semiconductor switching device according to a third embodiment of the present invention. FIG. 1A is its plan view, and FIG. 2B is its side view. Further, FIG. 24 is a sectional view taken along line X3-X3 of FIG. Here, the male and female structure of the connector is reversed from that of the previous form. That is, GTO
As shown in FIG. 24, the gate terminal 101 of the device 100 has a recess 141 at its radial end, and elastic contacts 142 are attached to the upper and lower surfaces of the recess 141. This causes the gate terminal 101 to function as a female connector. On the other hand, the male connector portion 143 is formed on the right end portion of the wiring board 110. The wiring board 110 itself is the same as that described with reference to FIGS. It has a different structure. 121 is a conductor plate 120
The cathode spacer is integrally fixed to the upper surface of the wiring board 110, and the lower surface of the wiring board 110 exposing the second conductive layer 114 is in contact with the upper surface thereof. The wiring board 110 is connected to the cathode spacer 12 by the bolt 144 and the insulating spacer 145.
It is fastened and fixed to 1.

In this semiconductor switching device, as shown in FIG.
As shown by the arrow in (2), the GTO 100 is moved to the left, and the male connector portion 143 formed at the tip of the wiring substrate 110 with the cathode electrode 103 thereof in contact with the conductor plate 120 is recessed in the gate terminal 101. It is introduced into 141. When the GTO 100 and the male connector portion 143 reach a predetermined relative position, the elastic contactor 142 press-contacts the male connector portion 143 from both upper and lower surfaces thereof and the gate terminal 101 via the elastic contactor 142. First conductive layer 1
11 is electrically connected. In addition, the cathode electrode 10
3 is connected to the second conductive layer 114 via the conductor plate 120 and the cathode spacer 121.

As described above, in the structure for connecting / disconnecting the gate terminal of the semiconductor switching device according to this embodiment, the male connector portion 143 can be attached / detached only by being introduced into / removed from the recess 141 of the gate terminal 101. Since it is possible, the workability is extremely simple, as in the case of the first embodiment.

Fourth Embodiment 25 is a configuration diagram showing a semiconductor switching device according to a fourth embodiment of the present invention. FIG. 1A is its plan view, and FIG. 2B is its side view. Further, FIG. 26 is a sectional view taken along line X4-X4 of FIG. Here, in the same manner as shown in FIGS. 20 and 21, the cathode electrode 103 for flowing the main current is used.
Separately from the cathode terminal 105 for connecting the gate driver
The gate terminal 101 and the cathode terminal 105 are integrally formed on the front and back of the insulating ring 106 in a ring shape extending in the circumferential direction. Further, by setting the radial dimension of the insulating ring 106 smaller than that of the gate terminal 101 and the cathode terminal 105, a concave portion 146 is formed at the radial tip thereof. Further, an elastic contact 147 is attached in the recess 146.

On the other hand, on the wiring board 110 side, a male connector portion 148 is formed at the right end thereof, and the male connector portion 1 is formed.
In the portion 48, the first conductive layer 111 is exposed on the upper surface and the second conductive layer 114 is exposed on the lower surface.

In this case, the male connector portion 148 formed at the tip of the wiring board 110 is a male connector, and the gate terminal 101 and the cathode terminal 1 having the recess 146 are provided.
05 functions as a female connector. That is, GTO10
0 is moved in the direction of the arrow in FIG. 25 (2) to introduce the male connector portion 148 into the recess 146, and when it reaches a predetermined position, the elastic contact 147 presses the male connector portion 148 from both upper and lower surfaces thereof. To do. Therefore, the gate terminal 101 is the first
Electrically connected to the conductive layer 111 of the cathode terminal 10
5 is electrically connected to the second conductive layer 114, and the workability of connecting / disconnecting the GTO 100 and the gate driver 200 becomes extremely simple, as in the previous embodiment.

Embodiment 5. FIG. FIG. 27 shows a partially modified example of the contents described in each of the above embodiments. Reference numeral 126A in FIG. 27 (1) is a modification of the elastic contactor in FIG. 17 and the like. That is, in the above example of the form, the leaf spring-like one is used,
In this elastic contactor 126A, a so-called stamping process is applied to the elastic conductive material to project a plurality of contact pieces 149. In this case, since each contact piece 149 is formed parallel to the moving direction for introducing and leading the gate terminal 101 into the concave portion 124 of the female connector 123, the sliding operation at the time of this movement is made smooth, There is an advantage that a reliable electrical contact can be obtained.

FIG. 27 (2) is a modification of the connector mechanism described with reference to FIGS. 25 and 26. FIG. 27 (a) is a perspective view thereof and FIG. 27 (b) is a side view of a main part. In the figure, 150 is an elastic contact plate, which is integrally fixed to the gate terminal 101 by brazing or the like. Similarly, 151 is an elastic contact plate, which is integrally fixed to the cathode terminal 105. The two elastic contact plates 150, 151 constitute a female connector. Then, the wiring board 110 is introduced into the recess 152 formed at the left end of the elastic contact plates 150 and 151, and the gate terminal 101 and the cathode terminal 105 are electrically connected to the gate driver 200 at the same time.
Note that, as shown in FIG. 26B, the male connector portion 153 formed at the tip of the wiring board 110 is opposite to the case of FIG. The first conductive layer 111 needs to be exposed.

FIG. 27 (3) is described with reference to FIG. 17, for example.
7 shows a modified example of the contact mechanism with the gate terminal 101 in the recess 124 of the female connector 123. Here, the hole 1 that opens to the concave portion 124 side of the female connector 123
54, and further, a conductor sphere 155 is partially provided with a hole 154.
A conductor spring 156 is housed in the hole 154 so that the conductor spring 156 can be projected therefrom and the conductor sphere 155 is pushed upward. On the other hand, a round hole 157 is formed at a position facing the conductor ball 155 of the gate terminal 101. In the same figure, the gate terminals 101 are shown separated from each other, but at the time of the original contact operation, the gate terminal 101 is provided on the upper surface of the female connector 123 (the concave portion 12).
4), and the positions of the round holes 157 and the conductor balls 155 match, the conductor spring 156 causes the conductor balls 155 to move the round holes 1 of the gate terminal 101.
It is pressed against the periphery of 57. As a result, the gate terminal 101 of the GTO 100 has the conductor ball 155, the conductor spring 156,
It will be electrically connected to the first conductive layer 111 via the female connector 123. Conductor ball 155 and round hole 15
By arranging an appropriate number of 7, the GTO 100 and the gate driver 200 can be connected and disconnected smoothly.

Sixth Embodiment FIG. 28 shows still another modification of the present invention, which is, for example, a modification of the female connector 123 described with reference to FIGS. That is, here, the female connector is defined as
A female connector piece 123A for connecting half the circumference on the gate driver 200 side and a female connector piece 123B for connecting half the circumference on the side opposite to the gate driver 200 are formed, and both female connector pieces 123A and 123B are The connector 159 can be attached and detached separately.

At the time of assembly, first, the female connector piece 12
3B is separated, and the gate terminal 101 of the GTO 100
After inserting into the concave portion of the female connector piece 123A, the female connector piece 123B is integrated with the female connector piece 123A by the connector 159 so that the gate terminal 101 is introduced into the concave portion. FIG. 28 (1) shows that the connector 159 is provided at both ends of the female connector piece 123B to enable complete separation from the female connector piece 123A. 123B
One end of the above is rotatably attached to the female connector piece 123A.

In each of the embodiments, since the female connector contacts the entire circumference of the gate terminal 101, there is an advantage that the circumferential distribution of the turn-off current at the gate terminal 101 becomes more uniform.

Seventh Embodiment FIG. 29 shows still another modification of the present invention, which is, for example, a modification of the male connector portion 143 described in FIGS. 27 and 28. That is, here, the male connector portion is connected to the male connector portion piece 143A which is responsible for the connection of a half circumference of the gate driver 200 side in the circumference of the gate terminal 101, and the connection of the half circumference of the opposite gate driver 200 side. A male connector part 143B is provided, and both male connector parts 143A and 143B can be attached / detached by a separate connector 159.

Since the procedure for assembling is the same as that of the case of FIG. 28, the description thereof will be omitted, but also here, both male connector pieces 143A and 143B are completely separable (FIG. 1A).
And a rotational connection type ((2) in the figure) can be considered. In addition,
In the figure, the connector 159 is shown in a simplified form. However, when the wiring board 110 having the four conductive layers 111 to 114 shown in FIG. Each conductive layer 111-114
Use a structure that can be attached and detached separately. As a result, the inductance of the current path is reduced and the gate terminal 101
At the same time, a uniform turn-off current in the circumferential direction is realized.

The gate terminal 1 in each of the above embodiments
Although all 01 are described as having a ring shape extending in the circumferential direction of the GTO 100, as shown in FIG. 30, a plurality of terminal pieces 109 are provided at equal intervals along the circumferential direction of the GTO 100. The present invention can be similarly applied to the gate terminal 101A having the form of discontinuously extending in the circumferential direction and has the same effect.

Further, by applying the semiconductor switching elements according to the present invention and further including a gate controller for controlling the gates of these semiconductor switching elements to perform power conversion, as described above, the workability of connecting / disconnecting the gate terminals is improved. It is possible to obtain an electric power conversion device such as an inverter, which is good and has good value.

[0112]

As described above, the semiconductor switching device according to the first aspect is provided with the gate terminal extending in the circumferential direction of the semiconductor switching element, and the contact portion is provided at the end of the current path on the side opposite to the gate driver. Since one of the gate terminal and the contact portion is a male type, and the other is a female type, a pair of connectors that can be contacted and separated from each other is configured. It is possible to connect and disconnect the gate and the current path by a detaching operation, which makes the work extremely simple.

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is a first conductive layer forming a gate side current path and a cathode side current. A wiring board formed by laminating a second conductive layer forming a path with an insulating layer interposed therebetween,
The gate is provided with a female connector fixed to one surface of the wiring board where the first conductive layer is exposed and having a recess into which the gate terminal can be introduced, and an elastic contactor mounted in the recess. Since the terminal is introduced into the concave portion of the female connector and the gate terminal is pressed into contact with the elastic contactor, the gate terminal and the first conductive layer are electrically connected to each other. It is possible to connect and disconnect the gate and the current path by simply inserting and pulling them out into the recess of the shape connector, which makes the work extremely simple and realizes a low inductance current path by using the wiring board.

According to another aspect of the semiconductor switching device of the present invention, there is provided a conductive plate which is in contact with the cathode electrode of the semiconductor switching element and is pressed and fixed in the axial direction, and the second conductive layer of the wiring substrate is exposed. Since the cathode spacer is provided between the surface and the conductive plate to electrically connect the second conductive layer and the conductive plate, the cathode electrode is electrically connected to the cathode side current path via the cathode spacer. Connected.

According to a fourth aspect of the present invention, there is provided a semiconductor switching device comprising a gate terminal for connecting a gate driver and a cathode terminal which are formed on the front and back sides of the semiconductor switching element and which are circumferentially extended and electrically insulated from each other. ,
The current path is a wiring board in which a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path are laminated with an insulating layer interposed therebetween, and the first wiring board is the first wiring board.
A first connector piece fixed to one surface of which the conductive layer is exposed, and a second connector piece fixed to the other surface of the wiring board where the second conductive layer is exposed, A female connector having a recess formed so that the both connector pieces face each other and into which the gate terminal and the cathode terminal can be introduced, and an elastic contact mounted in the recess, and the gate terminal and the cathode terminal are The gate terminal and the cathode terminal are electrically connected to the gate terminal and the first conductive layer by being introduced into the concave portion of the female connector and pressing the gate terminal and the cathode terminal with the elastic contact. Therefore, the gate terminal and the cathode terminal can be introduced into and taken out from the concave portion of the female connector including the first connector piece and the second connector piece. Enables connection detachable between the gate and the cathode and the current path in the operation, with the work is extremely simple, low-inductance current path is realized by adoption of the wiring board. Further, since it is not necessary to interpose a member for connecting the gate driver on the cathode electrode, it is possible to improve the cooling performance by directly bringing the cooling member into contact with the cathode electrode, for example.

According to a fifth aspect of the present invention, there is provided a semiconductor switching device in which the female connector has a concave portion facing the entire circumference of the semiconductor switching element, and a pair of half-round female connectors which are detachable from each other. Since it is made of one piece, the uniformity of the current distribution in the circumferential direction of the gate terminal or the gate terminal and the cathode terminal is improved.

According to a sixth aspect of the semiconductor switching device of the present invention, a current path is formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer. And a gate terminal having a recess in which the semiconductor switching element extends in the circumferential direction and into which the wiring board can be introduced, and an elastic contact mounted in the recess. The exposed portion of the first conductive layer is used as a male connector portion, the male connector portion is introduced into the recess of the gate terminal, and the male connector portion is pressure-contacted by the elastic contactor to thereby form the gate terminal. Since the first conductive layer and the first conductive layer are electrically connected to each other, it is possible to connect and disconnect the gate and the current path by simply inserting and pulling out the male connector into the recess of the gate terminal. Product With but becomes very simple,
A low inductance current path is realized by using a wiring board.

Further, in the semiconductor switching device according to the seventh aspect, the conductive plate which is in contact with the cathode electrode of the semiconductor switching element and fixed by being pressed in the axial direction is fixed, and the second conductive layer of the wiring substrate is exposed. Since the cathode spacer is provided between the portion and the conductive plate and electrically connects the second conductive layer and the conductive plate, the cathode electrode is electrically connected to the cathode side current path via the cathode spacer. Connected.

In a semiconductor switching device according to an eighth aspect of the present invention, a current path is formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer. A wiring board consisting of a semiconductor switching element extending in the circumferential direction, electrically insulated from each other, and formed on the front and back sides of the gate terminal for connecting the gate driver and the cathode terminal. The terminals are formed so as to face each other. And having a recess into which the wiring board can be introduced,
The male connector part is provided with an elastic contactor mounted in the recess, and exposing the first conductive layer on one surface of the wiring board and the second conductive layer on the other surface. By introducing the male connector portion into the recess of the semiconductor switching element and pressing the male connector portion with the elastic contact, the gate terminal, the first conductive layer, the cathode terminal, and the first terminal Since the two conductive layers are electrically connected to each other, it is possible to connect / disconnect the gate / cathode and the current path by simply inserting and pulling out the male connector into / from the concave portion formed of the gate terminal and the cathode terminal. The work becomes extremely simple, and the use of a wiring board realizes a low-inductance current path. Further, since it is not necessary to interpose a member for connecting the gate driver on the cathode electrode, it is possible to improve the cooling performance by directly bringing the cooling member into contact with the cathode electrode, for example.

According to a ninth aspect of the semiconductor switching device of the present invention, the male connector portion extends over the entire circumference of the semiconductor switching element, and is composed of a pair of semi-circular male connector pieces that are detachable from each other. Therefore, the uniformity of the current distribution in the circumferential direction of the gate terminal or the gate terminal and the cathode terminal is improved.

A semiconductor stack device according to a tenth aspect and a power conversion device according to the eleventh aspect can obtain a semiconductor stack device and a power conversion device including the above semiconductor switching elements and having particularly good workability in gate connection. .

[Brief description of drawings]

FIG. 1 is a circuit diagram of a semiconductor switching device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a specific configuration of a gate driver circuit.

FIG. 3 is a diagram showing a waveform of a current flowing to the gate side.

FIG. 4 is a cross-sectional view showing a GTO device package of the present invention.

FIG. 5 is a plan view showing the appearance of a GTO device package of the present invention.

FIG. 6 is a plan view showing the external appearance of the gate driver of the present invention.

FIG. 7 is a cross-sectional view showing a method for connecting a GTO element package of the present invention to a gate driver.

FIG. 8 is a plan view showing a gate driver when gate reverse currents are taken out from multiple directions.

FIG. 9 is a diagram showing an operation of the semiconductor switching device according to the first embodiment of the present invention.

FIG. 10 is a diagram showing an equivalent model of GTO.

FIG. 11 is a diagram showing the relationship between the increase rate of the voltage between the anode and the cathode electrode and the turn-off gain.

FIG. 12 is a diagram showing a flow of a main current at the time of turn-off in a conventional technique.

FIG. 13 is a diagram showing a main current flow at turn-off in the present invention.

FIG. 14 is a circuit diagram of a semiconductor switching device according to the first embodiment of the present invention, which is different from FIG.

FIG. 15 is a diagram showing actually measured waveforms in the apparatus of FIG.

FIG. 16 is a configuration diagram showing a semiconductor switching device according to a first embodiment of the present invention.

17 is a sectional view taken along line X1-X1 of FIG.

18 is a cross-sectional view showing details of the wiring board in FIG.

FIG. 19 is a configuration diagram showing a semiconductor stack device using the semiconductor switching device of FIG. 16.

FIG. 20 is a configuration diagram showing a semiconductor switching device according to a second embodiment of the present invention.

21 is a cross-sectional view taken along line X2-X2 of FIG.

22 is a configuration diagram showing a semiconductor stack device using the semiconductor switching device of FIG. 20.

FIG. 23 is a configuration diagram showing a semiconductor switching device according to a third embodiment of the present invention.

24 is a cross-sectional view taken along line X3-X3 of FIG.

FIG. 25 is a configuration diagram showing a semiconductor switching device according to a fourth embodiment of the present invention.

26 is a cross-sectional view taken along line X4-X4 of FIG.

FIG. 27 is a configuration diagram showing a modified example of each part in the fifth embodiment of the present invention.

FIG. 28 is a configuration diagram showing a modified example of each part in the sixth embodiment of the present invention.

FIG. 29 is a configuration diagram showing a modified example of each part in the seventh embodiment of the present invention.

FIG. 30 is a diagram showing a modification of the gate terminal 101 extending in the circumferential direction.

FIG. 31 is a diagram showing a circuit of a conventional device.

FIG. 32 is a diagram showing measured waveforms of a conventional circuit.

FIG. 33 is a cross-sectional view of a conventional GTO device package.

FIG. 34 is a plan view showing the appearance of a conventional GTO device package.

FIG. 35 is a diagram for pointing out a conventional problem.

FIG. 36 is a diagram for pointing out a conventional problem.

[Explanation of symbols]

3 GTO, 3A anode electrode, 3K cathode electrode, 3G gate electrode, 4 gate driver, 5 peak voltage suppression circuit, R1 path, I _A main current, I _G turn-on control current, I _GQ gate reverse current, 100 GT
O, 101, 101A gate terminal, 102 anode electrode, 103 cathode electrode, 105 cathode terminal,
106 insulating ring, 110 wiring board, 110B flexible wiring board, 111, 113 first conductive layer,
112, 114 second conductive layer, 115 insulating layer, 12
0 conductor plate, 121 cathode spacer, 123 female connector, 124, 133, 141, 146, 152
Recesses, 126, 135, 136, 142, 147 Elastic contacts, 131 First connector piece, 132 Second connector piece, 143, 148, 153 Male connector section,
123A, 123B female connector pieces, 143A, 14
3B male connector part, 200 gate driver, 2
03 Cooling fin, 210 Mounting frame.

Continuation of front page (56) Reference JP-A-9-201039 (JP, A) JP-A-8-330572 (JP, A) JP-A-61-227661 (JP, A) JP-A-8-331835 (JP , A) Actual development Sho 55-67685 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H02M 1/06 H02M 1/08

Claims (11)

(57) [Claims] 1. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver for supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal extending in the circumferential direction, a contact portion is formed at an end of the current path on the side opposite to the gate driver, and one of the gate terminal and the contact portion has a male shape, A semiconductor switching device comprising a pair of connectors, each of which has a female shape and which can be contacted and separated from each other. 2. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver for supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is insulated from a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path. A wiring board formed by stacking layers through layers, a female connector having a concave portion fixed to one surface of the wiring board where the first conductive layer is exposed and having the gate terminal introduced therein; An elastic contactor attached to the gate connector, the gate terminal is introduced into the recess of the female connector, and the gate terminal is pressure-contacted with the elastic contactor. Semiconductor switching device being characterized in that so as to electrically connect the gate terminal and the first conductive layer by Rukoto. 3. A conductive plate which is in contact with a cathode electrode of a semiconductor switching element and fixed by being pressed in the axial direction, and between the other surface of the wiring board where the second conductive layer is exposed and the conductive plate. 3. The semiconductor switching device according to claim 2, further comprising a cathode spacer which is interposed and electrically connects the second conductive layer and the conductive plate. 4. A semiconductor switching device comprising a semiconductor switching element having a gate electrode, and a gate driver supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal and a cathode terminal for circumferentially extending the semiconductor switching element and electrically insulated from each other and formed on the front and back sides for connecting a gate driver.
The current path is a wiring board formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer, A first connector piece fixed to one surface exposing the first conductive layer and a second connector piece fixed to the other surface exposing the second conductive layer of the wiring board. A female connector having a recess formed so that the both connector pieces face each other and into which the gate terminal and the cathode terminal can be introduced; and an elastic contact mounted in the recess, and the gate terminal and the cathode terminal are provided. The gate terminal and the cathode terminal are pressed into contact with the concave portion of the female connector by the elastic contactor, so that the gate terminal and the first conductive layer and the cathode terminal and the second conductive layer. Semiconductor switching device, wherein a was as to be electrically connected. 5. The female connector has a concave portion facing the entire circumference of the semiconductor switching element, and is composed of a pair of half-round female connector pieces that are detachable from each other. The semiconductor switching device according to claim 2. 6. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The current path is a wiring board formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path with an insulating layer interposed therebetween, and the semiconductor switching element is circumferentially arranged. A first terminal of the wiring board, the first terminal of the wiring board having a recessed terminal extending into the recess and having a recess into which the wiring board can be introduced;
The exposed portion of the conductive layer is used as a male connector portion, the male connector portion is introduced into the recess of the gate terminal, and the male connector portion is pressure-contacted with the elastic contactor so that the gate terminal and the first 1. A semiconductor switching device characterized in that it is electrically connected to the first conductive layer. 7. A conductive plate, which is in contact with a cathode electrode of a semiconductor switching element and is pressed and fixed in an axial direction, and a second conductive layer of a wiring board, which is interposed between the exposed part and the conductive plate. 7. The semiconductor switching device according to claim 6, further comprising a cathode spacer electrically connecting the second conductive layer and the conductive plate. 8. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver for supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The current path is a wiring board formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path with an insulating layer interposed therebetween, and the semiconductor switching element is circumferentially arranged. Comprising a gate terminal for connecting a gate driver and a cathode terminal, which are formed on the front and back and electrically insulated from each other, and having a recessed portion formed so that both terminals face each other and into which the wiring board can be introduced. And an elastic contactor mounted in the recess to expose the first conductive layer on one surface of the wiring board. A portion where the second conductive layer is exposed on one side is used as a male connector portion, the male connector portion is introduced into the recess of the semiconductor switching element, and the male connector portion is pressed into contact with the elastic contactor. Thus, the semiconductor switching device is characterized in that the gate terminal and the first conductive layer and the cathode terminal and the second conductive layer are electrically connected to each other. 9. The male connector portion extends over the entire circumference of the semiconductor switching element, and comprises a pair of half-round male connector portions that can be attached to and detached from each other. 9. The semiconductor switching device according to any one of 8 to 8. 10. The semiconductor switching device according to claim 1, wherein the semiconductor switching device and a cooling member for radiating heat generated by the semiconductor switching device are stacked and arranged in a mounting frame. Semiconductor stack device using the device. 11. A power conversion device using the semiconductor switching device according to claim 1, further comprising a gate control device that gate-controls a semiconductor switching element to perform power conversion.