JP3378809B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a plurality of semiconductor chips are superposed on each other and molded while the package outer shape can be reduced in thickness.

[0002]

2. Description of the Related Art The most popular type of semiconductor device encapsulation technology is transfer molding in which the periphery of a semiconductor chip 1 is encapsulated with a thermosetting epoxy resin 2 as shown in FIG. It is a technology. A lead frame is used as a supporting material for the semiconductor chip 1, the semiconductor chip 1 is die-bonded to the island 3 of the lead frame, and the bonding pads of the semiconductor chip 1 and the leads 4 are connected to the wires 5.
It is manufactured by wire bonding, setting a lead frame in a mold having a desired outer shape, injecting an epoxy resin into the mold, and curing the epoxy resin.

On the other hand, the wave of miniaturization and weight reduction for various electronic devices is unavoidable, and semiconductor devices incorporated therein are also required to have higher capacity, higher functionality and higher integration.

Therefore, a technique that has existed as an idea for a long time (for example, Japanese Patent Laid-Open No. 55-1111517) has attracted attention as a technique for encapsulating a plurality of semiconductor chips in one package, and there is a movement to realize it. Came. That is, FIG. 3 (B)
As shown in FIG.
a, the second semiconductor chip 1b is fixed on the first semiconductor chip 1a, and the corresponding bonding pad and lead 4 are connected to the first and second bonding wires 5a and 5a.
It is connected with b and is sealed with resin 2.

[0005]

The integration of a plurality of chips in spite of an increase in cost is due to an extremely strong demand for miniaturization, lightness, thinness and shortness. Therefore, rather than the DIP type package having a large outer dimension, there is a strong intention to store it in a surface mount type and thin type package, and this has a great advantage as a whole.

However, since the semiconductor chip 1 cannot be made thinner than a certain thickness because it is necessary to have mechanical strength, there is a drawback in that the package outer shape is increased in size by the number of stacked chips.

Further, the second bonding wire 5b is
Avoiding contact with the first semiconductor chip 1a;
In order to avoid contact with the bonding wire 5a, the wire loop needs to be considerably large. Therefore, the height 6 of the wire loop tends to be large, which increases the thickness of the package as a whole and hinders reduction in thickness.

[0008]

The present invention has been made in view of the above-mentioned conventional problems, and has a first semiconductor chip having a first bonding pad, and a second semiconductor chip having a second bonding pad. Second semiconductor chip fixed on the semiconductor chip, internal electrodes to be electrically connected to the first and second bonding pads, and ball bumps formed on the surface of the first bonding pad. A first wire connecting the second bonding pad and the ball bump, a second wire connecting the ball bump and the internal electrode, and a periphery of the first and second semiconductor chips. And an insulating resin to cover the insulating resin.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described in detail below with reference to the drawings.

First, FIG. 1A is a sectional view showing a semiconductor device of the present invention, and FIG. 1B is an enlarged sectional view of a main part.

In the figure, reference numerals 10 and 11 denote first and second semiconductor chips, respectively. First and second semiconductor chips 1
Various active and passive circuit elements are formed on the silicon surfaces 0 and 11 in the previous step. A first bonding pad 12a for external connection is formed on the surface of the first semiconductor chip 10. Similarly, a second bonding pad 12b is formed on the surface of the second semiconductor chip 11. Each bonding pad 1 on the surface of each chip
A passivation film such as a silicon nitride film, a silicon oxide film, or a polyimide-based insulating film is formed so as to cover 2a and 12b, and the upper portions of the bonding pads 12a and 12b are opened for electrical connection.

The insulating film substrate 13 is the first of these.
And serves as a substrate that supports the second semiconductor chips 10 and 11. A conductive pattern is drawn on the surface of the film substrate 13 by a gold plating layer. The conductive pattern forms internal electrodes 14 for connecting the respective bonding pads 12a, 12b and the bump electrode 20.

The first semiconductor chip 10 is fixed on the island portion with a conductive or insulating adhesive 15. The second semiconductor chip 11 is fixed onto the passivation film of the first semiconductor chip 10 with an insulating epoxy adhesive 15. However, the second semiconductor chip 11 has a chip size that does not cover the first bonding pad 12a.

A ball bump 17 is formed on the first bonding pad 12a. The ball bump 17 is a bump electrode formed by using a gold wire ball bonding method so as to leave only the gold ball portion. Then, the second bonding pad 12b and the ball bump 17 are connected by the second bonding wire 18, and the ball bump 17 and the internal electrode 14 are secondly connected.
They are connected by the bonding wire 19.

The second bonding wire 18 is formed by ball bonding using the second electrode pad 12b side as the first bond, and the second bonding wire 19 is formed by ball bonding using the ball bump 17 side as the first bond. There is. In order, the ball bumps 17 are first formed, then the second bonding wires 18 are bonded from the second bonding pads 12b toward the ball bumps 17, and the first bonding wires 19 are internally formed from the ball bumps 17. Bonding toward the electrode 14. This ball bump 1
7 serves as a buffer agent for preventing the tip of the bonding tool from directly contacting the surface of the first semiconductor chip 10 when the second bonding wire 18 is second-bonded (stitch-bonded).

A plurality of bump electrodes 20 are provided on the film substrate 1.
3 is formed on the back surface side. A through hole (not shown) is provided in the film substrate 13, and the internal electrode 14 and the bump electrode 20 are connected via this through hole.

An epoxy thermosetting resin 21 covers the periphery of the first and second semiconductor chips 10 and 11. The thermosetting resin 21 covers the upper side of the film substrate 13 to form the package outline.

The first and second semiconductor chips 10 and 11 are
It is easy to combine in a memory device. For example,
EEPRO as the first and second semiconductor chips 10 and 11
When a semiconductor memory device such as M (flash memory) is used (first combination example), the storage capacity can be doubled, tripled, ... With one package. Further, a case where a semiconductor memory device such as an EEPROM (flash memory) is formed on the first semiconductor chip 10 and a semiconductor memory device such as SRAM is formed on the second semiconductor chip 11 (second combination example) is also considered. To be

In either combination, each chip has an I / O terminal for inputting / outputting data, an address terminal for specifying a data address, and a chip enable terminal for permitting input / output of data. The pin arrangements of both chips are very similar. Therefore, the internal electrodes 14 for I / O terminals and address terminals of the first and second semiconductor chips 10 and 11 can be shared, and by applying an exclusive chip enable signal to each chip, It is possible to exclusively select the memory cell of either one of the semiconductor chips. Further, with such a configuration, it becomes possible to electrically connect the first and second bonding pads 12a and 12b.

Incidentally, the first and second bonding pads 12
In the case of a circuit configuration in which a and 12b cannot be electrically connected, the first bonding pad 12a is electrically isolated to form a dummy pad having no circuit function, and the ball bump 17 is formed on the dummy pad. They are formed and connected with two wires as shown in FIG.

FIG. 2 is a cross-sectional view for briefly explaining the method of manufacturing the ball bump 17.

Referring to FIG. 2A, a gold wire 32 having a diameter of about 20 to 30 μ is inserted into the center hole 31 of the capillary 30, and a gold wire having a diameter of 60 to 80 μ is preliminarily attached to the tip of the wire 32 by a spark or the like. The ball 33 is formed. This is moved above the first bonding pad 12a and the capillary 30 is lowered to bring the gold ball 33 into contact with the surface of the electrode pad 12a and apply a constant pressure. At the same time, ultrasonic vibration is applied and heated through the capillary 12 to fix the gold ball 33 and the first bonding pad 12a.

Referring to FIG. 2B, the capillary 30 is vertically raised and then vertically lowered again. The distance 34 between the tip of the capillary 30 and the upper end (flat part) of the gold ball 33 is 10
The capillary 30 is stopped at a position such that it is about 30 μm. The vicinity of the base of the gold ball 33 is not stored inside the capillary 30 and is exposed.

Referring to FIG. 2C, while maintaining the above distance 34, the capillary 30 is horizontally moved by a distance exceeding two-thirds of the diameter of the gold wire 32. For example, when the diameter of the hole at the tip of the capillary 12 is 40μ, 25μ to 3
Move by 5μ. The gold wire 32 is partly sheared at the tip of the capillary 30, and the thin portion 35 is pulled like a string.
It barely becomes continuous.

The distance 34 has an important meaning in order to apply shear in this process. If the distance 34 is too large, the gold wire 32 is plastically deformed so that the thin portion 35 cannot be formed. If the distance 34 is too small, the joined gold ball 17 is not formed.
Will be peeled off. The tip of the capillary 30 is shown in FIG.
As shown in (D), near the base of the gold ball 33,
The gold wire 32 has an original diameter Φ without being affected by plastic deformation.
Control so that it is located immediately above the part where 1 was maintained.

Referring to FIG. 2 (E), the capillary 30 is again raised vertically. The state where the gold wire 32 and the gold ball 33 are continuous only at the thin portion 35 is shown.

2 (F): The clamper (not shown) that has been released until now is closed, the gold wire 32 is clamped, and the thin portion 35 is completely cut by pulling it up. Through these steps, the ball bumps 17 are formed on the first bonding pads 12a.

In the semiconductor device of the present invention described above, since the second bonding pad 12b is connected to the first bonding pad 12a so that the distance between the two is short, the loop length of the second bonding wire 18 is small. Can be shortened. Therefore, the loop height 22 (FIG. 1) can be kept low. This is particularly effective when the difference in chip size between the first semiconductor chip 10 and the second semiconductor chip 11 is large. Further, it is possible to avoid a contact accident between the second bonding wire 18 and the first semiconductor chip 10, and furthermore, since the first and second bonding wires 18 and 19 do not cross each other, an electrical short circuit is caused. It can be avoided.

[0029]

As described above, according to the present invention,
By stacking a plurality of semiconductor chips 10 and 11 in one package, there is an advantage that a high-density packaged product can be provided in accordance with the demand for light, thin, short and small electronic devices.

Further, since the first bonding wire 18 and the internal electrode 14 are connected via the first bonding pad 12a, there is an advantage that the length of the second bonding wire 18 can be shortened. As a result, the loop height 22 can be kept low, which has the advantage that the thickness of the package can be reduced.

Then, the second bonding pad 12b
Since it is not directly wire-bonded to the internal electrode 14 from
The second bonding wires 18 and 19 do not cross each other, so that an accident such as an electrical short circuit can be prevented, and contact between the second bonding wire 18 and the first semiconductor chip 10 can be prevented.

Further, the stitch bond to the internal electrode 14 is 1
Since a book is sufficient, the bonding area can be reduced and the semiconductor device can be downsized.

[Brief description of drawings]

FIG. 1 is a cross-sectional view for explaining the present invention.

FIG. 2 is a cross-sectional view for explaining the present invention.

FIG. 3 is a cross-sectional view for explaining a conventional example.

Claims (3)

(57) [Claims] 1. A first having a first bonding pad
Semiconductor chip, a second semiconductor chip having a second bonding pad fixed onto the first semiconductor chip, and an internal electrode to be electrically connected to the first and second bonding pads. A ball bump formed on the surface of the first bonding pad and a first bond to the second bonding pad.
Second bonded ball bon on the ball bump
And a first wire that is connected by soldering, and is fast-bonded on the ball bump.
Contact by ball bonding second bonded to pole
A semiconductor device comprising: a continuous second wire; and an insulating resin that covers the periphery of the first and second semiconductor chips. 2. The first bonding pad is an electrical dummy, and the second bonding pad is connected to the internal electrode via the first bonding pad. 1. The semiconductor device according to 1. 3. The semiconductor device according to claim 1, wherein the first bonding pad and the second bonding pad have a common function.