JP3380057B2 - Signal system selection output device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [0001] BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal system selection output device.
For example, B (Broad band)
-ATM (Asyncro), an elemental technology of ISDN
nous Transfer Mode: Asynchronous transfer mode
Mode) in transmission / switching equipment using the transmission method.
Switching of the transmission path or path (virtual path VP) without interruption
It can be applied to [0002] 2. Description of the Related Art In recent years, ATM communication in B-ISDN
Various technologies have been developed in order to achieve the above. example
For example, as a technology for instantaneous
It is shown in literature. Reference 1: Technical Report of IEICE,
In October 1992, VOL. 92, NO. 287, CS
92-48, "How to switch an uninterrupted transmission line in an ATM network"
formula". Literature 2: Autumn of the Institute of Electronics, Information and Communication Engineers, 1992
Conference, Lecture Paper Volume 3, B-526, Page 3-19
2. “The instantaneous interruption double switching system in the ATM transmission equipment
One consideration ”. "Overview of Instantaneous Switching": Communication Network
Transmission equipment requires high reliability,
Conventionally, the main signal system has been used for redundant transmission lines and main parts in the equipment.
And reliability by implementing a redundant configuration.
Was raised. [0006] In the subsequent stage of the duplicated part, there are two signals.
So you have to choose one system. This
Transmission line selection switching circuit is incorporated in the input section at the subsequent stage
It is rare. Normally, if any system is selected,
It is sufficient to continue selecting the system as it is, but
The other due to wire construction or equipment maintenance
May need to switch to the system. In this case, the transmission line is in operation (the user
That you are communicating with ), So switching is instantaneous
It is desirable to do. [0009] Here, "no momentary interruption" means that no signal is lost.
Order is guaranteed and does not overlap.
Signal into packets called fixed-length cells for transmission.
In the ATM transmission system, the loss and reversal of the cell order
And that the cell is not sent twice.
I do. [0010] Regarding the configuration of such a switching system,
This is described in section 2.1 of page 2 of document 1 mentioned above.
Regarding the purpose of uninterrupted transmission line switching,
Described in the above-mentioned document 1 in pages 3 to 3.
You. "Instantaneous interruption switching method": ATM transmission method
As a method of instantaneous interruption switching in
As shown in section 4 on page 3-4, there are three methods
Proposed. Among them, the cell sequence synchronization method of method 3
(This method is hereinafter referred to as a constant synchronization method.)
Depends on the method of inserting delays to establish synchronization.
Batch Insertion Method and Sequential Method as Described in Reference 2 above
Two methods of insertion have been proposed. The sequential insertion method is different from the batch insertion method in that an empty cell is used.
The cell flow between the working system and the standby system is different due to insertion of
Has the advantage that the synchronization state can be maintained. Ma
Also, in the continuous synchronization method, the phase difference between both systems is always absorbed.
System is actually switched after the switching instruction is issued
There was also the advantage that the time to get was short. [0013] [Problems to be Solved by the Invention] Sequential insertion described above
According to the law, the cell flow of the working system
The system is turned off without any instantaneous interruption while maintaining the synchronization of both systems.
It was possible to change. (A) However, the above-mentioned constant synchronization method
If the phase of the working system is advanced, synchronization is ensured.
After that, a semi-fixed delay is inserted into the working system.
Become. In other words, the length of the active transmission line is
Shorter than the length of the
Is it possible to perform communication only with the delay of the transmission path length?
However, the synchronization method is always used, and a delay is added.
This is the same as selecting a standby system with a long transmission path.
Delay was caused. From the viewpoint of the entire network, all transmissions
When a system with a long transmission line is selected in the redundant section of the transmission line
The same big delay was occurring. (B) Also, in the above document 2,
Cell delay fluctuation at the time of replacement (CDV: Cell Delay)
  Variation) does not occur, so the constant synchronization method
It is said to be effective, but at the time of synchronization pull-in
Cell delay fluctuation occurs,
Operation that frequently switches between the active system and the standby system is required
Otherwise, the absolute delay of the entire network is large.
It is not particularly advantageous compared to the problem of
won. Therefore, the cell delay fluctuation CDV is reduced to some extent.
Utilizing the feature of ATM that allows, phase when switching
A cell delay fluctuation CDV for adjusting the difference is generated.
During normal operation, delays may be inserted into the active system
Only the transmission delay due to the pure working transmission path length
Reduce the absolute delay of the entire network
I do. At the same time, the insertion of an empty cell of the always synchronous system
The same applies when the cell flow of the working system differs from that of the standby system.
State can be maintained, and the actual
The advantage that the time before the system is switched to another is short
No synchronization, virtually constant synchronization (absorption of phase difference)
When switching is requested, it is possible to switch immediately
In both cases, delay insertion is performed only at the time of switching and instantaneous interruption switching is performed.
It is hoped that it will be possible. Further, the cell flow of system 0 and system 1 other than the empty cells
OAM (O
permission Administration a
ndMaintenance: maintenance and operation) Cell Resource
Normal operation even when a cell management cell is inserted in the cell flow.
It is possible to keep the synchronization state in the virtual constant synchronization unit when using
It is hoped that it can be done. As described above, switching can be performed with a simple configuration.
During normal operation other than when
Signals that can be made short and switch without interruption
There is a demand for the provision of a system selection output device. [0021] SUMMARY OF THE INVENTION Accordingly, the present invention provides
At least two or more signal systems are input.
Signal system that selects and outputs the input signal system as the active system output
In the selective output device, the above-described section has
It solves the problem. That is, the user inputs from each input signal system.
User packet detection means for detecting packets and other input
Delay the input signal system that is ahead of the phase of the force signal system
LetTogether with the phase of other input signal systems.
Buffer to store the input signal systemAnd the above delay
User packet of input signal system notBuff
AUser packet of the input signal system delayed by
Match comparison means for performing a match comparison of
The order of the packet of the input signal system whose phase is advanced from the result
Delay amount control means for controlling a delay amount for delaying a phase;,Up
The matching packet is searched for by the match comparing means.
Synchronization means that always synchronizes while maintaining the phase difference after searching for
Empty packet generation means for generating and outputting packets
Each of the two or more input signal systems, the buffer
Input signal system delayed by the
Empty packet signal system generated by
Signal selection means for selecting and outputting the working system output from theBe prepared
I can. Further, based on an external switching request signal,
Switch from the current system output to another input signal system.
Operation, the phase of the active system output is changed to another input signal.
The signal selection means
IsAt the time of the switching request, the
All valid packets are sent to other input signal systems.
Empty packets are inserted until they appear, and empty packets are
Stop insertingSwitch to other input signal system,
The phase of the working system output is behind the phase of the other input signal system.
When the signal is selected, the signal selection means is controlled by the buffer.
Switch to the input signal system delayed by
Interval of a specified number of packets or more for the specified input signal system
Deletes empty packets that appear in
No phase delay between the input signal system and other input signal systems
Switch to another input signal system when
Features. [0024] According to the present invention, normal operation without switching is performed.
In use, no delay is inserted into the working system,
Delays in the entire network can be reduced. Ma
In addition, the working system and the non-working system are
Synchronous state even if the packet flow differs from
Can be switched off after the switching request is given.
The time until the replacement can be shortened. The delay insertion is performed only at the time of switching.
It is. In other words, during normal operation,
No delay is inserted to maintain synchronization with the
Is more advanced than other signal systems,
It can pass through the signal selection means only with transmission delay
You. Therefore, as in the case of the constant synchronization method, each signal is always
Network delay is not added without delay of system phase difference.
The delay amount of the entire network can be reduced. Furthermore, virtually, the phase difference by the always synchronous method is used.
Absorption can be performed, so that the effect of the constant synchronization method can be obtained.
In the period other than the time of switching,
Even if there is a packet inserted into the device,
Instantaneous interruption switching can also be performed. [0028] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, preferred embodiments of the present invention will be described with reference to the drawings.
explain. Therefore, in this embodiment, the necessity of B-ISDN
Transmission by ATM transmission method which is elementary technology, switching equipment, etc.
In, switching of transmission path or virtual path (VP) etc.
It is possible to realize virtual synchronous type instantaneous interruption switching performed without interruption
It is configured as follows. FIG. 1 is a functional block diagram of the hitless switching device.
You. In FIG. 1, the instantaneous interruption switching device includes a 0-system input terminal.
Terminal 101, the first system input terminal 102, and the switching signal 103
, User cell detectors 104 and 105, and selector 10
6, 107, a buffer 108, a control unit 109,
Match comparison unit 110, empty cell generation unit 111, selector 1
12 and an active system output terminal 113. In FIG. 1, the 0-system input terminal 101
The signal input from the input port P1 of the selector 112
And the user cell detection unit 104, select
Input port 0 of the selector 106 and the selector 107 respectively.
Given. Also, the input from the 1-system input terminal 102
The signal is provided to input port P4 of selector 112.
Together with the user cell detection unit 105, the selector 106,
The input is provided to input port 1 of selector 107. The user cell detection units 104 and 105
Monitors input signals of system 0 and system 1, respectively, and only user cells
To indicate that the input signal is a user cell.
A user cell detection signal is provided to the control unit 109. Also,
The selector 106 outputs 0, 1 input to the input ports 0, 1
Of the system signals, the phase is advanced (or if
) Signal from the control unit 109 to the S1 port.
Select by system selection signal and output to buffer 108
Things. Further, the selector 107 has input ports 0, 1
Phase of the 0- and 1-system signals input to the
Or it is assumed that the signal is delayed)
System selection signal to the S2 port (given to selector 106)
Selection signal is inverted. Select by) and match ratio
Output to the comparing unit 110. Therefore, selectors 106 and 10
7 does not select signals of the same system at the same time. The buffer 108 further includes a selector 1
The phase selected in 06 is advanced (or advanced)
The system signal is recorded by the control unit 109.
Read control is performed. Read by this buffer 108
The output signal is shared with the selector 112 when given.
To the matching comparison unit 110 in the same manner. The match comparing section 110 stores the buffer 1
08 and the signal output from the selector 107.
Compared signals on a cell-by-cell basis to control match / mismatch results
This is given to the control unit 109. Further, the empty cell generator 1
In step 11, an empty cell is generated and the input port of the selector 112 is input.
To P3. Further, in the selector 112, the control unit 10
9 to S3 port, P1 to P3
From among the input signals up to 4, select the signal to be output as the active system.
And outputs it to the active system output terminal 113. Ma
Further, the control unit 109 includes the user cell detection units 104, 10
5 and an input signal from the match comparison unit 110
System selection of the data 106 and 107 and read control of the buffer.
Selection according to the switching request from the switching signal terminal 103.
The controller 112 controls the technician 112. (User cell detectors 104 and 105):
  The user cell detection units 104 and 105 are respectively 0 system,
The input signal of system 1 is constantly monitored and empty cells, OAM cells,
Different position in cell flow of system 0 and system 1 such as resource management cell
Only cells, excluding cells that might be
User that detects and indicates that the input signal is a user cell
It outputs a cell detection signal. (Selectors 106 and 107): Select
The selectors 106 and 107 are two-input one-output selectors.
0 system and 1 system signals input to input ports 0 and 1
Of the signals specified by the control unit 109 are selected.
And output. The selector 106 and the selector 107 are always
Select different systems and select and output the same system at the same time.
And not. (Buffer 108): Buffer 108
Then, the cell of the system selected by the selector 106 is emptied.
All information including cells, OAM cells, resource management cells, etc.
Record and read out cells based on the control from the control unit 109.
Then, the reading is stopped and the reading is skipped. (Match comparing section 110): Match comparing section 1
At 10, the cell read from the buffer 108 and the cell
The cells of the selected system are compared in the
Outputs a signal indicating match / mismatch as the comparison result
It is. At this time, whether or not they match is determined
(A) When all bits are compared and all match,
(B) Compare all the bits and check if more than a preset number
(C) limit the bits to be compared,
Are all the same, and so on.
Either method can be applied. (Empty cell generator 111): Empty cell generation
The unit 111 always generates an empty cell and outputs it to the selector 112.
I'm working. (Selector 112): Selector 112
Is a four-input one-output selector, and the finger of the control unit 109 is
As shown, any of the input ports from P1 to P4
Determine whether to select a port and enter it into the selected port
And output the incoming signal. (Control unit 110):
Performs virtually no processing on the active system in operation.
Control and switching to keep cell phase synchronized at all times
The system switching control from the active system to the standby system is performed according to the instruction.
You. Hereafter, the virtual cell phase synchronization method and switching flow are included.
Therefore, the instantaneous interruption switching method of this embodiment will be described in detail.
You. "Virtual constant cell phase synchronization method and switching
Rho: (Overview) The current information entered during normal network operation
The system signal is output as it is, and
To keep the working system and the standby system constantly synchronized,
Absorb the phase difference between both systems. Virtually always in sync
Can be switched without interruption when the
it can. To create a virtual constantly synchronized state,
Starting from the phase difference search of the system, phase difference search, synchronization confirmation,
Maintains synchronization by transitioning between three modes such as synchronization monitoring
can do. The constantly synchronized state is defined as the above three modes.
This indicates when the mode is in the synchronous monitoring mode.
You. (Method of Establishing Phase Synchronization): FIG.
It is explanatory drawing showing the state transition of three modes. initial state
Is a phase difference search mode S1, in which cells of both systems are compared.
Search for the phase difference and find any cell that matches at least one
Then, the mode shifts to the synchronization confirmation mode S2. Further, in the synchronization confirmation mode S2, the phase difference search is performed.
After the cell matched in the search mode S1, synchronization is really established.
Check whether or not the phase difference has been reached, and search for a phase difference when M cells do not match consecutively.
Return to the mode, and go to the synchronization monitoring mode S3 when the L cells match continuously.
It is a transition. Further, in the synchronous monitoring mode S3, the synchronous
After the synchronization establishment is confirmed by the confirmation mode S2, the synchronization
Monitor for any loss. here,
Loss of synchronization due to non-consecutive N cells
It returns to the search mode S1. Here, each value of L, M, and N is one or more integers.
It is a numeric value,
Differences in communication methods, communication channel characteristics, and
It is preferable to set an appropriate value depending on the reliability
New The detailed operation flow in each mode will be described below.
Will be described with reference to FIG. ((Phase difference search mode)): FIG.
It is an operation | movement flow of a phase difference search mode. In this figure 3
First, in the phase difference search mode (S100), the buffer
108 is cleared (S101). Initial setting stage
On the floor, it was not possible to determine which phase was advanced.
First, assuming that the phase of system 0 is advanced, start the search
I do. The buffer 108 is selected by the selector 106.
Of the selected cells of system 0, the user cell that passed first
Start writing to the top and change the top user cell
Read (S102). Buffer in phase difference search mode
The operation of 108 is such that the input cells are
In addition, the reading is the first recorded (stored)
Only. Hereafter, this is called "buffer continuous reading".
Huh. Next, the data is read out by the buffer continuous reading.
And the user cell of system 0
The obtained cells of the first system are compared in cell units (S103). This
When a match is detected in the cell match comparison in S103 of
The mode shifts to the synchronization confirmation mode (S109). Also, this S
If a mismatch is detected in the cell match comparison of step 103,
Check if buffer 108 is full (FULL)
(S104) If it is not full, it is said that system 0 is advanced
Then, the process returns to the continuous reading of S102 with the assumption. If it is full, the phase is advanced.
The system assumed is changed to system 1 and the phase difference search is continued.
This phase difference search method assumes that the phase of the 0 system is advanced.
Is exactly the same as what was done. That is, first buff
The content of the key 108 is cleared (S105), and the selector 10
User who passed first among the cells of the first system selected in 6
Start writing with the cell at the top, and
The cell is read (S106). Next, the data is read out by the buffer continuous reading.
And the user cell selected by the selector 107.
The obtained cells of system 0 are compared in cell units (S107). This
If a match is detected in S107, the synchronization confirmation mode
The process moves to (S109). Also, there is no match in this S107.
Is detected, whether the buffer 108 is full
(S108), and if it is not full, system 1 advances.
Then, the process returns to S106 under the assumption that On the other hand,
If it is a system that assumes that the phase is advanced,
Is changed to 0 system again, and it returns to the buffer clear of S101.
You. From then on, until a matching cell appears,
The operation is repeated. ((Synchronization confirmation mode)): FIG.
It is an operation | movement flowchart of the synchronization confirmation of an Example. This figure 4
In the synchronization confirmation mode (S109), the user
Based on information from the cell detector 104 or 105,
Next, the cell selected / output in the
It is determined whether or not the cell is the cell (S110). In the determination at S110, the user cell
If not, the reading of the buffer 108 is stopped.
(S111). This allows the system to be delayed in phase
Even when fluctuations occur due to empty cells, etc.
This is to keep track of user cells. Next, after the buffer reading is stopped, the buffer
The cell read next from the user 108 is a user cell
It is determined whether or not (S112). Where in the user cell
If it is determined that there is, go directly to the determination of S110
Reverse processing. If it is not a user cell,
The cell is skipped (S113). In addition, the next cell
In order to determine whether the cell is a user cell, the
Return to disconnect. As a result, the phase is advanced in the opposite way
Also when there is fluctuation due to empty cells etc.
Since the target user cell is not lost
is there. In the determination of S110, the next selection
-If the output cell is a user cell,
When fluctuation occurs due to empty cells etc. in the advanced system
To keep track of the user cells to be compared.
The next cell read from the file 108 is a user cell.
It is determined whether or not it is (S114). And the user cell
If not, the cell is skipped (S115). Ma
If the cell is a user cell, read the cell sequentially
(S116). This is displayed as a
Buffer sequential reading ". Reading by this “buffer sequential reading”
User cell selected and output from selector 107
User cells are compared in cell units (S117). this
As a result, if there is a mismatch, the mismatch is continuously
It is determined whether or not it has occurred continuously (S11).
8). Here, when less than M cells, the next user cell is
Return to the judgment of S110 for comparison, and
If the phase difference is not
Return to the search mode (S100), and again from the phase difference search
It is a repetition. Further, a match is detected in the cell match comparison in S117.
If a match is issued, the match is continuously generated for L cells continuously.
It is determined whether it is the same (S119). Here, less than L cell
In the case of, in order to compare the next user cell,
Return to the judgment, and if it is an L cell, put the phase in the synchronized state
It is assumed that the synchronization monitoring mode (S1
The processing shifts to 20). ((Synchronous monitoring mode)): FIG.
6 is an operation flowchart of a synchronization monitoring mode according to the embodiment. This
5 in FIG. 5, in the synchronous monitoring mode (S120),
Low is almost the same as the synchronization check mode,
S121 to S129 of the visualization flow are respectively synchronization confirmation files.
Corresponding to S110 to S118 of the row, the same processing is performed.
Is Umono. The difference between the two modes is that
Cell continuous match detection for determining synchronization establishment in S119
The output unit is not in the synchronization monitoring mode, and the cell match comparison unit S12
If they match at 8, the synchronization is maintained
Think, and immediately move to the next user cell comparison operation.
Are characteristically different. (Example of Establishing Phase Synchronization) FIG.
Using the phase synchronization establishment method described in
Example of operating when assuming a signal input to the system
It represents. In FIG. 7, the vertical direction represents time t.
The horizontal direction represents the state at the time t. So
Here, the meaning of each element is as follows. 0-system input: input at time t from the 0-system input terminal 101
cell 1-system input: input at time t from the 1-system input terminal 102
cell Buffer memory contents: stored in buffer 108
Cell contents P1... Input cell to input port P1 of selector 112 P2: Input cell to input port P2 of selector 112 P3: Input cell to input port P3 of selector 112 P4: Input cell to input port P4 of selector 112 Working system output: output cell of selector 112 In the example of FIG. 7, the position of the input cell
The phase is advanced and the active system is 0 system.
You. Furthermore, in order to distinguish cells of system 0 from cells of system 1,
Cells of the same content, cells of type 0 are capitalized, cells of type 1 are small
Expressed in characters. First, the operation is started from the phase difference search mode. This
In the phase difference search mode of
Start search, but buffer is full (FULL)
The same cell cannot be detected even if the match comparison is performed until
Therefore, assuming that system 1 is advanced, start searching again.
(S105 and subsequent steps). Next, at "time t = 0" in FIG.
The input cell is Y, and the input cell for system 1 is a.
Assumed cell 1 of system 1 is written to buffer 108
And read out by continuous reading out of the buffer
(S106). Here, the cell match comparison target is
Cell a (= input to P2) read from buffer 108
Force cell) and the output of the selector 107 (the delayed system
Mar. 0-system input = input to P1) Cell Y
No, wait for next input. In this case, the active system output
(Output of selector 112) as cell Y of the 0 system (= P
1) is output. Next, at "time t = 1", the 0-system input is
Empty cell, 1st system input is empty cell, 1st system empty cell is
To the buffer 108 and to read the buffer continuously.
Therefore, the cell a written at t = 0 is read out.
(S106). Here, the cell match comparison target
Is the cell a (= input cell to P2) and the selector 1
It is an empty cell of the output of 07.
wait. The output of the current system is an empty cell of system 0 (=
(An input cell to P1). Next, at "time t = 2", the 0-system input is
Cell Z, the input of system 1 is cell b, and cell b of system 1 is
In addition to writing to the
Therefore, the cell a written at t = 0 is read out.
(S106). Here, the cell match comparison target
Is the cell a (= input cell to P2) and the selector 1
07 is the cell Z of the output.
wait. In this case, the output of the active system is set to the
(Z) (= input cell to P1). Next, at "time t = 3" in FIG.
When input is empty cell, system 1 input is empty cell, and t = 1
The same processing is performed. Therefore, empty cells are stored in the buffer 108.
Is written and the match does not match,
Output the empty cell of system 0 as the active system output, and wait for the next input.
One thing. Next, at "time t = 4", the 0-system input is
Cell A, input of system 1 is empty, and empty cell of system 1 is empty.
To the buffer 108 and to read the buffer continuously.
Therefore, the cell a written at t = 0 is read out.
(S106). Here, the cell match comparison target
Is the cell a (= input cell to P2) and the selector 1
07 is the output of cell A, which matches the
Output cell A of system 0 (= input cell to P1)
At the same time, the mode shifts to the synchronization confirmation mode. Next, at “time t = 5”, the active system input
Is an empty cell, the input of the standby system is cell c, and the cell c of system 1 is
The data is written into the buffer 108 and the selector 107
Output (= 0 input) is an empty cell (S10
7) Stop reading the buffer.
Since the cell to be read out is an empty cell (S112),
Empty cells are skipped (S113), and the next input is waited for. This operation results in the cell b being backed up.
Become the head of the fa. Also, in this case,
Is the one that outputs an empty cell of system 0 (= input cell to P1)
It is. Next, at "time t = 6", the 0-system input is
Cell B, input of system 1 is empty, and empty cell of system 1 is empty.
File and the output of the selector is also buffered.
Since both the read cells of the buffer are user cells (S11
0, S114), cells of system 1 by buffer sequential reading
b is read out and compared with the cell B of the 0 system. here,
The comparison result is a match, but not a match L times in a row
So we wait for the next input. Next, "after time t = 7", t = 5 and t =
6. Repeat the process performed in step 6, and the result of the match comparison is repeated L times
If they match, the mode shifts to the synchronous monitoring mode. Also
If a mismatch is detected M times in a row,
The processing is performed from the phase difference search mode. (Switching Flow): FIG. 6 shows an embodiment.
6 is an operation flowchart of switching of FIG. In this figure 6
Switching request by external control (S20
When 0) is given, first, synchronization monitoring capable of instantaneous interruption switching
It is confirmed whether or not the mode is set (S201). If the mode is not the synchronous monitoring mode, specify it in advance.
Enters the synchronization monitoring mode until the specified time (phase synchronization is established).
If the specified time has not passed, wait until
Step 201 is repeated (S202). Synchronous even after waiting for the specified time
If the monitor mode is not set, phase synchronization cannot be achieved (and
Cannot be used).
Then, the system is switched to the standby system (S203). At this time
When the active system is 0 system, the
Switch from port P1 to port P4. The current system is 1 system
In the case of, switch the input selection from port P4 to port P1
You. Naturally, no instantaneous interruption switching is performed at this time. In the determination of the synchronization monitoring mode in S201,
Then, if the mode is the synchronous monitoring mode,
Is it advanced or is the phase of the standby system advanced?
Is checked (S205). Here, the phase of the working system advances.
The cell stored in the buffer 108
Active cell, already output to active output terminal 113
Is completed, and at the same time,
This is a cell that has not appeared. If the system is switched to the standby system as it is,
Cells with the same contents are output redundantly.
Cells that have been forced, that is,
All cells with the same contents as the cells stored in
Only after appearing in force can you switch. Therefore, the cell stored in the buffer is
Until all cells with the same contents appear in the standby system input,
The timing is adjusted by inserting an empty cell (S20).
6). At this time, the selector 112 is
(Port P1 for system 0, port P4 for system 1)
To port P3, which is the input from empty cell generator 111
Switch. Thereafter, the input cells of the standby system and the buffer output
Synchronous monitoring (cell match comparison) to compare
(S207), stored in the buffer at the time of the switching request
Wait for all cells that have appeared in the standby system input
(S208). Return to S207 until all appear, and
Continue period monitoring. Therefore, when all cells have appeared,
The insertion of the cell is stopped, and the mode is switched to the standby system (S209).
That is, the selector 112 inputs the standby system from the input port P3.
Power port (port P4 when the current system is system 0, system 1
At times, switching to port P1) is performed. By this
Thus, the instantaneous interruption switching is completed (S214). In the determination of S205, the current system
If the phase of the standby system has not advanced, that is,
In this case, the cells stored in the buffer 108
And the synchronous monitoring mode means that:
Synchronization between the input of the active system and the buffer output is established.
Is shown. Therefore, in this case, the switching request
If there is, switch from the active system to the buffer output immediately.
(S210). However, the switching timing is
Both the output of the buffer 108 and the output of the selector 107 are
User cell, and until then the synchronous monitoring mode
Maintain the operation of the network. At this time, the selector 112 selects the active system
Power port (When the active system is system 0, port P1 and system 1
Port P4) to input port from buffer 108
Is switched to port P2. Note that only the buffer output is switched here.
Now, the delay equivalent to the number of cells stored in the buffer
This delay is actually slowed down
Spare system with various reductions and ultimately no delay
It is necessary to change to the input port P1 or P4. This late
The reduction of delay is achieved by discarding empty cells.
However, if empty cells are discarded without planning,
Is likely to shrink rapidly (user cell speed will increase)
UPC (Usage Parameterator C)
ontrol: value reported by the user (average speed / peak
Function to monitor the speed of the user cell by speed)
Causes user cells to be discarded in the network
there is a possibility. Therefore, discarding an empty cell affects the UPC.
In consideration of the above, the operation is performed once for x cells, and the interval is sharply reduced.
The delay is gradually reduced so as not to be rounded (S211). However
However, since there is not always an empty cell every x cells,
After discarding one empty cell, wait for x cells to pass,
Empty cells that appear for the first time later are discarded. Where x
Has a smaller effect on UPC as described above.
It is preferable to set such a value. In this way, the delay is gradually reduced.
To see if the buffer is empty
(S212), and if not, S
Return to 211 empty cell discard, further reduce delay,
When a standby system is selected, a standby system is selected (S213). At this time
The selector 112 connects the input port P2 to the standby input port.
(If the active system is system 0, port P4; if it is system 1, port P4
Switch to port P1). This allows for uninterrupted
The switching is completed (S214). (Example of Switching Operation) FIG. 8 shows an embodiment of the present invention.
Switching operation when system 0 is active and system 1 is advanced
It is explanatory drawing of a sample. 8 is based on the phase synchronization described above.
As explained in the example of establishment,
The eyes are increasing. Here, the time indicated by 1 is switched
The time when the request occurred. The state in which phase synchronization has already been performed is described.
Of the empty cell discard in S211 of the switching flow.
The value of x indicates the operation when it is set to 2 for simplicity.
You. In FIG. 8, "time t = 0 to t =
Up to 3 ”, since the synchronous monitoring mode is set, the buffer 10
8 and the output of the selector 107 are synchronized.
And perform the processing shown in the phase synchronization establishment example.
ing. The active system output at this time is the active system 0 system.
Input (input to P1) is selected as it is and output
ing. However, a switching request occurs at time t = 3.
Therefore, the switching operation is performed from the next “time t = 4”. At "time t = 4", the synchronous monitoring mode
(S201), the phase of the active system 0 is delayed.
(S205), the input port of the selector 112
Can be changed from P1 to P2 buffer output immediately.
It is possible. However, at time t = 4, the selector 107
Is an empty cell, so that the output of the selector 107 is
Switching is not performed until a user cell appears. The output of the selector 107 is the user cell
Until appears, the synchronization confirmation mode is continued. At this time
In the active system output, an empty cell of the active system 0 is output.
You. Next, at "time t = 5", the selector 1
The system 0 input cell which is the output of 07 is cell B,
Cell. Also, the head of the buffer memory is
, The operation in the synchronous monitoring mode is performed here.
And change the buffer read mode to include empty cells, etc.
After changing to the sequential reading mode, the system is switched. Actually, the selection of the input port of the selector 112 is performed.
The selection is changed from P1 to P2. With this, the active system output
Indicates that cell b of the first system stored in the buffer is selected and output.
Is forced. From now on, the delay given by the buffer
(1 system) empty input to buffer to reduce
The cell is discarded every x (= 2) cells.
U. Next, at "time t = 6", the buffer
Since the first cell of force is an empty cell, the empty cell is discarded here.
Not written to the buffer to x = 2
Therefore, the next empty cell discard timing is time t = 8.
The output of the active system at this time is read from the buffer read mode.
Mode is in sequential read mode, including empty cells.
Therefore, the empty cell stored next to the cell b is output. Next, at "time t = 7", the buffer
The first cell of force is cell d and is written to the buffer
At the same time, empty cells are read out sequentially by reading,
Output as output. Next, at "time t = 8", the buffer
The first cell of the force is cell e, and at the empty cell discard timing
Yes, but cannot be discarded. Thus, cell e is buffered
Cell c is read by sequential reading while being written
And output as the active system output. Empty cell
Wait until the next empty cell is input to the buffer.
It is. Next, at "time t = 9", the buffer
Since the first cell of force is an empty cell, the empty cell is discarded here.
Do not write to the buffer. Where the disposal
As a result, the next empty cell discard timing is time t = 11.
It is. At this time, the active system output is output from the buffer.
The cells d sequentially read are output. Next, at "time t = 10", the buffer
The input first cell is cell f, which is written to the buffer.
At the same time, the cell e is read out by sequential reading,
It is output as a system output. Next, at "time t = 11", the buffer
Input system 1 cell is empty cell, empty cell discard timing
This empty cell is discarded without writing to the buffer.
Abandon it. The disposal at this point
The only cell stored in the buffer is cell f.
Sometimes, the buffer output is read as the active output.
It becomes a state called "empty". Therefore, at time t = 12, select
The input port of the data 112 is changed from P2 to P4 (S21
3) By outputting the 1-system input cell g to the active system output
Thus, the instantaneous interruption switching is completed (S214). FIG. 9 shows that the first system in one embodiment is the active system and the first system.
It is explanatory drawing of the switching operation example when a phase advances. This
9 in the same way as FIG.
is increasing. The time indicated here is a switching request
Is the time at which the event occurred. Also, as in FIG.
The value of x.
The operation when 2 is set for simplicity is shown. First, the synchronous monitoring is performed until “time t = 0 to t = 3”.
In the viewing mode, the output of the buffer 108 and the selector
The output of 107 is in a synchronized state,
The processing shown in the example of period establishment is performed. At this time
The output of the active system is the input of the active system (input to P4).
Force) is selected and output as it is. However, time
At t = 3, a switching request is generated, so the next time t
= 4, the switching operation is performed. Next, at “time t = 4”, the synchronous monitoring mode
(S201), the phase of the active system 1 is advanced.
(S205), the input port of the selector 112
Immediately change the output from P4 to the output of the empty cell generator of P3
Then, an empty cell is inserted as the active system output. Then compare
Continues synchronous monitoring mode in which the target cell is extended to valid cells
I do. At time t = 3 when a switching request is made,
Write last in the cells stored in the buffer
The valid cell is a cell b input at time t = 3.
Therefore, a cell having the same content as this cell b is
Empty until it appears at a certain 0-system input (output of selector 107)
Continue inserting cells. Then, at time t = 4, the 0 system enters
Since the force is an empty cell, it waits for the next input cell
(S208). Next, at "time t = 5", the 0-system input
(Output of selector 107) is cell B, and a switching request
Same as the last valid cell b stored in the buffer
Since it is a cell with contents, at this point,
The cell that has been output is the standby system input (0 system input).
It has appeared (S208). Therefore, at time t = 5
Indicates that the selector 112 still outputs an empty cell (port P3)
However, the next cell input timing, that is, time t = 6
Can be switched. Next, at "time t = 6", the cutoff is performed as described above.
Perform the replacement operation. Then, in the selector 112,
From the input (port P3) from the cell generation unit, the standby system (0
Change the selection to the input (port P1) of the
Output an empty cell of system 0 (S209). By this
Completes the instantaneous interruption switching (S214), and thereafter, the 0 system
It is operated as an active system. (Effects of one embodiment): One embodiment described above
According to the non-stop switching device of
There is no delay to keep the synchronization between the two systems.
If the transmission path is shorter than the protection transmission path,
If the working phase is ahead of the backup phase,
Pass through the selector only with the transmission delay of the transmission path length
Can be. The selector operates during a period other than the time of switching.
Is at least two or more input signal systems
And the delayed input signal system and the empty cell generation unit 111
Therefore, of the empty cell signal system generated,
The working system input signal system is used as it is as the working system output signal system.
Selective output, switch signal is given and shift to switching operation
Sometimes the phase of the working system output signal system is advanced, or
One of the input signal systems depending on whether
Selective output for virtually constant synchronization and switching request
Sometimes, the active system output can be switched immediately. Therefore, as in the case of the always synchronized method,
No phase difference delay is added,
The delay amount as a whole can be reduced. Further, virtually, the phase difference by the always synchronous method is used.
The advantage of the constant synchronization method is impaired due to absorption
In addition to the above, the cell flow of both systems, during periods other than when switching
Cells inserted in different positions other than empty cells (OAM
Cell / resource management cell).
You can keep the deadline. Further, since the configuration of the apparatus is simple, the LS
It is also suitable for I
it can. Also, there are no factors that increase power consumption
It is considered to be effective. Therefore, transmission in an ATM communication system
It is very effective when applied to equipment and exchange equipment.
It is thought that. (Other Embodiments) (1) In addition,
In this embodiment, two inputs are used.
Provision of several systems, one of which is working and the others are spare
A configuration such as a system can also be used. Also,
Although described as an instantaneous interruption switching device, in general, the signal system
It can be applied as a selective output device. (2) For switching transmission lines between devices
However, the present invention is also applicable to switching of redundant components in the apparatus.
In addition, not only switching of physical transmission paths, but also logical
To the switching of the service (VP). (3) Further, in the above-described embodiment, the system 0 advances.
Has started the phase difference search on the assumption that
May be assumed to be advanced. (4) Further, the cells of the ATM transmission system are
It is explained as the method used, but fixed length packets,
Similarly, if the packet communication uses variable-length packets,
Applicable. (5) The selectors 112, 106, 1
07 are gate circuits, flip-flop circuits, shift circuits,
Implemented with a register circuit, memory, and a composite circuit of these
Is considered preferable in terms of miniaturization and low power consumption.
Can be [0121] As described above, the signal system selection of the present invention
The output device receives at least two signal systems.
One of the input signal systems is selected as the active system output.
Input signal system output device, each input
User packet for detecting user packet from signal system
The detection means is out of phase with the other input signal systems
While delaying the input signal system, other input signal systems
A buffer that stores the input signal system whose phase is
And the user packet of the input signal
And the input signal system delayed by the buffer.
A match comparison means for comparing the match with the user packet;
Input signal system whose phase is advanced from the result of
Delay to control the amount of delay that delays the phase of a packet
The amount control means and the packet matched by the match comparing means
After this search, and after this search, synchronization is always performed while maintaining the phase difference.
Synchronization means and empty packet generator for generating and outputting empty packets
And input signals of at least two systems
System, the input signal system delayed by the buffer,
Empty packet generated by the empty packet generator
Signal to select and output the active system output from any of the signal systems.
Signal selection means, based on a switching request signal from outside.
Switch from the current system output to another input signal system
When transitioning to operation, the phase of the active system output is
When the phase of the signal system is advanced, the signal selection means
IsAt the time of the switching request, the
All valid packets are sent to other input signal systems.
Empty packets are inserted until they appear, and empty packets are
Stop insertingSwitch to other input signal system,
The phase of the working system output is behind the phase of the other input signal system.
When the signal is selected, the signal selection means is controlled by the buffer.
Switch to the input signal system delayed by
Interval of a specified number of packets or more for the specified input signal system
Deletes empty packets that appear in
No phase delay between the input signal system and other input signal systems
Switch to another input signal system when
Features. By adopting such a configuration, a simple configuration
In normal operation other than switching, the delay of the selected output of the active system
Switching time can be shortened, and switching can be performed without interruption
Things. Therefore, the present invention can be applied to transmission in ATM communication.
Very effective when applied to transfer equipment and exchange equipment
It is considered to be.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a functional configuration diagram of a hitless switching device according to an embodiment of the present invention. FIG. 2 is a state transition diagram for establishing phase synchronization according to one embodiment. FIG. 3 is a flowchart illustrating a phase difference search according to an embodiment; FIG. 4 is a flowchart of a synchronization confirmation operation according to one embodiment. FIG. 5 is a flowchart of a synchronization monitoring operation according to an embodiment. FIG. 6 is a switching operation flowchart of one embodiment. FIG. 7 is an explanatory diagram of an example of establishing phase synchronization (when the first system is advanced) according to one embodiment; FIG. 8 is an explanatory diagram of a switching operation in a case where the 0 system is an active system in one embodiment. FIG. 9 is an explanatory diagram of a switching operation when one system of the embodiment is an active system. [Description of Signs] 101 ... 0 system input terminal, 102 ... 1 system input terminal, 103
... Switching signal input terminals, 104, 105 ... User cell detection units, 106, 107, 112 ... Selectors, 108 ... Buffers, 109 ... Control units, 110 ... Match comparison units, 111 ...
Empty cell generator 113, working system output terminal.

Claims (1)

(57) [Claim 1] In a signal system selection / output device which receives at least two or more signal systems and selects and outputs one of the input signal systems as an active system output, User packet detecting means for detecting a user packet from a system, and delaying an input signal system having a phase advanced from other input signal systems and storing an input signal system having a phase advanced from the other input signal systems A buffer that performs matching between the user packet of the input signal system that has not been delayed and the user packet of the input signal system that has been delayed by the buffer. A delay amount controlling means for controlling a delay amount for delaying a phase of a packet of an input signal system having the same; A packet to be searched,
Synchronizing means for constantly synchronizing while maintaining the phase difference after the search, empty packet generating means for generating and outputting empty packets, at least two or more respective input signal systems, an input signal system delayed by the buffer, An empty packet signal system generated by the empty packet generating means,
Signal selection means for selecting and outputting the active system output from any one of the above. When the operation is switched from the active system output to another input signal system based on an external switch request signal, the active system output is selected. When the phase of the input signal system is ahead of the phase of the other input signal system ,
The same packet as a valid packet stored in the above buffer
Empty packets until all packets appear on other input signal systems
When all appear, the insertion of empty packets is stopped and switched to the other input signal system. When the phase of the working system output is behind the phase of the other input signal system, The signal selecting means switches to the input signal system delayed by the buffer, deletes empty packets appearing at intervals equal to or more than a predetermined number of packets in the delayed input signal system, and outputs the delayed input signal system. A signal system selection / output device that switches to another input signal system when the phase delay between the system and another input signal system is eliminated.