JP3387454B2 - Semiconductor device, semiconductor memory, and method of manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to PZT (Pb (Ti _x Zr _y )
A semiconductor memory having a capacitor structure using a ferroelectric film such as O ₃ ) or a CM using a polycrystalline silicon gate
The present invention relates to a protective film structure in an OS semiconductor integrated circuit and a film forming method thereof.

[0002]

2. Description of the Related Art Conventionally, a semiconductor non-volatile memory cell having a storage capacitor structure using a ferroelectric substance is
For example, the structure shown in FIG. 6 is provided. In this memory cell, a single transfer gate transistor (MOS transistor) T is connected in series with a storage capacitor (capacitor) C using a ferroelectric film. The transfer gate transistor T is formed on the p-type semiconductor substrate 1 via the gate insulating film 2 and is formed of a polycrystalline silicon gate 3
And source / drain regions 4 and 5 which are high-concentration n-type regions formed in self-alignment on the surface side of the p-type semiconductor substrate 1 by using the polycrystalline silicon gate 3 as a mask. The source / drain region 4 is connected to the bit line, and the polycrystalline silicon gate 3 is connected to the word line. On the other hand, the storage capacitor C is formed in a groove on a LOCOS (local oxide film) 6, which is a field oxide film. On the LOCOS 6 and the polycrystalline silicon gate 3, a first interlayer insulating film 7 of SiO ₂ or SiN is formed by, for example, CVD, and a portion of the interlayer insulating film 7 just above the LOCOS 6 is formed by the sputtering method. A lower plate electrode 8 of platinum (Pt) is formed. A dielectric film 9 of PZT (Pb (Ti _x Zr _y ) O ₃ ) which is a ferroelectric is formed on a part of the lower plate electrode 8 by a sputtering method or a coating method. An upper flat plate electrode 10 made of platinum is formed by sputtering. Next, a second interlayer insulating film 11 made of, for example, SiO ₂ by CVD or SiN by sputtering is formed on the first interlayer insulating film 7, and Al is formed on this interlayer insulating film 11 by sputtering.
Wiring is formed. The Al wiring 12a is a cell internal wiring for electrically connecting the source / drain region 5 and the upper plate electrode 10 through the contact hole, and the Al wiring 12b is a ground wiring for electrically connecting the lower plate electrode 8 and a pad portion (not shown). Although not shown in FIG. 6, the word line conducting to the polycrystalline silicon gate 3 and the bit line conducting to the source / drain region 4 are formed in the same layer as the Al wiring. A SiN passivation film 13 is formed on the Al wirings 12a and 12b by a sputtering method.

[0003]

The ferroelectric substance PZT (Pb (Ti _x Zr _y ) O ₃ ) used for the dielectric film 9 has a hysteresis curve with respect to an electric field and remains when the write voltage is removed. Since it keeps polarization, it is used as a non-volatile memory as described above, and has a relative dielectric constant of about 1000, which is two or more orders of magnitude larger than that of a SiO ₂ film, so it can also be used as a dynamic RAM capacitor. Used.

However, when exposed to hydrogen, the value of remanent polarization decreases, and the width (margin) of the binary logic required for the memory function becomes narrow. Moreover, the value of the relative permittivity also decreases. Since such characteristic deterioration causes a reduction in yield, it is necessary to consider a film forming method that does not expose hydrogen to the dielectric film 9 after the step of forming the dielectric film 9.

When SiN is formed by the plasma CVD method or SiO ₂ is formed by the atmospheric pressure or the low pressure CVD method, since it is in a hydrogen atmosphere during the film formation, when these films are formed on the dielectric film 9, hydrogen is generated as a dielectric film. These film forming methods cannot be adopted because they enter the body film 9 and deteriorate its characteristics. Therefore, in the structure of the conventional nonvolatile memory, the second interlayer insulating film 11 and the passivation film 13 are SiN films formed by the sputtering method. This is because the film is formed by the process of not releasing hydrogen. On the other hand, the passivation film 13 is originally required to have a moisture resistant and dense film quality, but the SiN film formed by the sputtering method is not suitable as a passivation film because it lacks the denseness of the film quality and is inferior in moisture resistance. The present invention solves the above-mentioned problems, and its object is to employ a film forming method for preventing hydrogen from penetrating into the ferroelectric film on the upper part of the ferroelectric film to obtain a residual polarization and a relative dielectric constant. It is an object of the present invention to provide a semiconductor device including a ferroelectric film having a high ratio as an element and a manufacturing method thereof.

[0006]

Particularly, in a semiconductor device having a capacitor structure using a ferroelectric having poor hydrogen resistance such as PZT, the means taken by the present invention is formed by, for example, a sputtering method or a coating method. A moisture-resistant hydrogen barrier film is formed on the ferroelectric film by a non-hydrogen-releasing film forming method. The coverage of the hydrogen barrier film is not limited to the entire surface, and may be any area that covers the capacitor structure. The hydrogen barrier film may be a TiN film formed by a sputtering method or an oxygen invasion type TiON. The TiON film is formed by plasma treatment or heat treatment of a TiN film in an oxygen atmosphere, a sputtering method using a Ti target in a nitrogen and oxygen atmosphere, or a TiON sputtering method.
TiON is electrically conductive when the oxygen content is low and insulating when the oxygen content is high. Further, the TiON film having a high oxygen content has a high hydrogen blocking ability.

A corrosion prevention film (SiN formed by plasma CVD method) is directly formed on the hydrogen barrier film or via an interlayer insulating film.
Alternatively, a structure in which SiO ₂ or the like by a normal pressure or low pressure CVD method is adhered is also adopted. And to solve the above problems
Therefore, the semiconductor device of the present invention comprises: (1) a ferroelectric film and a ferroelectric film formed below the ferroelectric film.
Lower electrode and upper electrode formed on the ferroelectric film
In a semiconductor device having
The upper wiring and the wiring above the upper electrode.
Has an insulating hydrogen barrier film above at least a part of
It is characterized by (2) In the semiconductor device according to (1) above, the
The dielectric film is a PZT film. (3) The semiconductor device according to (1) or (2) above.
And that the hydrogen barrier film is an insulating TiON film
Is characterized by. (4) The semiconductor as described in any one of (1) to (3) above.
In the device, the hydrogen barrier film is covered on top of it.
It is characterized by having a corrosion prevention film. (5) In the semiconductor device according to (4) above, the corrosion
The corrosion prevention film is a SiN film. Also books
(6) The semiconductor memory according to any one of (1) to (5) above.
It is characterized by using a device. It also solves the above problems
Therefore , in the method for manufacturing a semiconductor device according to the present invention, (7) a ferroelectric film and a ferroelectric film formed below the ferroelectric film
Lower electrode and upper electrode formed on the ferroelectric film
In the method of manufacturing a semiconductor device including:
The process of forming the pole and the wiring connected to the upper electrode
The step of forming and the wiring above the upper electrode
Form an insulating hydrogen barrier film on at least a part
It is characterized in that it is provided with a process. (8) In the method of manufacturing a semiconductor device according to (7) above
And that the hydrogen barrier film is an insulating TiON film
Is characterized by. (9) In the method of manufacturing a semiconductor device according to (8) above
Using the plasma treatment method of the TiN film in the oxygen atmosphere
It is characterized in that a TiON film is formed. (10) In the method of manufacturing a semiconductor device according to (8) above.
And the TiN film is heat treated in an oxygen atmosphere to form Ti
It is characterized by forming an ON film. (11) In the method of manufacturing a semiconductor device according to (8) above.
And using a Ti target in an atmosphere of N ₂ and O ₂
Characterized in that a TiON film is formed by using a sputtering method.
It (12) In the method of manufacturing a semiconductor device according to (8) above.
Then, a TiON film is formed using the TiON sputtering method.
It is characterized by doing. (13) The half as described in any of (7) to (12) above.
In the method for manufacturing a conductor device, the hydrogen barrier film is formed.
After the step of applying, the corrosion barrier film is covered on the hydrogen barrier film.
And a process.

[0008]

When the moisture-resistant hydrogen barrier film formed by the non-hydrogen-releasing film formation method is covered on the upper part of the ferroelectric film, the hydrogen generated in the process after the ferroelectric film is formed, the ferroelectric film concerned. Can be prevented, and remanent polarization and a decrease in relative dielectric constant can be avoided. Therefore, it is possible to obtain a semiconductor device having a ferroelectric film with high remanent polarization and high relative dielectric constant. In the structure in which the corrosion prevention film is formed on the hydrogen barrier film, the hydrogen barrier film can be prevented from corrosion. Since this corrosion prevention film needs to have a dense film quality, it is inevitable to rely on a hydrogen-releasing film formation method, mainly by a CVD method. But,
Since there is a hydrogen barrier film in the lower layer, the problem of hydrogen penetration into the ferroelectric does not occur.

Although the above manufacturing method is a general-purpose means,
Insulating (high oxygen content) TiO as a hydrogen barrier film
When forming the N film, the above-mentioned step of forming the corrosion prevention film can be omitted.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the accompanying drawings.

[First Embodiment] FIG. 1 is a sectional view showing the structure of a semiconductor memory according to the first embodiment of the present invention.

On the surface of the p-type semiconductor substrate 1, a gate insulating film 2 by thermal oxidation and a thick oxide LOCOS (local oxide film) 6 for partitioning the active region of the MOS are formed. The transfer transistor T includes a polycrystalline silicon gate 3 formed via a gate insulating film 2, and a high concentration n formed by self-alignment on the front surface side of the p-type semiconductor substrate 1 using the polycrystalline silicon gate 3 as a mask. It is composed of source / drain regions 4 and 5 which are mold regions. On the other hand, the storage capacitor C is formed on a LOCOS (local oxide film) 6, which is a field oxide film.

First, a dense first interlayer insulating film (SiO ₂ or SiN) 7 is entirely formed on the LOCOS 6 and the polycrystalline silicon gate 3 by CVD. Then, a platinum (Pt) lower plate electrode 8 is formed directly above the LOCOS 6 in the interlayer insulating film 7 by a sputtering method. Next, a dielectric film 9 of PZT (Pb (Ti _x Zr _y ) O ₃ ) which is a ferroelectric is formed on a part of the lower plate electrode 8 by a sputtering method or a coating method. Then, a platinum upper plate electrode 10 is formed on the dielectric film 9 by a sputtering method to obtain a storage capacitor C.

Next, a second interlayer insulating film (lower interlayer insulating film) 11 of SiN is formed on the first interlayer insulating film 7 by the sputtering method. Then, contact holes are opened in the source / drain regions 5, the upper plate electrode 10, and the lower plate electrode 8.

Next, an Al wiring is formed on the interlayer insulating film 11 by the sputtering method. The Al wiring 12a is a cell internal wiring that connects the source / drain region 5 and the upper plate electrode 10 to each other through a contact hole.
Reference numeral b is a ground wiring for electrically connecting the lower plate electrode 8 and a pad portion (not shown). Although not shown in FIG. 1,
A word line electrically connected to the polycrystalline silicon gate 3 and a bit line electrically connected to the source / drain region 4 are formed in the same layer as the Al wiring.

Next, a third interlayer insulating film (upper interlayer insulating film) 13 'of SiN is formed on the Al wirings 12a and 12b by a sputtering method. Of course, since hydrogen is not released during this step, the problem of deterioration of the characteristics of the dielectric film 9 does not occur. Since the film quality of the third interlayer insulating film 13 'lacks denseness, it is of little significance as a passivation film, and as described later, it is an interlayer between the conductive and moisture resistant hydrogen barrier film 14 and the Al wirings 12a and 12b. It has the meaning of an insulating film.

Next, a TiN film is formed as a moisture resistant hydrogen barrier film 14 on the third interlayer insulating film 13 'by a sputtering method. Since hydrogen is not generated in this film forming process, the problem of characteristic deterioration of the dielectric film 9 does not occur. The present inventor has found that this TiN film is suitable as the hydrogen barrier film 14. Generally, the TiN film is known as a barrier metal of silicon and Al in the semiconductor technology, but since this TiN film is a dense film and is a conductive film, it is a moisture-resistant and hydrogen-impermeable protective film. , Also fulfills the electromagnetic shield function. This titanium nitride (TiN; titanium nitride) easily oxidizes to become oxygen-invading TiON. TiON having a high oxygen content has a higher hydrogen impermeability and is excellent as a hydrogen barrier film. Therefore,
The hydrogen barrier film 14 may be a TiON film. Any one of the following methods is adopted as a method for forming the TiON film.

Plasma treatment method of TiN film in oxygen atmosphere Heat treatment method of TiN film in oxygen atmosphere Sputtering method using Ti target in N ₂ and O ₂ atmosphere Sputtering method of TiON In the case of high TiON, the interlayer insulating film 13 'is not necessary because it is not conductive.

By the way, since the hydrogen barrier film 14 is a TiN film or a TiON film, it generally has conductivity.
Oxygen invasion type TiON becomes electrically conductive when the oxygen content is low, and is insulating when the oxygen content is high.

[Second Embodiment] FIG. 2 is a sectional view showing the structure of a semiconductor memory according to the second embodiment of the present invention. In addition,
2, the same parts as those shown in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

In this embodiment, the hydrogen barrier film 14
A SiN film formed by a plasma CVD method and a corrosion prevention film 15 of a SiO ₂ film formed by a normal pressure or low pressure CVD method are formed thereon. Since this film is dense and blocks the penetration of moisture,
Corrosion of the hydrogen barrier film 14 can be prevented. The film formation method of the SiN film by the plasma CVD method or the SiO ₂ film by the atmospheric pressure or reduced pressure CVD method is a process in which hydrogen is generated or in a hydrogen atmosphere, but the hydrogen penetration is caused by the hydrogen barrier film 14 already formed. Since it is blocked, the influence on the dielectric film 9 is not caused.

[Third Embodiment] FIG. 3 is a sectional view showing the structure of a semiconductor memory according to the third embodiment of the present invention. In addition,
3, the same parts as those shown in FIG. 2 are designated by the same reference numerals, and the description thereof will be omitted.

The difference between the third embodiment and the second embodiment is that the hydrogen barrier film 14 'of a TiN film or a TiON film is used.
Is limited to the range that covers the storage capacitor structure. The significance of the hydrogen barrier film 14 'is
Not only it has moisture resistance, but it does not have to be hydrogen-releasing and hydrogen-impermeable during the film formation. SiN formed by the plasma CVD method on the hydrogen barrier film 14 '
The film or the corrosion prevention film 15 of the SiO ₂ film formed by the atmospheric pressure or low pressure CVD method causes the generation of hydrogen during the film formation, but the hydrogen does not reach the dielectric film 9 even if the hydrogen penetrates into the lower layer of the laminated structure. It is sufficient that the hydrogen barrier film 14 'shields hydrogen invasion. The hydrogen barrier 14 'shields hydrogen from penetrating in the area covering the storage capacitor structure. Since the penetration distance of hydrogen from the lateral direction is long, there is almost no problem.

By the way, in the first and second embodiments, when the hydrogen barrier film 14 formed over the entire surface is a TiN film or a TiON film having a small oxygen content, the Al wiring 12b has conductivity. It is necessary to study the connection method between the pad portion formed on the same layer as the above and the bonding wire to be connected to the pad portion. A general connection method is shown in FIG. First, as shown in FIG. 4A, after forming the Al pad portion 12c in the same layer as the Al wiring 12b on the second interlayer insulating film, the second interlayer insulating film 13 'and conductive hydrogen are formed. A barrier film 14 and a corrosion prevention film 15 are sequentially formed, and next,
As shown in FIG. 4B, 3 above the Al pad portion 12c.
The layer is removed by etching to form the contact hole 16, and then the bonding wire 17 is pressure-bonded to the exposed region of the Al pad portion 12c as shown in FIG. 4 (C). According to this connection method, the bonding wire 17
The bonding wire 17 is electrically connected not only to the Al pad portion 12c but also to the desired conductive hydrogen barrier film 14 on the side wall of the contact hole. This causes a short circuit with other bonding wires.

FIG. 5 is a process diagram showing an improved connection method between a pad portion and a bonding wire in order to solve the above problems.

First, as shown in FIG. 5A, the Al pad portion 12c is formed in the same layer as the Al wiring 12b on the second interlayer insulating film, and the second interlayer insulating film 13 'is formed thereon. Then, a conductive hydrogen barrier film 14 is sequentially formed.

Next, as shown in FIG. 5B, before forming the corrosion prevention film 15, the three layers immediately above the Al pad 12c are removed by etching to form a window opening 16a. The Al pad portion 12c is once exposed. The exposed area is X
And

Next, as shown in FIG. 5C, the corrosion prevention film 1 including the exposed region X is formed on the hydrogen barrier film 14.
To form 5 '. Here, the inside of the contact hole 16a is also covered with the corrosion prevention film 15 '.

Next, as shown in FIG. 5D, the one-layer corrosion prevention film 15 immediately above the Al pad portion 12c is removed by etching to form a contact hole 16b. The width range Y of the exposed region to be formed on the surface of the Al pad portion 12c is set narrower than the width range X of the exposed region.

Next, as shown in FIG. 5 (E), the bonding wire 17 is pressure-bonded to the exposed region Y of the Al pad portion 12c.

When such a connecting method is adopted, the bonding wire 17 conducts only to the Al pad portion 12c and does not conduct to the conductive hydrogen barrier film 14. This is because the hydrogen barrier film 14 and the bonding wire 17 are insulated by the corrosion prevention film 15. The connection between the Al pad portion 12c and the bonding wire 17 is not limited to the connection.
The above connection method can also be applied to the connection between the Al pad portion 12c and the bump and the connection between the Al wiring and the upper layer Al (through hole connection).

The problem of characteristic deterioration due to hydrogen invasion is not limited to the ferroelectric film, but the CMO having a polycrystalline silicon gate.
This is also a problem in S integrated circuits and the like. Polycrystalline silicon
When the gate comes into contact with hydrogen, it causes a change in the threshold value, which causes a deterioration in yield. Therefore, it is not only the property of the polycrystalline silicon gate that the moisture-resistant hydrogen barrier film is retained not only as the ferroelectric film but also as the protective film for the polycrystalline silicon gate. Contribute to the stability of.

[0033]

As described above, according to the present invention, in a semiconductor device having a ferroelectric or polycrystalline silicon gate as an element, a hydrogen non-emissive layer is formed above the ferroelectric or polycrystalline silicon gate. TiN film and TiON formed by film method
It is characterized in that a moisture resistant hydrogen barrier film such as a film is formed. Therefore, the following effects are achieved.

Since the formation of the hydrogen barrier film itself does not generate hydrogen, there is no effect of hydrogen intrusion into the ferroelectric or polycrystalline silicon gate. Further, the hydrogen barrier film prevents the invasion of hydrogen even when the hydrogen-releasing film forming method is used after the formation of the hydrogen barrier film or when the semiconductor device itself is placed in a hydrogen atmosphere. Therefore, it is possible to avoid the problem of characteristic deterioration due to hydrogen invasion such as remanent polarization of ferroelectrics, reduction of relative permittivity, and fluctuation of threshold value of polycrystalline silicon gate.

In the case of a corrosive hydrogen barrier, adopting a structure in which a corrosion prevention film is formed thereon can prevent corrosion of the hydrogen barrier, and of course, the formation of the corrosion prevention film depends on the hydrogen-releasing film forming method. Even in that case, the problem of hydrogen penetration into the ferroelectric or polycrystalline silicon gate does not occur.

When the insulating TiON film is formed as a moisture resistant hydrogen barrier film, a structure having a high hydrogen blocking ability can be obtained. In addition, the interlayer insulating film can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view showing a structure of a semiconductor memory according to a first exemplary embodiment of the present invention.

FIG. 2 is a sectional view showing a structure of a semiconductor memory according to a second exemplary embodiment of the present invention.

FIG. 3 is a sectional view showing a structure of a semiconductor memory according to a third embodiment of the present invention.

FIGS. 4A to 4C are process diagrams showing a general connecting method between a pad portion and a bonding wire in the same semiconductor memory.

5A to 5E are process diagrams showing an improved connection method between a pad portion and a bonding wire in the same semiconductor memory.

FIG. 6 is a sectional view showing an example of a structure of a conventional semiconductor memory.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... P-type semiconductor substrate 2 ... Gate insulating film 3 ... Polycrystalline silicon gate 4, 5 ... High concentration n-type source / drain region 6 ... LOCOS (local oxide film) 7・ ・ ・ First interlayer insulating film 8 ・ ・ ・ Platinum lower plate electrode 9 ・ ・ ・ PZT (Pb (Ti _x Zr _y ) which is a ferroelectric
O ₃ ) dielectric film 10 ... platinum upper plate electrode 11 ... second interlayer insulating films 12a, 12b ... Al wiring 12c ... Al pad portion 13 '... third interlayer Insulating film 14, 14 '... Hydrogen barrier film (TiN film or TiON film by sputtering method) 15 ... Corrosion prevention film 16a ... Window opening 16b ... Contact hole 17 ... Bonding wire T ... Transfer transistor C ... Storage capacitor X, Y ... Exposed area width range

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ identification code FI H01L 27/092 (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 27/105 H01L 21/318 H01L 21/822 H01L 21/8238 H01L 27/04 H01L 27/092

Claims (13)

(57) [Claims] 1. A ferroelectric film and a shape formed on a lower portion of the ferroelectric film.
Formed lower electrode and formed on the ferroelectric film
In a semiconductor device having an upper electrode, the upper electrode
Above the upper electrode, and
A semiconductor device having an insulating hydrogen barrier film above at least a part of the wiring . 2. The semiconductor device according to claim 1, wherein
A semiconductor device, wherein the ferroelectric film is a PZT film. 3. The semiconductor device according to claim 1, wherein the hydrogen barrier film is an insulating TiON film. 4. The semiconductor device according to claim 1, further comprising a corrosion prevention film covering the hydrogen barrier film on the hydrogen barrier film. 5. The semiconductor device according to claim 4,
A semiconductor device, wherein the corrosion prevention film is a SiN film. 6. A semiconductor memory using the semiconductor device according to claim 1. 7. A ferroelectric film and a shape formed on a lower portion of the ferroelectric film.
Formed lower electrode and formed on the ferroelectric film
In a method of manufacturing a semiconductor device including an upper electrode, a step of forming the upper electrode, a step of forming a wiring connected to the upper electrode, and a step of forming at least a part of the wiring above the upper electrode.
And a step of forming an insulative hydrogen barrier film on the upper side thereof. 8. The method of manufacturing a semiconductor device according to claim 7, wherein the hydrogen barrier film is an insulating TiON film. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the TiON film is formed by using a plasma treatment method of the TiN film in an oxygen atmosphere. 10. The method of manufacturing a semiconductor device according to claim 8, wherein the TiON film is formed by using a heat treatment method of the TiN film in an oxygen atmosphere. 11. The method of manufacturing a semiconductor device according to claim 8, wherein the TiON film is formed by using a sputtering method using a Ti target in an atmosphere of N ₂ and O _2. . 12. The method of manufacturing a semiconductor device according to claim 8, wherein the TiON film is formed by using a TiON sputtering method. 13. The method of manufacturing a semiconductor device according to claim 7, further comprising a step of covering the hydrogen barrier film with a corrosion prevention film after the step of forming the hydrogen barrier film. A method of manufacturing a semiconductor device, comprising: