JP3389378B2 - Camera system for road guidance - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a road guidance system which utilizes a digital electronic camera to record road information such as a three-dimensional background such as an intersection that seems to get lost and to reproduce the image when driving on the way home. And a camera system for road guidance that also serves as an accident monitoring system for shooting accident conditions.
On-time.

[0002]

2. Description of the Related Art A camera of a road guidance system using a digital electronic camera has two digital electronic cameras installed on a ceiling of a car seat, one of which is a background in front of the other. Is arranged to capture the background behind the car. CCD cameras have become cheaper now,
The two-unit configuration has a problem in that it is disadvantageous in terms of system miniaturization and cost reduction.

[0003]

As described above, in the conventional system, two cameras are mainly used to mainly perform the front background photographing in the accident monitoring system and the rear background photographing in the route guidance system. Was used. INDUSTRIAL APPLICABILITY The present invention, for the purpose of downsizing the stem and reducing the cost, provides a route guidance system and a route guidance system for realizing an accident monitoring system that is capable of photographing the front and rear backgrounds with a single camera .
Provide a camera system .

[0004]

SUMMARY OF THE INVENTION The present invention provides a route guidance camera system that can be used in combination with an accident monitoring system for monitoring traffic accidents and a route guidance system for recording and reproducing image information at intersections to provide route guidance image information. A reflector that is placed in front of one camera and rotates to a position where the front background can be photographed in case of accident monitoring, and a position where the rear background can be photographed in case of road guidance, and inversion of an optical image by the reflector. In order to restore the reproduced image to a correct reproduced image, the camera system for a route guide is provided with a memory control means for changing the access order of the addresses of the image memory. The present invention, in order to provide accurate guidance information return at the intersection, to receive the oscillation signal at the intersection difference point, automatically reads the ambient condition exits ambient conditions and intersection entering the car intersection, It is characterized in that the position of the reflecting mirror is controlled by automatically detecting the position of entry and passage of the intersection, and the memory control means automatically determines the scanning direction of the memory address .
It is something .

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION The system of the present invention is composed of one photographing camera, and when used in an accident monitoring system, a reflecting mirror is set at a position where the front background can be photographed and recorded in an image memory. To do. When the captured image is reproduced, means for changing the order of scanning (accessing) the addresses of the image memory is used in order to correctly display the reproduced image of the front background on the monitor. On the other hand, when using it for a route guidance system, set the reflecting mirror at a position where the background can be photographed, store it in the image memory, and change the access order of the image memory addresses when playing back the captured image. Then, a correct reproduction image is automatically displayed on the monitor as the front background of the car on the way back from the captured rear background image.

The present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram of a photographing camera of the present invention.
This camera is installed on the ceiling of the car and used for the navigation system. FIG. 2A shows a front view of the car, and FIG.
Indicates the attitude of the reflecting mirror 44 when photographing the background in the rear direction of the vehicle. Further, (C) is a view of the front of the reflecting mirror surface viewed from the rear of the vehicle when the mirror faces the rear direction. When photographing the front of the vehicle, as shown in FIG. 2A, the reflecting mirror 44 is rotated clockwise and fixed to the mirror position fixing pin 45. Similarly, as shown in FIG. 2B, the optical axis of the lens 43 is the reflection mirror 44.
Turns at and faces the subject behind the car. The rotation of the gear (1) 47 attached to the motor shaft is transmitted to the gear (2) 48, and the rotation of the gear (1) 47 attached to the motor shaft is transmitted to the gear (2) 48. The rotation of the reflecting mirror 44 is caused by the rotation force of the motor 46 attached to the gear (1) attached to the motor shaft.
It is transmitted promptly from 47 to the gear (2) 48 and performed promptly. In means for rotating the thus reflecting mirror 44, a single de
Ijitaru can shoot forward and backward in the background in the electronic camera 4 2. However, by using the reflecting mirror 44, the positional relationship of the photographed image is reversed, and the reproduced image reproduces a background different from the actual state due to this reversal phenomenon.

FIGS. 7A to 7C show the positional relationship of the background when shooting with a normal camera. FIG. 7A is the background to be shot, and FIG. 7B is an image formed on the image pickup surface of the image pickup device. The background image (C) represents a reproduced image of the background displayed on the monitor. Particularly, in the screen of FIG. 6B, the order of reading the sensors inside the image sensor, that is, the scanning direction, starts from the position of the black circle at the lower right of the screen, and horizontally scans from right to left. Then, the vertical scanning direction is to scan from the bottom to the top of the screen. In FIG. 6C, while receiving the signals in sequence, in a normal CRT, horizontal scanning is performed from left to right from a black circle point on the upper left of the screen, and vertical scanning is performed from top to bottom. As a result, the reproduced image of FIG. (C) can be displayed in the same positional relationship as the background of (A). This is the case of normal shooting.

FIGS. 7D to 7F show the display relationship between the front background, the image formed on the image pickup device, and the reproduced image when the image is taken by the electronic camera 42 using the reflecting mirror 44. If the background of the front of the car is the background shown in FIG.
The lens 4 of the camera 42 bent by the reflecting mirror 44 shown in FIG.
Background image formed on the imaging surface of the image sensor through 3 7
The relationship shown in (E) is obtained. That is, the background image is reversed right and left. Imaging device starts scanning from the position of the black point in FIG. 7 (E), performs horizontal scanning and vertical scanning. CRT as usual
When it is displayed, the relationship becomes as shown in FIG. 7 (F), and the image is inverted. As described above, in the case of the mode of the accident monitoring system, there arises a problem that the original front background cannot be properly reproduced.

In the mode of the one-way guidance system, the background behind the vehicle is photographed at the same intersection position, and based on this image data, a forward image for guidance when the same intersection is entered on the way back is created. In this case, the following problem arises. First, the reflecting mirror 44 is swiftly rotated to photograph the background behind the vehicle at the same intersection on the way at approximately the same time, and the background behind is photographed. If the background image at this time is the image shown in FIG. 7 (I), the rear background image formed on the image pickup surface of the image pickup device has the positional relationship shown in FIG. 7 (J). The shot recorded the data of the memory to memory access to the order of the normal shooting, and play it, Mai to occur reproduced image shown in FIG. 7 (K), the problem of horizontal reversal occurs.

In order to solve these problems, the idea of the present invention uses means for changing the order of accessing the addresses of the memory. That is, focusing on the fact that digital data corresponding to each pixel is sequentially recorded in the image memory, in the case of the accident monitoring system, the order of reading the data in the recorded memory is set to the position of the black dot in FIG. 7 (G). Starting from the corresponding memory address, and if the reading order of the memory is such that the apparent horizontal scanning from right to left and the vertical scanning from top to bottom are performed, the data read from this memory is sequentially displayed on the CRT.
If you enter into, its reproduced image is as shown in FIG. 7 (H). The correct front background is played. After all, the front background of the car is displayed correctly.

Further, in the case of the route guidance system, the order of reading the data in the memory is started from the address corresponding to the position of the black dot in FIG. 7 (L), and the order of reading the data in the memory is apparent by the same method as described above. If you change horizontally from top left to right and vertically from bottom to top,
CRT display of the reproduced image is a positional relationship shown in FIG. 7 (M). This image will be the same as the front background of the car when returning to the same intersection on the way back. In this way, the image data for route guidance at the time of returning to the destination can be created.

The memory control circuit of the present invention which realizes the above-mentioned means, that is, the means for varying the order direction of the memory addresses will be described in detail below. FIG. 9 is a diagram showing a memory for one screen two-dimensionally. When scanning a normal screen, when one line is horizontally scanned and the address of the video memory is expressed in two-dimensional coordinates when it comes to the beginning of the next scanning line, address coordinates (ADHST, ADVST to address coordinates (ADHST, ADHST, ADVST +1), and address coordinates (ADHST, ADVST +1) on the next one line.
To address coordinates (ADHST, ADVST +2). The address coordinates (ADHST, ADVEND) to the address coordinates (A
DHEND, ADVEND).

Such scanning corresponds to normal scanning. This means that the order in which the image data that was shot once is read out from the aforementioned memory is scanned in the reverse direction.
Frog. That is, address coordinates (ADHST, ADVST +1)
If the reading order of the memory address is changed from the address coordinates (ADHST, ADVST) to CR, normal scanning is performed.
On the T display, apparently, a reproduced image corresponding to horizontal scanning in the opposite direction can be obtained. That is, the left and right sides of the image are reversed. The principle of the present invention is to appropriately change the access order of the memory addresses in order to obtain a correct display image for which a mirror-inverted image is obtained. FIG. 10 is a block circuit showing the relationship between the horizontal scanning and vertical scanning control circuits and the video memory circuit. Then, for the video memory, the horizontal scanning control circuit 161A to AN-1, A4,
The address lines A3, A2, A1 and A0 are outputting. On the other hand, the vertical control circuit 162A outputs the address lines AN and AM. A control signal is applied to each control circuit. The video memory circuit is set in an area assigned by an address, and is selected by a chip select signal determined by decoding the address signal.

FIG. 11 shows a horizontal scanning control circuit which constitutes a part of this circuit, and shift registers 161AG and 161 are provided.
In 1AH, DATINH is applied to each 1D terminal of the input section.
Series data represented by binary numbers 1 and DATINH2, that is, series data corresponding to a necessary address is added. The data is the shift register SHIFT
REG1 161AG, SHIFT REG2 16
It is held at 1 AH. This series data is output to the output terminals of the shift registers 161AG and 161AH with Q0 and QN-1.
Is output as. This DATINH1, DATINH
The shift data of 2 is output from the CPU and can be set to any value.

LOADH1 is a load signal for temporarily storing the input data DN-1 and D0 in the latch 161AB. LOADH2 has the same function, and latch 16
This is a load signal for temporarily storing input data DN-1 and D0 in 1AD. The CPH signal is a CCD read signal or a signal synchronized with the clock of the A / D conversion circuit. In the up-down counter 161AA, when the UPH signal becomes HIGH active, the counter 161AA is set to a mode in which the counter 161AA sequentially counts up. When the DWNH signal becomes HIGH active, the counter 161AA is set to a mode in which it counts down sequentially.

When the PRESETH signal becomes HIGH active, the input data of the counter 161AA, that is, D0 to DN-1 are taken into the counter and used as the initial data of the counter. Counter 16
1AA is set to an operation mode in which the preset data is sequentially counted up or down by the control signal described above. The outputs Q0 to QN-1 of the counter 161AA are the 3-state output buffer 161AF.
, And the output of the buffer 161AF is connected to each address of the video memory.

The operation of the memory control circuit in the front background photographing mode utilized in the accident monitoring system will be described below. As described above with reference to FIG. 2, since a mirror is inserted in front of the taking lens and is incident on the photosensitive surface of the image sensor, the image of the background in the front is shown in FIG.
Since the relationship is as shown in (G), the horizontal scanning apparently scans from the position of the black dot shown in FIG. 7 (G) from left to right, and the vertical scanning scans from top to bottom. Change the access order of addresses. The address change of the video memory corresponding to this scanning is as shown in FIG. The address corresponding to horizontal scanning is the address ADHE
Change from ND to ADHST. On the other hand, the address corresponding to vertical scanning changes from ADVST to ADVEND. The normal front background shown in FIG. 7 (H) can be obtained from the reproduced image of the CRT.

In the horizontal scanning circuit shown in FIG. 11, the following settings are made in advance. D to the input D1 of the shift register 161AG
The signal of ATAN1 is input, and the data of the value corresponding to the address ADHST is stored in the shift register 161AG. On the other hand, the shift register 161AH can be
The value of DHEND is stored. Selector SEL0 (161
11, the contact C and the contact B are connected in the upper circuit of the selector SEL0, and the selector SEL
In the lower circuit of 0, the contact C and the contact A are connected, and in the upper circuit of the selector SELN-1, the contact C and the contact B are connected,
A contact C and a contact A are connected in the lower circuit of the selector SELN-1. ADHST is input to the latch 161AD,
The signal of LOADH2 is stored in the latch circuit 161AD. On the other hand, ADHEND is a signal of LOADH1 and is stored in the latch circuit 161AB. Also counter 161AA
The DWNH signal is added to and the countdown mode is set. At the same time, in addition to the preset signal PRESETH, the ADHEND value is preset in the counter.

Now, at the start of horizontal scanning, the D-type FF 161
Activate the reset terminal of AE and set its output Q to L
Turn it to OW. Since the gate 161AK is opened and the pulse of CPH is input, the counter 161AA counts down from ADHEND to ADHST in synchronization with CPH. The Q terminal of the comparator 161AC is fixed to the value of ADHST. On the other hand, the P terminal has a counter 161A
The outputs Q0 to QN-1 of A are added. Counter 161A
The output of A drops toward ADHST (see the diagram on the left side of FIG. 14), and the input terminal of the comparator 161AC (QN-1
To Q0) becomes equal to ADHST, the signal of the output P = Q of the comparator 161AC becomes HIGH. Therefore, the Q of the DFF 161AE becomes HIGH, and the gate 16
1AK closes. The CPH signal is not input to the counter. Next, the D-type FF 161AE RESETH signal is HI.
Gate 161AK closes until it reaches GH. Therefore, the output of the counter 161AA is held constant for a certain period of time. FIG. 15A shows the relationship.

The output of the counter 161AA is connected to a 3-state buffer 161AF.
This output is applied to a memory address such as SRAM 50 when 61AF is active. Therefore, the address to the memory changes to the lower right as shown in FIG. As a result, the horizontal scanning lines apparently sequentially scan from the black dots shown in FIG. 7G from left to right.

On the other hand, the vertical scanning control circuit has substantially the same circuit configuration as the horizontal scanning control circuit as shown in FIG. The vertical scanning is performed by the control circuit so that the memory addresses are read in such a manner that scanning is performed from top to bottom as shown in FIG. That is, the address change of the video memory corresponding to the vertical scanning changes from the address ADVST to ADVEND as shown in FIG. 15B.

Hereinafter, the vertical scanning control circuit operates as follows.
The shift registers 162AG and 162AH each have an input section 1D.
Series data represented by binary numbers DATINV1 and DATINV2, that is, series data corresponding to a required address, is added to the terminals. The data is shift register SHIFT REG 162A.
G, held in SHIFT REG2 162AH.
Series data is shift registers 162AG and 162A
Outputs Q0, QM-N to the H output terminal. Naturally CPU
Outputs DATINV1 and DATINV2 of arbitrary values and outputs the data to the shift registers 162AG and 16AG.
Set to 2 AH. LOADV1 is latched 162
It is a load signal when the input data D0 and DM-N in AB are stored in it. LOADV2 also has the same function, and the input data DM-N in the latch 162BD,
It is a load signal for temporarily storing D0. The CPV signal is a signal synchronized with the vertical synchronizing signal. This is a signal for setting the counter to sequentially count up when the UPH signal becomes HIGH active in the up / down counter 162AA. Also, the DWNH signal is H
This is a signal for setting a mode in which the counter sequentially counts down when IGH becomes active. PRESET
When the H signal becomes HIGH active, the counter 16
The data input from D0 to DM-N of 2AA is taken into the counter and used as the initial data of the counter. The counter 162AA is set to a mode in which the preset data is sequentially counted up by the control signal described above. The outputs Q0 to QM-N of the counter 162AA are connected to the inputs of the 3-state output buffer 162AF, the output of the buffer 162AF being connected to the address of the video memory.

In the vertical scanning circuit shown in FIG. 12, the signal of DATAV1 is input to the input D1 of the shift register 162AG, and the data of the value corresponding to the address ADVST is stored in the shift register 162AG. On the other hand, the value of ADVEND is stored in the shift register 162AH by the same means. As shown in FIG. 12, the selector SEL0 (162AI0) has the contact C and the contact A connected in the upper circuit of the selector SEL0, and the contact C and the contact B connected in the lower circuit of the selector SEL0. In the upper circuit of, the contact C and the contact A are connected, and the selector SELM-N
In the lower circuit, the contacts C and B are connected. AD
VEND is input to the latch 162AD and is stored in the latch circuit 162AD by the signal of LOADV2. On the other hand ADVS
T is a signal of LOADV1 and is stored in the latch circuit 162B. Further, the UPH signal is added to the counter 162AA to set the count-up mode, and subsequently the preset signal PRESETH is added to preset the ADVST value to the counter 162AA.

Now, at the start of vertical scanning, the D-type FF 162
Activate the reset terminal of AE and set its output Q to L
Turn it to OW. Since the gate 162AK is opened and the pulse of CPV is input, the counter 162AA starts counting from ADVST to ADVEND in synchronization with CPV. On the other hand, ADVE is connected to the Q terminal of the comparator 162AC.
The value of ND is added, and the outputs Q0 to QM-N of the counter 162AA are added to the P terminal. When the output of the counter 162AA rises toward ADVST and becomes equal to ADVEND, the signal of the output P = Q of the comparator 162BC becomes H.
Become IGH. Since the Q of DFF 162AE goes HIGH, gate 162AK closes. The CPV signal does not add to the counter. Therefore, RES of D-type FF162AE
The gate 162BK is closed until the ETH signal becomes HIGH, and the output of the counter 162AA is held constant for a certain period of time. This relationship is shown in FIG. Counter 1
The output of 62AA is connected to a 3-state buffer 162AF, and when this buffer 162AF is active, this output is applied to a memory address such as SRAM 50. Therefore, as shown in FIG. 15 (B), the address changes upward to the right.

As a result, apparently the horizontal direct scanning line is shown in FIG.
The black dots shown in (G) are sequentially scanned leftward, and the vertical scanning lines are scanned from top to bottom. When the image data to be sequentially output is displayed on the monitor, the display shown in FIG. 7 (H) is obtained. Become. That is, this display image has the same arrangement as the front background of the vehicle shown in FIG. The timing for setting the data in the horizontal scanning shift registers 161AH and 161AG described above naturally operates within the horizontal blanking period shown in FIG. The timing of other control signal operations is also synchronized with the horizontal blanking period.

[0026] Next, the case of the guidance system, as described above, to enter into this exchange difference point in the forward path, taking a forward background,
Then, the mirror 44 is turned to photograph the rear background of the vehicle. This video data is converted into a front background image for route guidance at the same intersection on the way back. If the background image at this time is the image shown in FIG. 7I, the rear background image formed on the image pickup surface of the image pickup device becomes an image having the positional relationship shown in FIG. 7J. The shot recorded the data of the memory and memory accesses while the order of the normal shooting, and play it, Mai to occur reproduced image shown in FIG. 7 (K), horizontally inverted. So to start the sequence of reading the memory of the data over from the corresponding address position of the black point in FIG. 7 (L), the order of reading of the memory data in the same manner as the method described above is, horizontal scanning from apparently left to right If the vertical scanning is changed from bottom to top, the CRT display of the reproduced image has the positional relationship shown in FIG. 7 (M) .

This image is the same as the front background of the car when returning to the same intersection on the way back. The operation of the memory control circuit at this time will be described below. In the horizontal scanning control circuit, each input 1D terminal of the shift register 161AG is added with series data represented by the binary number DATINH1, namely ADHST, and each input 1D terminal of the shift register 1161AH is represented by the binary number DATINH2. Series data, that is, ADHEND is added. The output terminals of the shift registers 161AG and 161AH are A, respectively.
Signals of Q0 and QN-1 corresponding to DHST and ADHEND are output. Selector SEL0 (161I0) is selector S
It is the upper side circuit of EL0 and its contact C and contact A are connected, and it is the lower side circuit of the selector SEL0 and its contact C and contact B are connected. In the upper circuit of the selector SELN-1, the contact C and the contact A are connected, and in the lower circuit of the selector SELN-1, the contact C and the contact B are connected. Therefore, ADHEND is input to the latch 161AD, while ADHST is input to the latch circuit 161AB.

By the load signal of LOADH1, the input data DN-1, D0 in the latch 161AB, that is, AD
HST is temporarily stored. LOADH2 has the same function,
The input data DN-1, D0, that is, ADHEND in the latch 161AD is temporarily stored. The up / down counter 161AA is set to a mode in which the counter sequentially counts up by the HIGH active of the UPH signal. The PRESET signal becomes HIGH active, and the input signals from D0 to DN-1 are counters 161AA.
It is taken inside and becomes the preset data of the counter. The outputs Q0 to QN-1 of the counter 161AA are input to the input section of the 3-state output buffer 161AF,
The output of the buffer 161AF is output to the address of the video memory.

Now, at the start of horizontal scanning, the D-type FF 161
The reset terminal of E is activated and its output Q is set to LO.
Set to W. Since the gate 161AK is opened and a pulse of CPH is input, the counter 161AA changes from ADHST to CP.
Start counting up in synchronization with H. Counter 16
When the output of 1AA increases toward ADHEND and becomes equal to ADHEND, the output P = Q of the comparator 161AC
Signal becomes HIGH. Q of DFF161AE
Goes HIGH, gate 161AK closes. C
PH signal does not add to the counter, counter 161AA
The output of is held constant. RES of D-type FF161AE
The gate 161AK is closed until the ETH signal becomes HIGH, and the output of the counter 161AA is held constant. The output of the counter 161AA is connected to a 3-state buffer 161AF.
Is active, this output is applied to a memory address such as SRAM 50. Therefore, as shown in FIG. 16 (A), the address changes upward to the right. as a result,
Apparently, the horizontal scanning lines sequentially scan in the left direction from the black dots shown in FIG. 7L.

On the other hand, in the vertical scanning control circuit shown in FIG. 12, the 1D terminal of the input section of the shift register 162BG is D
The series data represented by the binary number of ATINV1, namely ADVST, is input, and the 1D terminal of the input part of the shift register 162BH receives the series data represented by the binary number of DATINV2, that is, the value of ADVEND. These values are the shift register SHIFT REG1 162B
G, held in SHIFT REG2162BH. In the upper circuit of the selector SEL0 (162AI0), the contact C and the contact B are connected, and in the lower circuit of the selector SEL0, the contact C and the contact A are connected. Selector SELM-N
In the upper circuit of, the contacts C and B are connected, and the selector SE
In the lower circuit of LM-N, the contact C and the contact A are connected. L
The latch 162AB receives the input data D0 by OADV1.
, DM-N (value corresponding to ADHEND) are stored. LO
The ADV2 also has the same function, and the latch 162BD temporarily stores the input data DM-N, D0 (value corresponding to ADHST). By the HIGH active of the DWNH signal, the up / down counter 162AB is set to the countdown mode. When the PRESET signal becomes HIGH active, the counter 162AA changes from D0 to DM-N (A
The value corresponding to DHEND) is taken into the counter and becomes the preset data of the counter. The address change of the video memory corresponding to this vertical scanning is shown in FIG.
As shown in (B), the address corresponding to the vertical scanning may be changed from the address ADVST to ADVEND.

In the vertical scanning circuit shown in FIG. 12, the following settings are made in advance. D to the input D1 of the shift register 162AG
The signal of ATANV1 is input, and the data of the value corresponding to the address ADVST is stored in the shift register 162AG. On the other hand, the value of ADVEND is stored in the shift register 162AH by the same means. ADVST is a latch 162A
This signal is input to D and the latch circuit 16 is supplied with the LOADV2 signal.
2 stored in AD. On the other hand, ADVEND is a signal of LOADV1 and is stored in the latch circuit 162AB. Further, a DWNH signal is added to the counter 162AA to set the countdown mode. At the same time, the preset signal PRES
Add ETH and preset the ADVEND value to the counter.

Now, at the start of vertical scanning, the D-type FF 162
Activate the reset terminal of AE and set its output Q to L
Turn it to OW. Since the gate 162AK is opened and a pulse of CPV is input, the counter 162AA starts counting down from ADVEND in synchronization with the CPV signal synchronized with the vertical synchronization signal. On the other hand, the value of ADVST is added to the Q terminal of the comparator 162AC, and the counter 162 is connected to the P terminal.
Outputs Q0 to QM-N of AA are added. Counter 162
When the output of AA falls toward ADVST and becomes equal to ADVST, the output P = Q signal of the comparator 162BC becomes HIGH. Therefore, since the Q of the DFF 162AE becomes HIGH, the gate 162AK is closed. Therefore, the CPV signal does not add to the counter. Yotsutte D type F
The gate 162K is closed and the output of the counter 162AA is held constant until the RESETH signal of the F162AE becomes HIGH. The output of the counter 162AA is 3
This output is connected to state buffer 162AF, and this output is SRA when this buffer 162AF is active.
It is applied to a memory address such as M50. Therefore, as shown in FIG. 16 (B), the address changes downward to the right. As a result, apparently, the horizontal direct scanning lines are sequentially horizontally scanned from the black dots shown in FIG. 7 (L) to the right direction, and the vertical scanning lines are scanned from bottom to top, and the image data to be sequentially output is monitored. If it is displayed with, the display will be as shown in FIG. The vertical scanning shift register 16 described above
The timing of setting the data in 2AH and 162AG naturally operates so as to be set within the time of the vertical blanking period shown in FIG. The problems of photographing the front background in the accident monitoring system and the problems of photographing the rear background in the route guidance system can be solved by means of changing the access order of the memory addresses.

The following is an example of using the system of the present invention.
In the emergency shooting mode, turn the car key to
When the engine rotates, the digital electronic
Camera (hereinafter, abbreviated as DESC) 4 2 of powering on automatically. That is, in the state of driving a car, DESC4 2 becomes continuous shooting mode. In FIG. 8, in this state, the background of the road is the lens 1, the iris 2, and the optical filter 3.
An image is formed on the CCD 4 via. The noise component of the output signal of the CCD 4 is removed by the CDS circuit 5. The noise-removed signal is gamma-corrected by the gamma correction circuit 6 including the AGC and CLAMP circuits, and then the A / D converter 7
Is converted into a digital signal by. The digital signal is converted by the signal processing circuit 8 into a digital luminance signal and a digital color difference signal. Then, the luminance signal and the color difference signal are recorded in the video memory in the memory control circuit 16, respectively.

The storage capacity of the video memory is the storage capacity for two screens. When one memory 163A is recording image data from the image sensor, one memory 163B is transmitting the image data recorded one screen before to the outside. In one memory, writing and reading are alternately executed. Also, when one memory is in write mode,
The other memory is in the read mode and repeats different modes. Image data is C of selector 16A
When transferring from the end to the A end, DA conversion is performed by the D / A 16E, amplification is performed by the video amplifier 16F, and the monitor 2
5 is displayed above. Also, from the C end of the selector 16A to B
When transferring to the end, from the C end of the selector 16B to B
When connected to the end, the image data is recorded in the memory card 17. Also, a large number of image data can be recorded in the SRAM 50 by combining the address from the address counter 16I and the control signal such as the chip select signal. The method of selectively recording in the SRAM 50 or the memory card 17 is determined by the instruction of the CPU. Further, since the storage capacity of the SRAM 50 naturally has a fixed size, when digital video screens are sequentially recorded, new image data following the digital image screen is overwritten in the SRAM 50. Therefore, old data is sequentially rewritten with new data.

As described above, in this photographing mode, the address counter sequentially increases the address of the SRAM 50 from the first address, and when it reaches the last address of the storage capacity, it returns to the first address again. Therefore, as described above, the new write data is overwritten and the SRAM
The latest video data is always recorded in the memory. The image data is always written in the SRAM until an emergency occurs such as sudden braking. According to this method, the problem of limiting the number of times of writing in the non-volatile memory is avoided, so that high reliability of the system can be obtained.

Next, in the case of a dangerous situation such as sudden braking, when the driver depresses the sudden braking, the magnet attached to the brake pedal 19 rapidly moves, and the sensor 20 for detecting the sudden braking state is opposed. Induction voltage is generated in the pickup coil placed inside. This signal as an emergency signal 20A is shaped, and inputs to the interface circuit 1 3. The system control CPU 14 reads the pulse signal through the interface circuit 13 and outputs it to the control signal generation circuit 16J in the memory control circuit 16. The control signal generation circuit 16J in the memory control circuit 16 is SRA.
Stop writing to M 50 . That is, the control signal generation circuit 16J functions so as to write the image of N frames in the non-volatile memory of the video memory card 17 after the sudden braking.

Next, by the operation of the memory control circuit 16, S is performed before the emergency signal is generated (the sudden braking is generated).
The image data (for M frames) recorded in the RAM memory 50 is written from the SRAM memory 50 to the memory card 17 which is a non-volatile memory. When the reading of the SRAM memory 50 is completed, the writing of the memory card 17 of the non-volatile memory is also completed at the same time. When the recorded and stored image is reproduced, the accident situation reproduction button 27 of the LCD monitor 25 is pressed. The CPU 14 reads from the interface circuit 13 and supplies a control signal to the memory control circuit 16. The memory control circuit 16 operates, the C end of the selector 16B is connected to the A end, and the C end of the sector 16A is B
Connect to the end. Then, the image data of the flash memory 17 passes from the C end of the selector 16B to the A end, and DA
Convert to analog signal at 16E. Video amplifier 16
The image of the accident situation is displayed on the LCD monitor 25 after being amplified by F. Each time you press the play button for this accident situation, the image changes screen by screen. The recorded images are the images before and after the time when you suddenly brake. Therefore, since the state before the sudden braking is also recorded, the driving state is clarified, and the responsibility for the accident is clarified, which allows the court to be judged by fairness.

2) In the mode of the route guidance system, the photographing method especially at an intersection will be described in detail. Figure 3 shows the layout of the intersection as seen from above. By the time the vehicle 100 driving toward the destination reaches the position A of the intersection, the vehicle 100 passes under the traffic light 101 that generates the optical transmission signal and passes through the intersection having the arrangement shown in FIG. Here, the transmitter 101 and the receiver 102 on the intersection side are attached to a column 110 arranged at the intersection. A solar cell 111 is installed on the upper part of the support in order to supply electric power to the transmitter 101 and the receiver 102 described above. The light receiving sensor 28 attached to the vehicle receives this signal. This signal is composed of a mark signal part indicating the start point of the transmission signal, a number part corresponding to the name of the intersection, a position number part indicating where the intersection is passing, and a mark signal part indicating the end of the signal. To do.

When the mark signal in the first part of the received signal is detected, the circuit included in the amplifier circuit 30 generates the interrupt signal INT. This interrupt signal INT is the CPU
Enter in 215. The CPU (2) 15 enters the interrupt process, and the data DATA of the received signal is output from the output of the amplifier circuit 30.
And read this signal immediately. From the transmission data of the intersection, at which intersection the car is, what position of the intersection,
The CPU (2) 15 decodes which lane the vehicle entered, which position, and which lane the vehicle left. It also issues a command to shoot at the required position. At the same time, the CPU (2) 15 outputs a control signal CNT for transmitting a signal to the power amplification circuit 31. The power amplifier circuit 31 starts transmission by this control signal CNT, and outputs to the light emitting element 29 the data of the vehicle registration number recorded in the circuit 31 in advance. This data is received by the receiver at the intersection. Therefore, the record data is recorded on the side of the intersection as to which day and time at which the vehicle passed the intersection. Naturally, the name of the intersection can be immediately read from the database recorded in the memory from the number of the passing intersection. This signal is always transmitted at intersections. Repeated calls are made with the above configuration.

The current car 100 has passed the transmission signal 101,
When proceeding to the point A, the CPU (2) 15 shown in FIG. 8 discriminates the position of the intersection and starts photographing the DESC 42 . DESC4 2 at this time, to shoot the rear of the background of the car 100. That is, the background shown in FIG. 6 is recorded in the memory together with the intersection number and the intersection position number. And car 100
Passes through the intersection A. Then, it passes under the transmitter 205 toward the destination. Car 100 is an intersection transmitter 101
It is possible to decipher from which position (lane) the vehicle has entered and where the vehicle has exited by receiving the data 205 and 205 from the received data.

When returning from the destination, the vehicle 100 first receives the intersection number and the intersection number from the optical transmitter 203 when passing through this intersection, as shown by B in FIG.
From this intersection number, the CPU (1) 14 reads out the previously captured image (image shown in FIG. 5) from the memory. Before the vehicle 100 reaches the position of point B from the time of passing the transmitter 203, the same image as the image seen from the rear of the point A is shown in FIG.
Displayed on the LCD monitor 25 as shown in. By looking at the image on the LCD monitor 25, the driver can immediately know in which direction he should proceed. The situation when turning left at an intersection is shown in FIG. The car 100 turns left after turning on the transmitter 101 at the intersection and passes under the transmitter 205 at the intersection,
The CPU (1) 14 records in the memory which lane the vehicle has passed. Take a picture of the background of the car at the intersection just before turning left at point A. When the video passes through the course B when returning from the destination, it is first received from the transmitter 203 at the intersection and displayed on the LCD monitor. If the driver sees this video, he / she can safely make a right turn operation.

As a function of the route guidance system, from the rear background when a certain intersection passes, the front background of the intersection when returning is automatically displayed. Since the images of the background behind the intersections are sequentially stored in the memory, this image can be sequentially reproduced at the required intersections on the way back, and the image information for route guidance at each intersection can be easily utilized. Naturally, the display of directions is automatically reproduced and the driver does not perform any troublesome operation, so a safe and reliable drive is possible.

[0043]

INDUSTRIAL APPLICABILITY The present invention relates to a memory control circuit in a system in which a consumer-level digital electronic camera can be used in combination with an accident monitoring system and a route guidance system. When a photograph is taken and the photographed image is used as route guidance information, a memory control circuit is used to correct the problem of the reversal phenomenon of the photographed image caused by the reflector by a method of photographing with one camera and rotation of the reflector. The inversion phenomenon can be solved by the means for changing the address order of, and the camera system can be downsized and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic view showing a state in which a vehicle is equipped with a route guidance system using a digital electronic camera according to the present invention.

2A and 2B are posture diagrams when photographing a front direction of a vehicle and a rear direction of the vehicle in a variable photographing direction method by rotating a reflecting mirror of the present invention. FIG. 6C is a diagram of the camera viewed from the rear side.

FIG. 3 is a layout view of optical transmission / reception viewed from above the intersection and a layout view showing a round-trip trajectory of the vehicle when the vehicle curves at the intersection. Especially when heading to the destination, direction A is shown, and on the way back, direction B is shown.

FIG. 4 is a side view when the vehicle curves at the position A in FIG.

5 is a background view seen from the rear of the vehicle at an intersection when the vehicle curves at the position A in FIG. 3;

6 is a front background view at the time of returning when the vehicle curves at the position of B in FIG. 3;

7A and 7B show a background, an image on an image sensor, and a reproduced image of a background on a viewfinder or a monitor, respectively, when shooting with a normal video camera.
When photographing the front background using the reflecting mirror of the present invention, (D) is the front background, (E) is image formation on the image sensor, and (F).
Is a reproduced image of the front background on the viewfinder or the monitor when the image is reproduced as it is, (G) is an apparently changed scanning direction for improvement, and (H) is the reproduced image on the monitor. It is a figure which shows a reproduction | regeneration image. When photographing the rear background using the reflecting mirror of the present invention, (I) is the rear background, (J) is an image formed on the image sensor, and (K) is a viewfinder or monitor when the image is reproduced as it is. FIG. 9 is a diagram showing a reproduced image on the rear background of FIG. 7, (L) is a reproduced image on the monitor reproduced by that method when the scanning direction is apparently changed for improvement.

FIG. 8 is a block diagram showing an embodiment of a circuit of a digital electronic camera.

FIG. 9 is a diagram showing a relationship between a display screen and a memory address.

FIG. 10 is a block diagram of a control circuit of the video memory of the present invention.

FIG. 11 shows an embodiment of a horizontal scanning control circuit of the present invention.

FIG. 12 shows an embodiment of a vertical scanning control circuit of the present invention.

FIG. 13 is a diagram showing a phase relationship between each signal of the NTSC system, particularly in a horizontal blanking period and a vertical blanking period.

FIG. 14 is a diagram showing a change in memory address in the case of reproduction of one screen of normal shooting.

FIG. 15 is a diagram showing a method in which the access order of the addresses of the memory is changed in order to correctly reproduce the front background with the reflecting mirror set in front of the camera.

FIG. 16 is a diagram showing a method in which the access order of the addresses of the memory is changed in order to correctly reproduce the rear background with the reflecting mirror set in front of the camera.

[Explanation of symbols]

1 ... Lens 2 ... Iris 3 ... Infrared cut filter 4 ... CCD 5 ... CDS circuit 6 ... Gamma correction circuit, AGC circuit, clamp circuit 7 ... AD conversion circuit
8 ... Signal processing circuit 9 ... Iris control circuit 10
... CCD drive circuit 11 ... synchronization signal timing signal generation circuit 12 ... brake signal detection circuit 13 ... interface circuit 14 ... system control C
PU1 15 ... Interface CPU2 16
... Memory control circuit 16A, 16B ... Selector
16E ... DA circuit 16F ... Video amplifier 16
I ... Address counter 16J ... Control signal generating circuit 17 ... Memory card 18 ... Release button for photography 18A ... Release signal for photography 19 ... Brake 20 ... Sudden braking state detection sensor 20A ... Sudden braking signal 24 ... Car 25 ... LCD monitor 26 ...
Play button for guidance 27. Accident situation play button
28 ... Light receiving sensor 29 ... Light receiving element 30 ... Sensor amplifier circuit 31 ... Light emitting element power amplifier circuit 41
… Digital electronic camera device 42… Digital electronic camera 43… Lens 44… Reflector 46… Motor 47… Gear 1 48… Gear 2 49…
Solenoid 50 ... SRAM video memory circuit
100 ... Vehicle 101 ... Optical signal transmitter at intersection 102 ... Optical signal receiver at intersection 103 ... Optical signal transmitter 104 at intersection ... Optical signal receiver 105 at intersection ... Intersection Optical signal transmitter 106 at the intersection optical signal receiver 107 at the intersection optical signal transmitter 108 at the intersection optical signal receiver 110 at the intersection optical signal transmitter / receiver Mounted pillar 111 ... Solar cell unit 161 for power supply of transceiver at intersection ... Memory control circuit 161A ... Horizontal scanning control circuit 161B ... Horizontal scanning control circuit 161A
A ... Up-down counter 161AB ... Latch circuit 161AC ... Comparator 161AD ... Latch circuit 161AE ... FF circuit 161AF ... 3
State output buffer 161AG ... Shift register 161AH ... Shift register 161AI ... Selector (0, 1, ..., N-1 circuit) 162A ... Vertical scanning control circuit 162B ... Vertical scanning control circuit
162AA ... Up-down counter 162AB
... Latch circuit 162AC ... Comparator 16
2AD ... Latch circuit 162AE ... FF circuit 1
62AF ... 3-state output buffer 162AG ...
Shift register 162AH ... Shift register 1
62AI ... Selector (0, 1, ..., MN circuit)
163A ... Video memory circuit 163B ... Video memory circuit 201 ... Optical signal transmitter 202 at crossing ... Optical signal receiver 203 at crossing ... Optical signal transmitter 204 at crossing ... Optical at crossing Optical signal receiver 205 ... Optical signal transmitter 206 at intersection ... Optical signal receiver 207 at intersection ... Optical signal transmitter 208 at intersection ... Optical signal receiver 209 ... Optical signal transmitter 401 at the intersection ... Optical signal transmitter 402 at the intersection ... Optical signal receiver at the intersection

Claims (2)

(57) [Claims] 1. A road navigation camera system that can be used in combination with an accident monitoring system for monitoring traffic accidents and a road guidance system for recording and reproducing image information at intersections to provide road guidance image information. It is arranged to rotate to a position when it captured the front background accident monitoring, a reflecting mirror that rotates at a position capable of taking the case of the directions backward background, to restore inverting the optical image by the reflection mirror to correct the reproduced image a road draft, characterized in that it comprises a memory control means for changing the access order of the address of the image memory
Internal camera system . To 2. To provide accurate guidance information return at the intersection, to receive the oscillation signal at the intersection difference point, automatically reads the ambient condition exits ambient conditions and intersection entering the car intersection, 2. The route guide according to claim 1, wherein the entrance and exit positions of the intersection are automatically detected to control the attitude of the reflecting mirror, and the memory control means automatically determines the scanning direction of the memory address . Camera system .