JP3396508B2 - Method for manufacturing thin film transistor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor (TFT) used as a switching element of an active matrix type liquid crystal display element, for example.

[0002]

2. Description of the Related Art As a display element using liquid crystal, a large capacity and high density active matrix type liquid crystal display element directed to a television display, a graphic display or the like has been developed and put to practical use. In such a display element, a semiconductor switch is used as a means for driving and controlling each pixel so that high-contrast display without crosstalk can be performed. As the semiconductor switch, a TFT formed on a transparent insulating substrate is usually used because it can be used for transmissive display and can be easily enlarged. Also,
Among TFTs, those using amorphous silicon (a-Si) are generally used because a low temperature process is possible.

In general, as an active matrix type liquid crystal display device, two substrates, each of which has been subjected to an alignment treatment by rubbing, are arranged parallel to each other so that their alignment directions are 90 degrees. A twisted nematic (TN) type liquid crystal device having a nematic type liquid crystal composition sandwiched therebetween is widely used.

[0004]

By the way, a-SiT
In many cases, the FT has an inverted staggered structure in which a gate is arranged in a lower layer and a source / drain is arranged in an upper layer with an a-Si layer as an active layer interposed therebetween. It can be roughly divided into those having a channel protective film and those not having it.

TFT of a type having no channel protective film
In spite of the fact that the a-Si active layer is a thick layer of about 3000 angstroms, its deposition rate is about 100.
Due to the low speed of angstrom / min, it takes about 30 minutes to form the a-Si active layer.
Therefore, in order to improve the productivity, as the film formation rate of the a-Si layer is increased, the film quality of the a-Si layer is deteriorated and T
There has been a problem that the FT characteristic is deteriorated.

[0006] Further, a TF of a type having a channel protective film
At T, the film formation rate was about 20 even though the channel protective film was a thick layer of about 3000 Å.
Since the speed is as low as 0 Å / min, it takes about 15 minutes to form the channel protective film. Therefore, as the film forming speed of the channel protective film is increased in order to improve the productivity, the film quality of the channel protective film is deteriorated and the TFT characteristics are deteriorated, as in the previous case. .

The present invention has been made in view of such conventional circumstances. Even if a semiconductor active layer or a channel protective film formed at a high speed is used by devising a semiconductor active layer or a channel protective film, It is an object of the present invention to provide a film forming method capable of obtaining desired TFT characteristics.

[0008]

According to a first aspect of the present invention, a gate electrode, a gate insulating film, a semiconductor active layer, a low resistance semiconductor film, a channel protective film, a source electrode and a drain electrode are formed on an insulating substrate. In the method of manufacturing a thin film transistor, the channel protective film is composed of a lowermost layer portion, an intermediate layer portion and an uppermost layer portion from a side closer to the insulating substrate, and the lowermost layer portion has a lower speed than the intermediate layer portion and the uppermost layer portion. Film formation ,
In the method of manufacturing a thin film transistor, the intermediate layer portion is formed at a lower speed than the uppermost layer portion .

According to a second aspect of the present invention, there is provided a method of manufacturing a thin film transistor, which comprises forming a gate electrode, a gate insulating film, a semiconductor active layer, a low resistance semiconductor film, a source electrode and a drain electrode on an insulating substrate. Is a lowermost layer portion, an intermediate layer portion and an uppermost layer portion from the side closer to the insulating substrate, and the semiconductor active layer is formed by a plasma CVD method.
The lowermost layer is formed at a lower speed than the intermediate layer, and the uppermost layer and the lowermost layer are formed at the same speed.
The film forming rate for forming the intermediate layer is 400 to 500.
0 angstrom / min, the RF power used for forming the lowermost layer portion and the uppermost layer of the semiconductor active layer is smaller than the RF power used for forming the intermediate layer portion, In the method of manufacturing a thin film transistor, the lowermost layer portion , the intermediate layer portion, and the uppermost layer portion are continuously formed.

Here, the film formation rate of the semiconductor active layer or the channel protective film depends on the discharge power, the pressure, the flow rate of the source gas,
It can be changed by controlling at least one of the flow rate ratios. Further, in the semiconductor active layer or the channel protective film, the thickness of each of the lowermost layer portion and the uppermost layer portion is preferably 20% or less with respect to the total thickness.
Furthermore, it is preferable that the film forming rates of the lowermost layer portion and the uppermost layer portion are 1000 angstroms / minute or less.

[0011]

[Operation] According to the present invention, when the semiconductor active layer or the channel protective film is formed, the semiconductor active layer is formed at low speed at the lowermost layer and the uppermost layer of the semiconductor active layer or the lowermost layer of the channel protective film. Improve the interface characteristics with, for example, the gate insulating film and the low resistance semiconductor film on both sides of the layer, or the interface characteristics with, for example, the semiconductor active layer under the channel protection film, and remove most of the semiconductor active layer or the channel protection film. The productivity is improved by forming the occupying intermediate layer portion at a high speed. As a result, desired TFT characteristics can be obtained even when the film formation speed of the semiconductor active layer or the channel protective film is increased, and productivity can be improved.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the drawings by exemplifying a case where the present invention is applied to an active matrix type liquid crystal display device. First, an embodiment of the invention of claim 1 will be described. FIG. 1 is a sectional view showing one pixel portion of an active matrix type liquid crystal display device manufactured by using the embodiment of the invention of claim 1. Explaining the manufacturing process with reference to FIG. 1, first, for example, glass (70
The gate electrode 2 made of, for example, molybdenum / tantalum (Mo-Ta) is formed on one main surface of the insulating substrate 1 made of 59). Next, as the gate insulating film 3 so as to cover the gate electrode 2, a silicon oxide film 3a having a film thickness of 3000 angstroms formed by a normal temperature thermal CVD method at a substrate temperature of 400 ° C.,
Film thickness 500 by plasma CVD method with substrate temperature of 350 ° C.
An angstrom silicon oxide film 3b is sequentially formed, and a semiconductor active layer 4 made of a-Si having a film thickness of 3000 angstrom is further formed.

Here, a method of manufacturing the semiconductor active layer 4 will be described in detail. The reaction chamber for film formation has a diameter of 30 cm
, A circular high frequency electrode and a ground electrode facing the circular high frequency electrode, and a gas supply system for SiH ₄ and H ₂ and an exhaust system composed of a turbo molecular pump and a rotary pump are connected. The insulating substrate 1, which is a sample, is clamped to a heated ground electrode and controlled so that the substrate surface temperature becomes 270 ° C. SiH ₄ 100 sccm and H ₂ 2 in the reaction chamber
00 sccm is introduced, and these gases are exhausted through a turbo molecular pump and a rotary pump. At this time, the pressure in the reaction chamber is controlled to 1.0 Torr by adjusting the opening of the exhaust valve. When a high frequency of 13.56 MHz is applied to the high frequency electrode in this state, glow discharge occurs and the semiconductor active layer 4 is deposited. At this time, if the RF power is set to 50 W, 200 W, and 400 W, the film forming rates of 100 Å / min, 400 Å / min, and 600 Å / min can be obtained, respectively. Therefore, first, the lowermost layer portion 4a is formed at a film forming speed of 100.
A film having a thickness of 100 angstroms is formed from a film having a thickness of angstroms / minute, and then the intermediate layer portion 4b is formed at a film forming speed of 4
A film having a thickness of 900 Å is formed by using a film having a thickness of 00 Å / min. Further, the uppermost layer portion 4c is formed to a thickness of 2000 angstroms by a film formation rate of 600 angstroms / minute, and the semiconductor active layer 4 having a film thickness of 3000 angstroms is formed.

Then, for example, a film having a thickness of 5 is formed on the semiconductor active layer 4.
A low resistance semiconductor film 5 of 00 angstrom is formed.
Then, the semiconductor active layer 4 and the low resistance semiconductor film 5 are processed to obtain a channel region, a source region and a drain region. Further, on the gate insulating film 3, ITO (Indium T
The pixel electrode 6 made of in oxide) is formed.
Next, the source electrode 7 is formed on the source region so as to be connected to the pixel electrode 6, and the drain electrode 8 is formed on the drain region. Thus, the TFT 9 including the gate electrode 2, the gate insulating film 3, the semiconductor active layer 4, the low resistance semiconductor film 5, the source electrode 7 and the drain electrode 8 is obtained on the insulating substrate 1. Furthermore, above this TFT 9,
In order to suppress the change over time, for example, a silicon nitride film 10 having a film thickness of 2000 angstrom is formed, and a predetermined active element substrate 1 is formed.
1 is obtained. On the other hand, an insulating substrate 1 made of, for example, glass
The common electrode 13 made of, for example, ITO is formed on one main surface of the second electrode 2.
The counter substrate 14 is formed by forming.
Then, the alignment film 1 made of, for example, low-temperature cure type polyimide (PI) is formed on the entire main surface of the active element substrate 11.
5 is formed, and an alignment film 16 made of, for example, low temperature cure type polyimide (PI) is formed on the entire main surface of the counter substrate 14. Then, on the main surfaces of the active element substrate 11 and the counter substrate 14, the alignment films 15 and 16 are rubbed in a predetermined direction with a cloth or the like to be subjected to the alignment treatment by rubbing. .
Further, the active element substrate 11 and the counter substrate 14 are arranged such that their main surface sides face each other and their alignment axes form an angle of about 90 °, and the liquid crystal 17 is held in these gaps. Here, when the active element substrate 11 and the counter substrate 14 are combined, the rubbing directions of the alignment films 15 and 16 are set such that the good viewing angle direction is the front direction. Then, on the other main surface side of the active element substrate 11 and the counter substrate 14,
Polarizing plates 18 and 19 are respectively applied, and illumination is performed from the other main surface side of either the active element substrate 11 or the counter substrate 14.

In this embodiment, the interface characteristic between the semiconductor active layer 4 and the gate insulating film 3 is formed by forming the lowermost layer portion 4a of the semiconductor active layer 4 at a lower speed than the intermediate layer portion 4b and the uppermost layer portion 4c. And the semiconductor active layer 4 can be formed at high speed, and productivity can be improved.

Next, an embodiment of the invention of claim 2 will be described with reference to FIG. This embodiment differs from the above-described embodiments in the method of forming the semiconductor active layer 4. That is, in the reaction chamber for film formation, SiH ₄ 40 sccm,
When H ₂ 160 sccm and RF power of 100 W are set, a film forming rate of about 80 Å / min can be obtained.
iH ₄ 200sccm, H ₂ 200sccm, RF
When the power is set to 400 W, a film forming rate of about 1000 Å / min can be obtained. Therefore, first, the lowermost layer 4a is formed with a film having a film formation rate of 80 angstrom / min.
It is formed to a thickness of 00 angstroms, and then the intermediate layer portion 4b is formed to a thickness of 2800 angstroms by a film forming rate of 1000 angstroms / minute. Further, the uppermost layer portion 4c is formed to have a thickness of 100 angstrom by a film forming rate of 80 angstrom / min, and the semiconductor active layer 4 having a film thickness of 3000 angstrom is formed.

In this embodiment, the lowermost layer portion 4a and the uppermost layer portion 4c of the semiconductor active layer 4 are formed at a lower speed than the intermediate layer portion 4b, so that the interface characteristics between the semiconductor active layer 4 and the gate insulating film 3 are formed. Also, the interface characteristics between the semiconductor active layer 4 and the low-resistance semiconductor film 5 are improved, and the semiconductor active layer 4 can be formed at high speed, so that the productivity can be improved.

Next, an embodiment of the invention of claim 3 will be described. FIG. 2 is a sectional view showing a pixel portion of an active matrix type liquid crystal display device manufactured by using the embodiment of the invention of claim 3, and the portions corresponding to those of FIG. 1 are designated by the same reference numerals. . Explaining according to the manufacturing process with reference to FIG. 2, first, the gate electrode 2 made of, for example, molybdenum / tantalum (Mo-Ta) is formed on one main surface of the insulating substrate 1 made of, for example, glass (Corning 7059). Next, the gate insulating film 3 is formed so as to cover the gate electrode 2.
As the silicon oxide film 3a having a film thickness of 3000 angstroms by the atmospheric pressure thermal CVD method at a substrate temperature of 400 ° C. and the silicon nitride film 3b having a film thickness of 500 angstroms by the plasma CVD method at a substrate temperature of 350 ° C., are formed in order. A semiconductor active layer 4 made of a-Si having a film thickness of 500 angstrom is formed. Then, a silicon nitride film is deposited on the semiconductor active layer 4 to form the channel protection film 21.

Now, a method of manufacturing the channel protective film 21 will be described in detail. The reaction chamber for film formation has a diameter of 30.
It is equipped with a circular high frequency electrode of cm and a ground electrode facing it, and is connected to a gas supply system of SiH ₄ , NH ₃ and N ₂ and an exhaust system consisting of a turbo molecular pump and a rotary pump. The insulating substrate 1, which is a sample, is clamped to a heated ground electrode and controlled so that the substrate surface temperature becomes 270 ° C. SiH ₄ 20scc in the reaction chamber
m, NH ₃ 100 sccm and N ₂ 300 sccm
Is introduced, and these gases are exhausted through a turbo molecular pump and a rotary pump. At this time, the pressure inside the reaction chamber is adjusted to 0.6 Ton by adjusting the opening of the exhaust valve.
Let rr control it. 13.56 in the high-frequency electrode in this state
When a high frequency of MHz is applied, glow discharge occurs and a silicon nitride film is deposited. At this time, RF power is 100W,
When set to 300W and 600W, 200 Å / min, 600 Å / min, and 10 Å / min, respectively.
A deposition rate of 00 Å / min is obtained. Therefore, first, the lowermost layer portion 21a is formed with a film formation rate of 200 angstroms / min to a thickness of 500 angstroms, and then the intermediate layer portion 21b is formed with a film formation rate of 600 angstroms / min to a thickness of 500 angstroms. To form. Further, the uppermost layer portion 21c is formed at a film forming speed of 10
A film having a thickness of 2000 angstroms is formed from a film having a thickness of 00 angstroms / minute, and a channel protection film 21 having a film thickness of 3000 angstroms is formed.

Subsequently, after the channel protection film 21 is processed into a predetermined shape, a low resistance semiconductor film 5 having a film thickness of, for example, 500 angstrom is formed. Then, the semiconductor active layer 4 and the low resistance semiconductor film 5 are processed to obtain a channel region, a source region and a drain region. In addition, on the gate insulating film 3,
The pixel electrode 6 made of ITO (Indium Tin Oxide) is formed. Next, the source electrode 7 is formed on the source region so as to be connected to the pixel electrode 6, and the drain electrode 8 is formed on the drain electrode 8. Thus, the gate electrode 2, the gate insulating film 3, the semiconductor active layer 4, the low resistance semiconductor film 5, and the channel protective film 2 are formed on the insulating substrate 1.
1, T composed of a source electrode 7 and a drain electrode 8
FT9 is obtained. The rest is the same as in the case of FIG.

In this embodiment, the lowermost layer portion 21a of the channel protective film 21 is formed at a lower speed than the intermediate layer portion 21b and the uppermost layer portion 21c, so that the interface characteristics between the channel protective film 21 and the semiconductor active layer 4 are reduced. In addition to good performance, the channel protective film 21 can be formed at high speed, so that productivity can be improved.

The structure of the semiconductor active layer 4 of the TFT 9 or the channel protection film 21 is not limited to the one described so far, and even if various modifications are made within the range satisfying the constitutional requirements of the present invention, the scope of the present invention. Needless to say, it is included in. For example, in the laminated film used to form the semiconductor active layer 4 or the channel protection film 21, the RF power was changed to obtain different film formation rates in the above-described embodiments, but in addition to this, pressure and raw materials were used. It is possible to change the film formation rate depending on the gas flow rate, the flow rate ratio, and the like, and in that case, the same effect can be obtained. Of course, the channel protective film 2
1 may be a silicon oxide film instead of a silicon nitride film. Further, although the film forming rate is changed to three stages in the above-described embodiments, it goes without saying that a film forming rate higher than that is included in the scope of the present invention. Further, the embodiment shown in FIG. 1 is a T type having a channel protective film 21 as shown in FIG.
The same effect can be obtained even when applied to FT. Further, the present invention can be applied not only to an active matrix type liquid crystal display element but also to an a-Si contact sensor or the like.

[0023]

According to the present invention, while maintaining good interface characteristics between the semiconductor active layer and the gate insulating film or the low resistance semiconductor film, or between the channel protective film and the semiconductor active layer,
The productivity of FT can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing an active matrix type liquid crystal display device using an embodiment of the present invention.

FIG. 2 is a sectional view showing an active matrix type liquid crystal display element using another embodiment of the present invention.

[Explanation of symbols]

1 Insulation board 2 Gate electrode 3 Gate insulation film 4 Semiconductor active layer 5 Low resistance semiconductor film 7 Source electrode 8 drain electrode 9 TFT 21 channel protective film 4a, 21a bottom layer 4b, 21b Intermediate layer part 4c, 21c Top layer

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/205 H01L 21/31 H01L 31/316-21/318 H01L 21/336

Claims (2)

(57) [Claims] 1. A gate electrode, a gate insulating film on an insulating substrate,
In a method of manufacturing a thin film transistor including a semiconductor active layer, a low resistance semiconductor film, a channel protective film, a source electrode and a drain electrode, the channel protective film is a lowermost layer portion, an intermediate layer portion and a lowermost layer from a side closer to the insulating substrate. made from the top portion, the lowermost layer portion deposited slower than that of the intermediate layer portion and the uppermost layer portion, the in
A method of manufacturing a thin film transistor, wherein the inter-layer portion is formed at a lower speed than the uppermost layer portion . 2. A gate electrode, a gate insulating film on an insulating substrate,
In a method of manufacturing a thin film transistor having a semiconductor active layer, a low resistance semiconductor film, a source electrode and a drain electrode, the semiconductor active layer is composed of a lowermost layer portion, an intermediate layer portion and an uppermost layer portion from a side closer to the insulating substrate. The semiconductor active layer is formed by a plasma CVD method, the lowermost layer is formed at a lower speed than the intermediate layer, and the uppermost layer and the lowermost layer are formed at the same speed. The film forming rate for forming the layer portion is 400 to 5000 angstrom / min, and the RF power used for forming the lowermost layer portion and the uppermost layer of the semiconductor active layer is used for forming the intermediate layer portion. Smaller than the RF power applied to the semiconductor active layer, the lowermost layer portion , the intermediate layer portion, and the front portion of the semiconductor active layer.
The method for manufacturing a thin film transistor, wherein the uppermost layer is continuously formed.