JP3399059B2 - Switching type demodulation circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching type demodulation circuit, and as a demodulation of a digital signal which is widely used in the field of data transmission, phase shift keying (hereinafter referred to as PSK) has been individually configured as a circuit. And a frequency shift keying (hereinafter referred to as FSK) demodulation, which is realized by adding a simple switching (selecting) circuit or the like with the majority of the circuit configuration being common. In addition, MS will be added to FSK as described later.
K (Minimum Shift Keying) is also included.

[0002]

[Technical background and aim] In the field of data transmission, P
SK (Phase Shift Keying) and FSK (Frequency Shift Ke)
Yying) is widely used as a modulation system and a demodulation system for digital signals, but PSK and FSK are individually configured and implemented. However, the demand has been diversified recently, and both the PSK and FSK systems (circuits) are installed in the modulation, transmission device, reception, and demodulation device.
There are also cases where people want to share.

In response to the recent digital era, if it becomes possible to design a digital demodulation circuit capable of carrying out demodulation of a plurality of systems such as PSK and FSK in the integrated circuit, most of the circuit components will be made common. Then, by switching a part by a simple selecting means, both PSK and FSK equations can be implemented. Furthermore, if the modulation circuit side is also configured so that both types can be implemented by switching with the selection means, a new usage of modulation is used in which the modulation circuit and demodulation circuit are synchronized by some control signal and the selection means is frequently switched and used. The demodulation method can be realized.

[0004]

2. Description of the Related Art In communication transmission technology, in order to use a transmission medium efficiently, a technique of subjecting an information signal to be transmitted to a certain conversion is used. This is called normal modulation, and the reverse operation is called. It is called demodulation. Modulation and demodulation require two elements, a modulated signal and a carrier. As a carrier, a single-frequency sine wave or cosine wave, or other continuous wave or a discrete waveform consisting of a pulse train is used. Used.

In the digital modulation method, for example, the information signal to be transmitted is included in the modulated signal as a discrete amount, and therefore the original information signal which is the modulated signal is a digital signal as well as an analog signal. Even if a signal is quantized in the modulation process, it belongs to the category of digital modulation method. Also, if the carrier is a single frequency sine wave,
The parameters are classified into amplitude modulation, frequency modulation, phase modulation, etc., depending on the type of parameter that changes depending on the modulated signal. In particular,
When the modulated signal is a digital signal, it is called shift keying (SK) instead of modulation, and the above FSK and PSK are used.
Etc. are typical examples.

Conventionally, PSK and FSK are realized by their own circuits. For example, PSK is demodulated by synchronous detection, but FSK does not realize a demodulation method as synchronous detection. Specifically, demodulation of a PSK modulated wave is performed by using a carrier obtained mainly by reproducing as a carrier and performing synchronous detection by multiplying the carrier with an input PSK modulated wave, and using a dedicated PSK demodulation circuit. To be achieved. On the other hand, the demodulation of the FSK modulated wave is generally performed by converting the frequency shift into a change in amplitude and demodulating. Therefore,
In the modulation circuit and the demodulation circuit, since PSK and FSK are each configured as a unique circuit, the integrated circuit (I
C) conversion is also performed individually.

The PSK modulated wave Sp (t) has the amplitude represented by A regardless of its magnitude, and the digital information signals {+1 and −
Letting 1 (or 0) binary signal} be d (t), Sp (t) = Ad (t) cosωt ………………………… (1) As can be seen from the first equation, the PSK modulated wave is obtained by multiplying the information signal d (t) and the carrier wave cosωt, and basically, the suppressed carrier wave (constant angular frequency) is used, so that the demodulation Requires a carrier recovery circuit and a synchronous detection multiplier.

Here, regarding the conventional PSK demodulation circuit,
This will be described with reference to FIG. FIG. 1 is a block diagram of a conventional PSK demodulation circuit 1. As a main configuration, a square loop type carrier recovery circuit (square circuit) 2 and a multiplier 6 for synchronous detection are provided.
It is an example of a demodulation circuit using the above. Normally used PSK
The modulated wave has a carrier wave phase of 0 or π. Therefore, the squared circuit 2 square-detects the PSK modulated wave to obtain 0 or π.
It becomes 2π (= 0), the phase change amount disappears and a carrier wave having a double frequency is generated. Unnecessary frequency components of the squared detection output are removed by a BPF (bandpass filter) 3, and B
The non-linear component generated in PF3 is compensated by the filtering operation in PLL4, and then divided in half by 1/2 divider 5 to obtain the original carrier wave. Reference numeral 7 is an LPF that transmits only the information signal d (t) which is a modulated signal in the synchronous detection output.
(Low-pass filter).

On the other hand, the FSK demodulation circuit uses the MS under the special condition in the FSK modulated wave, that is, when the modulation index is 0.5.
It becomes a K (Minimum Shift Keying) modulated wave and synchronous detection becomes possible, but an FM demodulation circuit is generally used. The configuration and operation of the conventional FM demodulation circuit is the same as the above PSK.
Since it is more well known than the demodulation circuit, it is omitted.

[0010]

If both PSK and FSK types are used and they are to be arbitrarily switched and used, conventionally, two types of demodulation circuits (IC) for PSK and FSK must be provided. However, there is a drawback that the circuit scale is doubled, and the cost for IC conversion is increased accordingly. Therefore, FSK demodulation and PS can be performed with one IC.
The appearance of a demodulation circuit capable of both K demodulation has been long awaited.

[0011]

In order to solve the above problems, the present invention provides a phase locked loop for inputting a modulated signal to reproduce a carrier wave and a phase of the carrier wave from the phase locked loop.
A phase shift circuit that shifts 90 °, and a first changeover switch that selectively outputs an output signal of either the phase locked loop or the phase shift circuit according to the type of modulation in the modulated signal,
A first multiplier for multiplying the signal selected by the changeover switch by the modulated signal to obtain the original information signal, a power supply for DC bias supply, and a type of modulation in the modulated signal. Provided is a switching demodulation circuit including a second switching switch for supplying either a data signal or a DC bias to a second multiplier included in a phase locked loop and configured to perform a plurality of types of demodulation. It is a thing.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION The modulated signal supplied to the switching type demodulation circuit of the present invention may be a signal of any system such as PSK or FSK. For generating the PSK modulated signal, one of them is shown in FIG.
The conventional PSK modulation circuit 1 shown in FIG. 2 may be used, but as described above, an example of a modulation and demodulation method in which the switching type modulation circuit and the demodulation circuit are synchronized by some control signal and the selection means is frequently switched and used. In order to explain the above, the switching modulation circuit 9 in the switching modulation and / or demodulation circuit previously proposed by the present applicant will be briefly described with reference to the block diagram of FIG.

The switching type modulation circuit 9 includes a low output impedance amplifier 11, a selection switch (hereinafter abbreviated as "switch") Sw1 and a DC voltage source (hereinafter abbreviated as "power supply") E ₁ as selection means. DC bias supply 1
2, voltage controlled oscillator (VCXO) 13, and multiplier 14
Etc., and these are connected as shown in FIG.

In such a structure, at the time of the FSK modulation operation, the changeover switch Sw1 is artificially or mechanically connected to the contact a side. Therefore, the information signal d (t) is supplied to the voltage controlled oscillator 13 via the amplifier 11 and the switch Sw1, where the information signal d (t) is supplied by two types of carriers.
(t) FSK modulation is performed. When the modulation signal is +1, the output FSK modulated wave from the voltage controlled oscillator 13 is Sm (t),
If -1 (or 0) and Sv (t), they are respectively expressed by the following equations.

Sm (t) = Acosω ₁ t …………………… (2) Sv (t) = Acosω ₂ t …………… (3) The FSK modulated wave Sm (t) ), Sv (t) are supplied to one input terminal of the multiplier 14 and the bias voltage from the DC bias supplier 12 is supplied to the other input terminal thereof.
The multiplier 14 operates simply as an amplifier. Therefore, the FSK modulated signals Sm (t) and Sv (t) are output from the output terminal Out2.

The information signal d (t) supplied to the voltage controlled oscillator 13 via the amplifier 11 and the switch Sw1.
Is a digital signal, the FSK modulation in the switching modulation circuit 9 is a phase continuous FSK modulation, and is also FM modulation in a broad sense. Therefore, a conventional FM demodulation circuit can be used for the demodulation.

Next, the PSK modulation operation will be described. When the switch Sw1 is connected to the contact b, the amplifier 11 has a low output impedance, so that the DC bias supply 1
2 does not function, and the information signal d (t) is supplied to the multiplier 14 as it is. On the other hand, the voltage controlled oscillator 1
Since there is no input signal in 3, the voltage controlled oscillator 13 outputs the mere carrier wave cosωt. Therefore, the multiplier 1
The output Sp (t) from 4 is PS as shown in the first equation.
It becomes a K modulation signal and is output from the output terminal Out2. Thus, in the switching modulation circuit 9, FSK modulation and PS
The K modulation can be performed by switching with one switch Sw1 and the voltage controlled oscillator 13 is shared.

Next, each embodiment of the switching type demodulation circuit of the present invention will be described with reference to FIG. FIG. 3 is a block diagram showing a switching type demodulation circuit 10 according to the first embodiment of the present invention.
17, loop filter (LF) 18, voltage controlled oscillator (VCO) 19, π / 2 phase shift circuit 21, LPF (low-pass filter) 22, amplifier 23, DC power supply E ₂ , and switch Sw2 which is a selection means, It is configured by including Sw3 and the like and connecting them as illustrated. The multipliers 16 and 1
A phase locked loop (PLL) 25 is formed by the loop filter 7, the loop filter 18, and the voltage controlled oscillator 19.

The contacts a of the switches Sw2 and Sw3 are F
Since it is for SK (or MSK) and the contact b is for PSK and these need to be switched in conjunction with each other, it is convenient to configure with one interlocking switch, for example. The DC power supply E ₂ is provided to supply a voltage such that the conversion gain in the multiplier 16 before and after the contact switching of the switch Sw3 is almost unchanged.

By the way, the switching type demodulation circuit 10
Although the modulation circuits such as the switching type modulation circuit 9 are originally independent circuits, when these circuits are applied to a communication device,
Since bidirectional transmission is performed in communication such as data transmission, one communication device is naturally provided with both modulation and demodulation circuits. Therefore, the switching type demodulation circuit 10 and the switching type modulation circuit 9 constitute one communication device, and if a plurality of such communication devices are used, the switching circuits of the modulation circuit and the demodulation circuit are synchronized with each other and frequently switched. It is also possible to use a communication method that is used by using.

Next, the switching type demodulation circuit 10 will be described with reference to FIG.
The operation will be described. An FSK modulated wave or a PSK modulated wave is supplied to the multipliers 15 and 16 as a modulated signal from the input terminal In3. First, regarding the PSK demodulation operation assuming that the PSK modulated wave Sp (t) comes in. explain. In that case, the switches Sw2 and Sw3 are connected to the contact b side as described above. In general, the multiplier operates as a multiplier or a phase comparator (further, an amplifier) depending on the form of the signal supplied to each of its input terminals. However, during PSK demodulation, the multiplier 16 will be clear from the following description. It becomes multiplication operation.

PSK modulated wave Sp that has entered the input terminal In3
(t) is carrier level A = 1, phase delay (phase component) =
If φ ₁ is given, it is expressed by the following equation. Sp (t) = d (t) cos (ωt + φ ₁ ) ………………………… (4) Note that the information signal d (t) is only +1 and −1 (or 0). There is no binary signal.

On the other hand, the reproduced carrier wave output from the voltage controlled oscillator 19 is sin (ωt +) when the phase delay is φ _2.
φ ₂ ), and is output to the multiplier 17 and the π / 2 phase shift circuit 21. In this π / 2 phase shift circuit 21, since the phase is shifted by π / 2 radian (= 90 °), its output is cos (ωt + φ
₂ ) becomes a carrier wave, and the multiplier 1 is passed through the switch Sw2.
5 is supplied. Since the multiplier 15 is also supplied with the PSK modulated wave Sp (t) from the input terminal In3 as in the fourth equation, the multiplication output Sd (t) is expressed by the following equation. Sd (t) = d (t ) {cos (2ωt + φ 1 + φ 2) + cos (φ 1 -φ 2)} / 2 ......... (5)

Of the multiplication output Sd (t), high frequency components such as carrier components are removed by the LPF 22, and the demodulated information signal d (t) is output to the output terminal Out3. This demodulation information signal d (t) is supplied to the amplifier 23 and the switch Sw3.
Is also supplied to the multiplier 17 via the above, where it is multiplied by the reproduced carrier wave sin (ωt + φ ₂ ) from the voltage controlled oscillator 19 to obtain a multiplication output of d (t) sin (ωt + φ ₂ ). , To the multiplier 16.

In the multiplier 16, the PSK modulated wave Sp is further added.
The multiplication with (t) is performed, and the output Ep (t) is as follows. Ep (t) = {d ² (t) sin (2ωt + φ ₁ + φ ₂ ) −d ² (t) sin (φ ₁ −φ ₂ )} / 2 = {sin (2ωt + φ ₁ + φ ₂ ) −sin (φ ₁ − φ ₂ )} / 2 ……………… (6)

As shown in this equation, d ² (t) is converted to a DC voltage to be 1, and the first term on the right side is eliminated by the loop filter 18 in the next stage, and -sin (φ of the second term on the right side is eliminated. _1- φ ₂ )
Is output to the voltage controlled oscillator 19 as an error signal. Note that the closer the values of φ ₁ and φ ₂ are, the more approximate the error signal becomes − (φ ₁ −φ ₂ ), and by supplying this to the voltage controlled oscillator 19, the error signal is The reproduced carrier of angular frequency ω is the voltage controlled oscillator 1
It will be output from 9.

In this way, the output signals finally become φ ₁ and φ
_When expressed as a phase difference with respect to ₂ , a multiplier that multiplies two input signals containing each phase delay φ ₁ and φ ₂ respectively,
Since the phase difference between the two input signals is detected, that is, the phases are compared with each other, it may be called a phase comparator as is well known.

Next, the case where an FSK modulated wave enters from the input terminal In3 will be described. In the FSK modulated wave, each carrier level is set to 1, and when the modulated signal is +1 Sm (t),-
Sv (t) when 1 or 0 can be expressed by the following equations, respectively. Sm (t) = cos (ω ₁ t + φ ₁ ) ………………………… (7) Sv (t) = cos (ω ₂ t + φ ₂ ) …………………… (8)

When the FSK modulated wave handled here is of the above-mentioned phase continuous type, it is also FM modulation in a broad sense, so that a conventional FM demodulation circuit can be used for demodulation, but in the circuit of the present invention, Demodulation is performed by the phase locked loop 25. That is, since the switches Sw2 and Sw3 are connected to the contact a side, the DC bias voltage of the DC power source E ₂ is supplied to the multiplier 17, and the multiplier 17 operates as a simple amplifier by multiplying a constant.

Therefore, the multiplier 17 and the multiplier 16 {acting as a phase comparator in this case}, the loop filter 18,
The phase-locked loop 25 is constituted by the voltage-controlled oscillator 19, and the output of the voltage-controlled oscillator 19 follows the instantaneous frequency of the input PSK modulated waves Sm (t) and Sv (t). As a result, the output of the voltage controlled oscillator 19 becomes Sm '(t) and Sv' (t) represented by the following equations, respectively. Sm '(t) = sin (ω ₁ t + φ ₃ ) ……………………… (9) Sv' (t) = sin (ω ₂ t + φ ₄ ) ………………… (10)

The oscillation output is also supplied to the multiplier 15 via the switch Sw2, where the input FSK modulated wave S is input.
Phase comparison by multiplication with m (t) and Sv (t) is performed and −sin
The components (φ ₁ −φ ₃ ) and −sin (φ ₂ −φ ₄ ) are calculated in the same manner as in the sixth formula. Then, unnecessary frequency components are further removed by the low-pass filter 22, and approximately − (φ ₁ −
Two types of phase comparison outputs of φ ₃ ) and − (φ ₂ −φ ₄ ) are output to the terminal Out3. The concrete formulas on the way can be easily inferred from the formulas 5 and 6 and will not be described here.

As described above, in the switching type demodulation circuit 10 having such a configuration, the FSK demodulation and the PSK demodulation can be switched and implemented by the two switches Sw2 and Sw3.
The multipliers 15 and 16, the LF 18, the VCO 19 (that is, the phase locked loop 25), the LPF 22 and the like are shared.

Next, a second embodiment of the switching type demodulation circuit of the present invention will be described with reference to the block diagram of FIG.
In this figure, the circuit (10) of the first embodiment of FIG.
The same components as those in (1) are assigned the same numbers (the reference numbers are changed because the configuration of the phase-locked loop is slightly different), and the detailed description thereof is omitted. As is clear from a comparison of both figures, in the case of PSK demodulation operation, the switch Sw2,
Since Sw4 is connected to the contact b, the circuits 10 and 20 of both embodiments have exactly the same configuration.

On the other hand, in the case of the FSK demodulation operation, it is connected to the contact a, which allows the input FSK modulated waves Sm (t), S
The VCO output supplied to the multiplier 16 together with v (t) is not amplified as in the first embodiment. However, when multiplying a digital signal or performing a phase comparison operation, the amplified component has almost no effect, and the operation is the same as that of the first embodiment in principle.
Detailed description thereof will be omitted. Also, with this configuration,
Compared with the circuit 10 of the first embodiment, there is an advantage that the DC power source E ₂ is unnecessary.

Next, a third embodiment of the circuit of the present invention will be described.
Description will be given with reference to the block diagram of FIG. Also in this figure, the same components as those of the circuit 10 of the first embodiment of FIG. 3 are designated by the same reference numerals (the reference numerals are changed because the configuration of the phase locked loop is slightly different). As is clear from a comparison between the two figures, the connection order of the multiplier 16 and the multiplier 17 forming the phase locked loop 27 is reversed. As a result, the expression form of the signal on the way is slightly different. The amplifiers 23 used in the circuits (10, 20) of the first and second embodiments are omitted because they do not affect the majority (the same applies to the following embodiments).

In describing the demodulation operation of the circuit 30 of the third embodiment, the PSK demodulation operation will be described first. In this case, similarly to the above, the switches Sw2 and Sw3 are connected to the contact b side. As described above, the multiplier 16 performs the multiplication operation and the phase comparison operation depending on the form of both input signals, but since one input signal does not have a phase component during PSK demodulation, the multiplication operation is performed.
In FIG. 5, the PSK modulated wave Sp (t) shown in the fourth equation is supplied to the multiplier 16 and the multiplier 15 from the input terminal In3. Since the reproduced carrier wave sin (ωt + φ ₂ ) which is the output of the voltage controlled oscillator 19 is also supplied to the multiplier 16, its multiplication output E _p1 (t) is expressed by the following equation. _{E p1 (t) = d (} t) {sin (2ωt + φ 1 + φ 2) -sin (φ 1 -φ 2)} / 2 ...... (11)

The multiplication output E _p1 (t) is supplied to the multiplier 17, and is multiplied by the PSK demodulation output d (t) supplied from the LPF 22 via the switch Sw3. Therefore, the output E _p2 (t) of the multiplier 17 is as follows. E _p2 (t) = d ² (t) {sin (2ωt + φ ₁ + φ ₂ ) − (t) sin (φ ₁ −φ ₂ )} / 2 = {sin (2ωt + φ ₁ + φ ₂ ) −sin (φ ₁ −φ ₂ )} / 2 ……………… (12)

As is clear from this equation, d ² (t) is d
Since (t) is +1 or −1 squared, both are 1 (DC voltage), and the information d (t) component disappears. Furthermore, the component of the first term on the right side of E _p2 (t) is also eliminated by the loop filter 18 and the component of −sin (φ ₁ −φ ₂ ) remains. This value becomes smaller as φ ₁ and φ ₂ are closer to each other, and becomes an error signal of approximately − (φ ₁ −φ ₂ ) and is supplied to the voltage controlled oscillator 19. Therefore, the input PSK is set by the PLL (Phase Lock Loop) 27, which is such a loop.
A voltage controlled oscillation (VCO) output following the modulated wave, that is, a reproduced carrier sin (ωt + φ ₂ ) is obtained.

This reproduced carrier sin (ωt + φ ₂ ) is π / 2
It becomes cos (ωt + φ ₂ ) by the phase shift circuit 21, and is supplied to the multiplier 15 via the switch Sw2. Input terminal here
Since it is multiplied by the PSK modulated wave Sp (t) from In3, its output Sd (t) is Sd (t) = d (t) {cos (φ ₁ −φ ₂ ) + cos (2ωt + φ ₁ + φ ₂ )} /2.........(13) The output Sd (t) of the multiplier 15 has an unnecessary carrier component removed by the low-pass filter 22, and the output terminal Out3
An information signal d (t), which is a PSK demodulated output, is obtained at and is also output to the multiplier 17 via the switch Sw3 as described above.

Next, the FSK demodulation operation will be described. At this time, the switches Sw2 and Sw3 are switched to the contact a side. In the FSK modulated wave, the information signal which is the modulated signal is +
When Sm (t) is 1 and Sv (t) is -1 (or 0), the formulas 7 and 8 are respectively expressed. The FSK modulation performed by the modulation circuit 9 in FIG. 2 is a phase-continuous FSK modulation in which a digital signal is supplied to the voltage controlled oscillator 13 for modulation, and is also an FM modulation in a broad sense. Therefore, a conventional FM demodulation circuit can be used for the demodulation.

In the circuit 30 of the third embodiment, the phase locked loop (PLL) 27 is used for demodulation, and the multiplier 17 is supplied with the DC voltage from the DC power source E _2. It will simply operate as an amplifier. The PLL 27 is composed of a multiplier 16 {functions as a phase comparator}, a multiplier 17 (operating as an amplifier), a loop filter 18, and a voltage controlled oscillator 19, and has an input FSK.
The output (oscillation frequency) of the voltage controlled oscillator 19 follows the instantaneous frequency of the modulated wave.

Therefore, the voltage controlled oscillator outputs Sm '(t), Sv'
(t) is expressed by the equations 9 and 10, respectively. Multiplier 1
Since the FSK modulated wave from the input terminal In3 is also supplied to 5 as in the multiplier 16, a phase comparison output equal to the phase comparison output of the multiplier (phase comparator) 16 is obtained. That is, S
The phase comparison output of m (t) and Sm ′ (t) − (φ ₁ −φ ₃ ) and the phase comparison output of Sv (t) and Sv ′ (t) − (φ ₂ −φ ₄ ) are in the low range. Obtained via the filter 22. This phase comparison output becomes an FSK demodulation output obtained as a phase difference corresponding to the instantaneous frequency of the FSK modulated wave, and is output from the output terminal Out3.

As described above, also in the switching type demodulation circuit 30 having such a configuration, FSK demodulation and PSK demodulation can be switched by the two switches Sw2 and Sw3.
The multipliers 15 and 16, the LF 18, the VCO 19 (that is, the phase locked loop 27), the LPF 22 and the like are shared.

Next, a fourth embodiment of the circuit of the present invention will be described.
Description will be given with reference to the block diagram of FIG. Also in this figure, the same components as those of the circuits (10, 20, 30) of the first to third embodiments of FIGS. 3 to 5 are designated by the same reference numerals and detailed description thereof will be omitted. As is apparent from a comparison of FIGS. 4 to 6, the switch Sw4 is inserted in the phase locked loop 28 as in the second embodiment. That is, in the configuration of the circuit 40 of the fourth embodiment, the FSK demodulation and the PSK demodulation are switched between the input stage and the output stage of the multiplier 17,
In the case of SK demodulation, the output of the multiplier (phase comparator) 16 is supplied to the loop filter 18 via the switch Sw4 without passing through the multiplier 17.

However, in the case of the PSK demodulation operation, since the switches Sw2 and Sw4 are connected to the contact b, as is apparent from comparing FIG. 5 and FIG. Becomes On the other hand, in the case of the FSK demodulation operation, it is connected to the contact a, but the difference from the third embodiment circuit 30 is that the multiplier 1 supplied to the loop filter 18 is connected.
The only difference is whether the output of 6 is amplified or not. Therefore, the basic operation is equivalent to that of the third embodiment circuit 30 shown in FIG. Further, such a configuration also brings about an advantage that the DC power source E ₂ is unnecessary as compared with the third embodiment circuit 30.

Finally, the fifth embodiment circuit 50 shown in FIG.
In the configuration, the low-pass filter 24 having a transmission characteristic equal to that of the low-pass filter 22 for transmitting the demodulated signal is used in PSK demodulation, and the information signal component d (t) in the phase comparison output signal of the multiplier 16 is By matching the phase with the demodulation output d (t) of, the d ² (t) component in the output of the multiplier 17 is minimized. As a result, the d ² (t) component in the error signal supplied to the voltage controlled oscillator 19 becomes a negligibly small level, and the jitter component of the reproduced carrier wave output from the voltage controlled oscillator 19 can be considerably reduced.

The other constructions and basic operations of the circuit 50 of the fifth embodiment are the same as those of the circuit 40 of the fourth embodiment shown in FIG.
Since it is the same as, the detailed description will be omitted.

[0048]

In the switching type demodulation circuit of the present invention, both PSK and FSK (including MSK) demodulation can be easily switched by using two changeover switches (or one interlocking switch), and phase synchronization can be achieved. The main circuit configurations such as the loop (PLL), the multiplier, and the low-pass filter are shared, and the DC power supply is not required if the configurations of the second, fourth, and fifth embodiments are performed, so that the circuit components can be saved. A great effect can be obtained. Therefore, PSK and F
SK can be integrated into an integrated circuit, and a general-purpose IC capable of performing both PSK and FSK demodulation with one IC can be realized. Further, if it is configured as in the fifth embodiment, V
It has excellent features such that the jitter component of the reproduced carrier wave during CO output can be made extremely small.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a conventional example of a PSK demodulation circuit.

FIG. 2 is a block configuration diagram of a switching type modulation circuit which can be a transmission side with respect to the circuit of the present invention.

FIG. 3 is a block configuration diagram of a first embodiment of a switching demodulation circuit of the present invention.

FIG. 4 is a block configuration diagram of a second embodiment of a switching demodulation circuit of the present invention.

FIG. 5 is a block configuration diagram of a third embodiment of a switching demodulation circuit of the present invention.

FIG. 6 is a block diagram of the configuration of a switching demodulator circuit according to a fourth embodiment of the present invention.

FIG. 7 is a block configuration diagram of a switching demodulation circuit according to a fifth embodiment of the present invention.

[Explanation of symbols]

10, 20, 30, 40, 50 Switching type demodulation circuit 15-17 Multiplier 18 Loop filter (LF) 19 Voltage controlled oscillator 21 π / 2 Phase shift circuit 22, 24 LPF (Low-pass filter) 23 Amplifier 25-29 Phase locked loop E _1, E ₂ DC power supply Sw1 to Sw4 changeover switch

Claims (4)

(57) [Claims] 1. A modulated signal obtained by subjecting an information signal to modulation such as PSK or FSK (including MSK) is inputted,
A switching demodulation circuit for performing demodulation corresponding to each modulation, which is a phase locked loop for inputting the modulated signal to reproduce a carrier wave, and a phase shift circuit for shifting a phase of the carrier wave from the phase locked loop by a predetermined amount. A first changeover switch for selectively outputting one of the phase locked loop signal and the phase shift circuit signal in accordance with the type of modulation in the modulated signal,
A first multiplier for multiplying the signal selected by the first changeover switch by the modulated signal to obtain an original information signal, and the information signal or the information signal depending on the type of modulation in the modulated signal. A switching type demodulation circuit comprising a second switching switch for supplying any one of the DC bias to a second multiplier included in the phase locked loop so as to perform a plurality of types of demodulation. . 2. A modulated signal obtained by subjecting an information signal to modulation such as PSK or FSK (including MSK) is inputted,
A switching type demodulation circuit for performing demodulation corresponding to each modulation, including first and second multipliers to which the modulated signal is supplied, the second multiplier and loop filter, a voltage controlled oscillator, and a third multiplier.
, A phase-locked loop configured to shift the phase of the output of the voltage-controlled oscillator by a predetermined amount, and the voltage-controlled oscillator or the phase-shift circuit according to the type of modulation in the modulated signal. A first changeover switch for selecting one of the outputs and supplying it to the first multiplier, and transmitting only the original information signal from the output signal of the first multiplier to transmit the third information. A low-pass filter supplied to the multiplier, and either the output of the voltage controlled oscillator or the output of the third multiplier depending on the type of modulation in the modulated signal is supplied to the second multiplier. A switching demodulation circuit, characterized in that the switching demodulation circuit comprises a second selection switch and is configured to perform a plurality of types of demodulation. 3. The third multiplier is arranged to multiply the low pass filter output and the second multiplier output, and
The second changeover switch is arranged to supply a multiplication output of either one of the second and third multipliers to the loop filter depending on a type of modulation in the modulated signal. 2. The switching demodulation circuit described in 2. 4. A second low-pass filter having a transmission characteristic equivalent to that of the low-pass filter, further comprising a connection point between the second multiplier and the second changeover switch, and the third low-pass filter. 4. The switching demodulation circuit according to claim 3, wherein the switching demodulation circuit is arranged between the multiplier and the multiplier.