JP3402198B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device utilizing an SOI structure.

[0002]

2. Description of the Related Art In recent years, with the increase in withstand voltage and frequency of power ICs, elements can be completely separated by an insulating layer and the parasitic capacitance in the elements can be reduced.
A semiconductor device using an OI (Silicon On Insulator) technology has been receiving attention. As one of semiconductor devices of this type, a lateral double diffusion MOSFET (L
DMOSFET: Lateral Double Di
Fused MOSFETs) are known.

FIG. 9 shows an LDMOSF utilizing SOI technology.
A sectional view of ET is shown. The LDMOSFET shown in FIG.
An insulating layer 1 made of a buried oxide film on a semiconductor supporting substrate 10 made of an n-type silicon substrate or a p-type silicon substrate.
1 is formed, and the p-type well region 4 and the n ⁺ -type drain region 2 are formed separately in the n-type semiconductor layer 1 formed of the n-type silicon active layer formed on the insulating layer 11. n ⁺
The p-type source region 3 is formed in the p-type well region 4. Here, the p-type well region 4 is formed to a depth reaching the insulating layer 11. A drain electrode 7 is formed on the n ⁺ -type drain region 2, and a source electrode 8 is formed on the n ^{+ -type} source region 3. An insulated gate 6 is formed via a gate insulating film 5 on a region between the n-type semiconductor layer 1 and the n ^{+ -type} source region 3 on the main surface side of the p-type well region 4.

By the way, the above LDMOSFET is shown in FIG.
Alternatively, it has a plane shape as shown in FIG.
^A p-type well region 4 is formed so as to surround the ^{+ type} drain region 2 all around. That is, in a so-called racetrack structure surrounding at p-type well region 4 over the n ⁺ -type drain region 2 on the entire circumference, and has a n ⁺ -type drain region 2 has a plurality of comb teeth structure. This LDMOS
In the FET, in plan view, n ^{+ type} drain region 2
The tip of the comb tooth portion and the outer periphery of the connecting portion that connects the adjacent comb tooth portions are formed in an arc shape, and the p-type well region 4 is formed between the n ⁺ -type drain region 2 and the p-type well region 4. It is formed so that the distance is substantially constant. That is, in the p-type well region 4, the portion of the n ⁺ -type drain region 2 facing the tip end of the comb tooth portion and the connecting portion is formed in an arc shape. In order to obtain a predetermined withstand voltage in the LDMOSFET having such a planar shape, it is necessary to keep the radius of curvature of each arc-shaped curved portion of the p-type well region 4 at a predetermined value or more. Therefore, the LDMOSFET having such a structure
Then, it is necessary to properly design the radius of curvature of each curved portion of the n ^{+ type} drain region 2 and the p type well region 4. In addition,
The structure of FIG. 6 and the structure of FIG. 7 have the same basic structure but different channel widths and element areas. That is, FIG.
In the above configuration, the channel width is longer and the element area is larger than in the configuration of FIG. Hereinafter, points common to FIGS. 6 and 7 will be described. The drain electrode 7 has a plane shape of n
^The drain electrode 7 has a substantially comb shape similar to that of the ^{+ type} drain region 2, and a part of the center portion (comb bone portion) of the drain electrode 7 constitutes a square drain pad 9. The drain electrode 7 has a larger surface area than the contact layer 13 of n ⁺ -type drain region 2, n ⁺ form drain regions 2 n ⁺ -type drain region 2 and the outer peripheral shape is formed thereon in a shape substantially matching. That is,
As shown in FIG. 8, assuming that the width of the contact layer 13 in the comb tooth portion of the n ^{+ type} drain region 2 is e, the drain electrode 7
Is larger than the width e of the contact layer 13.
6 and 7, the source electrode 8, the insulated gate 6 and the like shown in FIG. 9 are omitted.

The surface structure of the n ⁺ -type drain region 2 is determined by constraints such as the on-resistance of the LDMOSFET, the allowable current, the contact area of the drain electrode 7, the breakdown voltage, the area of the entire device and the area of the drain pad 9. In order to form an element having a predetermined on-resistance or less, it is necessary to keep the channel width equal to or larger than a predetermined length, and in order to form a long channel width within a limited area, the above-mentioned comb structure or so-called It is common to form a stripe structure. In some cases, the drain region and the source region are each formed in a comb shape so that the comb teeth of each region are alternately located (for example, Japanese Patent Laid-Open No. 62-242).
No. 365). In order to achieve a predetermined allowable current or more, it is necessary to maintain the electrode in a predetermined cross-sectional area or more so that electrode migration does not occur. In order to achieve a predetermined withstand voltage or more, the p-type well region 4 has a curved portion. It is necessary to keep the curvature above a predetermined value.

Further, since the output capacitance of the above-mentioned LDMOSFET is related to the projected area of the drain electrode 7 (n ^{+ type} drain region 2) on the insulating layer 11, the area of the drain electrode 7 should be reduced in order to reduce the output capacitance. Need to be small.

For this reason, conventionally, as a device for making the element area as small as possible, the comb tooth portion of the drain electrode 7 has been made appropriate in length and symmetrical, but at the expense of the element area. Up to now, no special consideration has been given to reducing the area of the drain electrode 7 (n ^{+ type} drain region 2).

Next, an example of setting the dimensions of each part of the planar shape (surface shape) shown in FIG. 6 will be described.

Now, in the plane shape shown in FIG. 6, the radius of curvature of the tip end portion and the base end portion of each comb tooth portion of the drain electrode 7 required to maintain the contact area and the breakdown voltage of the drain electrode 7 is f. , G (see FIG. 6B), the length of one side of the drain pad 9 is a, and the number of comb teeth (fingers) of the drain electrode 7 in contact with one side of the drain pad 9 is n, 2 { The minimum n satisfying the condition of n · f + (n−1) · g}> a is obtained, and the lateral length w of the central portion (comb bone portion) of the drain electrode 7 is given by w = 2 {n · f + (N-1) · g}, and the outer peripheral length of the drain electrode 7 required to secure a channel width satisfying a predetermined on-resistance is W
_{If ch} , W _ch = 2 {nπf + (n-1) πg +
By calculating h satisfying the condition of 2nh + (a + 2g)}, the number n of comb teeth (fingers) of the drain electrode 7 and the length h of the straight part of the comb teeth (see FIG. 6B) are determined. Then, the surface layout is determined. In this case, assuming that the area of the drain electrode 7 is S _d , S _d is S _d = w {a + 2 (g + h)} + nπf ² −2 (n−1)
(2gh + πg ^2/2) next, when the area occupied by the drain electrode 7 (the area occupied by the drain electrode 7 in the configuration of FIG. 6 is a value close to the area occupied by the device) and S _all, S _all are, S _all = It becomes w {a + 2 (f + g + h)}.

The LDMOSFET having such a structure is characterized in that various conditions can be satisfied and a structure having a small occupied area can be obtained.

[0011]

However, the demand for higher frequency in power ICs is increasing, and the output capacitance is 1p.
When the performance lower than F is required, there is a problem that the conventional device surface design based on the concept of minimizing the device area cannot obtain sufficient performance in the output capacitance.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device capable of reducing the output capacitance without increasing the element area.

[0013]

In order to achieve the above object, the invention of claim 1 is characterized in that, on the main surface side of a semiconductor layer of a first conductivity type formed on a semiconductor supporting substrate via an insulating layer, A drain region of the first conductivity type and a well region of the second conductivity type are formed apart from each other, a source region of the first conductivity type is formed on the main surface side of the well region, and the source region of the well region is formed. An insulated gate is formed on a region interposed between the drain region and the drain region via a gate insulating film, a drain electrode having an outer peripheral shape substantially matching the drain region is formed on the drain region, and the drain electrode is formed on the source region. A semiconductor in which a source electrode is formed, the drain region and the drain electrode have a substantially comb-shaped planar shape, and the well region has a planar shape that surrounds the drain region over the entire circumference. A drain pad having a quadrangular planar shape formed in the central portion of the drain electrode, the tip of each comb tooth portion of the drain electrode is formed in an arc shape, and adjacent combs of the drain electrode are formed. The connecting portion connecting the tooth portions is formed in an arc shape in which both ends are smoothly continuous with the comb tooth portion, and an adjusting portion capable of adjusting the distance between the adjacent comb tooth portions is formed in the intermediate portion. This is a characteristic feature, and it is possible to eliminate unnecessary areas between the drain pad and the edge of the drain electrode that restrict the size of the central portion of the drain electrode, and to reduce the on-resistance, allowable current, contact area, breakdown voltage, and drain. The area of the drain electrode can be reduced while satisfying the given constraint conditions such as the area of the pad, and the output capacitance can be reduced.

According to a second aspect of the present invention, in the first aspect of the present invention, the adjusting portion includes a linear region formed between adjacent comb tooth portions of the drain electrode, and the linear region is one of the peripheral walls of the drain pad. It is characterized by being a part.

According to a third aspect of the invention, in the invention of the second aspect, the length of one side of the drain pad is a, the number of comb-teeth portions of the drain electrode in contact with one side of the drain pad is n, and the comb-teeth portion of the drain electrode is Where f is the radius of curvature of the tip of the drain electrode and g is the radius of curvature of both ends of the connecting portion of the drain electrode, the total length of the linear regions is an (2f)-(n-1).
(2g) is set.

According to a fourth aspect of the present invention, in the first to third aspects of the present invention, the outer peripheral shape of the comb-teeth portion of the drain electrode is such that the outer peripheral length is adjusted between the tip portion and the base end portion. Since the wavy portion is formed, the length of the comb tooth portion can be shortened without changing the maximum width of the comb tooth portion in order to provide the same channel width, and the area of the drain electrode can be reduced. The size can be reduced, and the output capacity can be further reduced as compared with the first to third aspects.

[0017]

(Embodiment 1) A semiconductor device of this embodiment is an LDM having substantially the same structure as the conventional structure shown in FIG.
The OSFET has a planar shape as shown in FIG. The cross-sectional structure is as shown in FIGS. 2 and 3, and is substantially the same as the conventional structure, so the same reference numerals are given and the description thereof is omitted. Here, FIG. 2 corresponds to the AA ′ cross section of FIG. 1, and FIG. 3 corresponds to the BB ′ cross section of FIG. Further, 14 in FIG. 3 is a passivation film, and the passivation film is omitted in FIGS. 1 and 2.

In the present embodiment, the tip of each comb tooth portion of the drain electrode 7 is formed in an arc shape, and both ends of the connecting portion connecting the adjacent comb tooth portions of the drain electrode 7 are smooth to the comb tooth portion. In the middle part, an adjusting part is formed in a continuous arc shape and is capable of adjusting the distance between the adjacent comb tooth parts.

In this embodiment, in FIG. 1, the curvature radius of the tip end of each comb tooth portion of the drain electrode 7 and both end portions of the connecting portion which are necessary for maintaining the contact area and the breakdown voltage of the drain electrode 7 are shown. f and g (see FIG. 1B), and the length of one side of the drain pad 9 having a square planar shape is a, the drain electrode 7 has 2 {n · f + (n−1) · g} < The number of comb teeth is twice the maximum integer n that satisfies the condition of a 1.

In addition, the adjusting portion composed of a straight line portion which is in contact with the drain pad 9 is present at the connecting portion between the adjacent comb tooth portions of the drain electrode 7, and the length i of each straight line portion is expressed by the following equation. i = {a−n (2f) − (n−1) (2g)} / (n−
1) In the present embodiment, i is a−n (2f) − (n−
Although 1) and (2 g) are provided so as to be equally divided, it is not always necessary to equally divide them.

Next, when the outer peripheral length of the drain electrode 7 required to secure a channel width satisfying a predetermined ON resistance is set to W _ch , the tip end portion of the comb tooth portion of the drain electrode 7 and the base are formed. The length of the straight part between the ends is h (see Fig. 1 (b))
Then, W _ch = 2 {nπf + (n−1) (πg + i)
The length h of the straight line portion is set so as to satisfy the condition of + 2nh + (a + 2g)}.

In this case, assuming that the area of the drain electrode 7 is S _d , S _d is S _d = a {a + 2 (g + h)} + nπf ² -2 (n-1)
{i (g + h) + 2gh + πg 2/2} , and the (in this case, be replaced by the area occupied by the drain electrode 7) area occupied by the elements when the S _all, S
_all becomes S _all = a {a + 2 (f + g + h)}.

In the LDMOSFET constructed as described above, the width w (length of the central portion) of the drain electrode 7 and the length a of one side of the drain pad 9 match as shown in FIG. The area of the drain electrode 7 is reduced as compared with the conventional LDMOSFET shown. In short, in the present embodiment, the area of the drain electrode 7 can be reduced while satisfying the given constraint conditions such as the on-resistance, the allowable current, the contact area, the breakdown voltage, the area of the drain pad 9, and the like. Insulating layer 1 between the insulating layer 1 and the supporting substrate 10.
Since the drain-substrate capacitance (parasitic capacitance) formed via 1 can be reduced and other parasitic capacitances are not changed, the output capacitance can be reduced.

(Embodiment 2) The semiconductor device of the present embodiment is an LDMOSF having substantially the same structure as the conventional structure shown in FIG.
The ET has a planar shape as shown in FIG. The cross-sectional structure is substantially the same as that of the first embodiment and the conventional structure, and thus the description thereof is omitted. In the present embodiment, the tip of each comb tooth portion of the drain electrode 7 is formed in an arc shape, and both ends of the connecting portion that connects adjacent comb tooth portions of the drain electrode 7 are smoothly continuous to the comb tooth portion. The drain pad 9 is formed in an arc shape.
The comb tooth portion in contact with is formed with an adjusting portion in the middle portion that can adjust the distance between the adjacent comb tooth portions.

In the present embodiment, in FIG. 4, the radius of curvature of the tip end of each comb tooth portion of the drain electrode 7 and both end portions of the connecting portion which are necessary to maintain the contact area and the breakdown voltage of the drain electrode 7 are shown. f and g (see FIG. 1B), and the length of one side of the drain pad 9 having a square planar shape is a, the drain electrode 7 has 2 {n · f + (n−1) · g} < Twice as many comb teeth as the maximum integer n satisfying the condition of a 1 are formed so that their base ends are in contact with the outer periphery of the drain pad 9.

Further, there is the above-mentioned adjusting portion consisting of a straight line portion in contact with the drain pad 9 at the connecting portion between the adjacent comb tooth portions of the drain electrode 7, and the length i of each straight line portion is represented by the following equation. i = {a−n (2f) − (n−1) (2g)} / (n−
1) In the present embodiment, i is a−n (2f) − (n−
1) (2g) is divided into equal parts, but it is not always necessary to divide them into equal parts. In addition, in this embodiment, the surface structure corresponding to the long channel width W _ch for satisfying the small ON resistance is formed by providing the comb tooth portion other than the comb tooth portion in contact with the drain pad 9. In addition,
The tips of the comb teeth extending in the same direction are formed so as to be on the same straight line.

In the LDMOSFET having such a structure, the area of the drain electrode 7 is smaller than that of the conventional LDMOSFET shown in FIG. In short, in the present embodiment, the area of the drain electrode 7 can be reduced while satisfying the given constraint conditions such as the on-resistance, the allowable current, the contact area, the breakdown voltage, the area of the drain pad 9, and the like. An insulating layer 11 between the supporting substrate 10 and the supporting substrate 10.
Drain-substrate capacitance (parasitic capacitance) formed via
Can be reduced, and since other parasitic capacitances are not changed, the output capacitance can be reduced.

The LDMOSFET of this embodiment is
Compared to the conventional LDMOSFET shown in FIG.
Experimental results have been obtained that the inter-substrate capacitance is reduced by about 30%.

Further, the LDMOSFET of this embodiment is
As compared with the LDMOSFET of the first embodiment, it also has a feature that it can flexibly cope with an element structure having a long W _ch .

(Embodiment 3) The basic configuration of this embodiment is substantially the same as that of Embodiment 1 or Embodiment 2, and the comb tooth portion of the comb-shaped structure has a plane shape in a wavy shape in the longitudinal direction as shown in FIG. It is characterized in that it is configured.

That is, in the present embodiment, the comb tooth portion of the n ⁺ -type drain region 2 has a wavy wavy shape that adjusts the length of the outer circumference of the comb tooth portion between the front end portion and the base end portion in a plan view. Is formed, the drain electrode 7 is formed in a shape whose outer peripheral shape substantially matches the n ⁺ -type drain region 2, and the comb tooth portion of the drain electrode 7 also has a wavy shape for adjusting the outer peripheral length of the comb tooth portion. Parts are formed.

In the LDMOSFET configured as described above, in order to provide the same channel width W _ch , the conventional LD
Compared with MOSFET, the drain electrode 7 can be formed without changing the maximum width d of the comb-teeth portion of the drain electrode 7 in the lateral direction.
It is possible to shorten the length of the comb tooth portion in the longitudinal direction. Therefore, the drain electrode 7 is different from each of the embodiments.
The area can be reduced and the output capacitance can be reduced.

In each of the above embodiments, the n-channel LDMOSFET has been described, but it goes without saying that the technical idea of the present invention can be applied to the p-channel LDMOSFET.

[0034]

According to the invention of claims 1 to 3, a drain region of the first conductivity type is formed on the main surface side of a semiconductor layer of the first conductivity type formed on a semiconductor supporting substrate via an insulating layer. A well region of the second conductivity type is formed apart from each other, a source region of the first conductivity type is formed on the main surface side of the well region, and is interposed between the source region and the drain region of the well region. An insulated gate is formed on the region through the gate insulating film, and a drain electrode having an outer peripheral shape substantially matching the drain region is formed on the drain region,
A source electrode is formed on the source region, a planar shape of the drain region and the drain electrode is formed in a substantially comb shape, and a planar shape of the well region is formed so as to surround the drain region over the entire circumference. In the semiconductor device described above, a drain pad having a quadrangular planar shape formed in a central portion of the drain electrode is provided, and a tip end portion of each comb tooth portion of the drain electrode is formed in an arc shape. The connecting portion for connecting the adjacent comb tooth portions is formed in an arc shape in which both ends are smoothly continuous with the comb tooth portions, and an adjusting portion capable of adjusting the distance between the adjacent comb tooth portions is formed in the middle portion. Therefore, it is possible to eliminate an unnecessary area between the drain pad and the edge of the drain electrode, which restricts the size of the central portion of the drain electrode. While satisfying the given constraints, such as the area of the head it is possible to reduce the area of the drain electrode, there is an effect that it is possible to reduce the output capacitance.

According to a fourth aspect of the present invention, in the first to third aspects of the invention, the outer peripheral shape of the comb-teeth portion of the drain electrode is such that the outer peripheral length is adjusted between the tip portion and the base end portion. Since the wavy portion is formed, the length of the comb tooth portion can be shortened without changing the maximum width of the comb tooth portion in order to provide the same channel width, and the area of the drain electrode can be reduced. It is possible to reduce the size, and it is possible to further reduce the output capacity as compared with the first to third aspects.

[Brief description of drawings]

1A and 1B show a first embodiment, FIG. 1A is a schematic plan view, and FIG. 1B is an explanatory view of a main part of FIG.

FIG. 2 is a sectional view taken along the line A-A ′ of the above.

FIG. 3 is a B-B ′ sectional view of the above.

FIG. 4 is a schematic plan view showing a second embodiment.

FIG. 5 shows the third embodiment and is a schematic view of a planar shape of a main part.

FIG. 6 shows a conventional example, (a) is a schematic view of a planar shape,
(B) is a principal part explanatory view of (a).

FIG. 7 is a schematic plan view showing another conventional example.

FIG. 8 is an explanatory view of a main part common to each of the above conventional examples.

9 is a cross-sectional view taken along the line A-A ′ of FIG.

[Explanation of symbols]

1 n-type semiconductor layer 2 n ^{+ type} drain region 3 n ^{+ type} source region 4 p type well region 5 gate insulating film 6 insulated gate 7 drain electrode 8 source electrode 9 drain pad

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshifumi Shirai, 1048, Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. (72) Takashi Kishida, 1048, Kadoma, Kadoma, Osaka Prefecture, Matsushita Electric Works, Ltd. (72) Inventor ▲ Takano Jinji 1048 Kadoma, Kadoma City, Osaka Prefecture, Matsushita Electric Works Co., Ltd. (72) Inventor, Takeshi Yoshida 1048 Kadoma, Kadoma City, Osaka Prefecture, Matsushita Electric Works Co., Ltd. (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/78 H01L 29/786

Claims (4)

(57) [Claims] 1. A drain region of the first conductivity type and a well region of the second conductivity type are separated from each other on the main surface side of a semiconductor layer of the first conductivity type formed on a semiconductor supporting substrate with an insulating layer interposed therebetween. A source region of the first conductivity type is formed on the main surface side of the well region, and is insulated through a gate insulating film on a region of the well region that is interposed between the source region and the drain region. A gate is formed, a drain electrode is formed on the drain region, the drain electrode having an outer peripheral shape substantially conforming to the drain region, a source electrode is formed on the source region, and the drain region and the drain electrode have a substantially planar shape. A semiconductor device, which is formed in a comb shape and in which the planar shape of the well region surrounds the drain region over the entire circumference, wherein the planar shape formed in the central portion of the drain electrode is Equipped with a rectangular drain pad,
The tip of each comb tooth portion of the drain electrode is formed in an arc shape, and the connecting portion connecting between the adjacent comb tooth portions of the drain electrode is formed in an arc shape in which both ends are smoothly continuous to the comb tooth portion, A semiconductor device, wherein an adjusting portion capable of adjusting a distance between adjacent comb tooth portions is formed in an intermediate portion. 2. The adjusting part is composed of a linear region formed between adjacent comb teeth of the drain electrode, and the linear region is a part of a peripheral wall of the drain pad. Semiconductor device. 3. The length of one side of the drain pad is a, the number of comb teeth of the drain electrode in contact with one side of the drain pad is n, the radius of curvature of the tip of the comb teeth of the drain electrode is f, and the drain electrode When the radius of curvature of both ends of the connecting portion is g, the total length of the linear region is an−n (2f) −.
The semiconductor device according to claim 2, wherein (n-1) (2g) is set. 4. The outer peripheral shape of the comb-teeth portion of the drain electrode is formed by forming a corrugated corrugated portion for adjusting the length of the outer periphery between the tip end portion and the base end portion. The semiconductor device according to any one of claims 1 to 3.