JP3407690B2 - EL display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an EL display device for displaying a display by driving an electroluminescence element (hereinafter referred to as an EL element) to emit light.

[0002]

2. Description of the Related Art An EL element has a structure in which an insulating layer and a light emitting layer are sandwiched between a pair of electrodes and emits light when a positive and negative voltage pulse is applied between the pair of electrodes. In this EL element, after applying a drive voltage to cause light emission, the EL element
It is known that an element has an internal polarization charge. This will be described according to the QV characteristic of the EL element shown in FIG.

When no voltage is applied to the EL element and there is no internal polarization charge, the EL element is at the position shown in FIG. EL
When the element is made to emit light, a pulse voltage of (Vth + Vm) obtained by adding the modulation voltage Vm to the light emission start voltage Vth is applied to the EL element during the period of applying the positive voltage, and a negative voltage is applied during the period of applying the negative voltage. -(Vth + Vm) for EL element
Pulse voltage is applied. In this case, when a positive pulse voltage is applied, it changes from → to →. Therefore, even if the applied voltage becomes 0 V, the electric charge remains as shown in FIG. 12, and this becomes the internal polarization charge. After that, when a negative pulse voltage is applied, it changes from →→→.

When a positive pulse voltage and a negative pulse voltage are applied alternately, the voltage changes on the parallelogram. In this case, the EL element is →→, →→
It emits light when. In addition, when the EL element that is emitting light is set to the non-light emitting state, during the period in which a positive voltage is applied,
During the period in which the pulse voltage of Vth is applied and the negative voltage is applied, the pulse voltage of -Vth is applied. In this case, by applying a voltage of -Vth when the position is,
The voltage changes from → to →, and when a voltage of Vth is applied at the position of, the voltage changes from → to → and returns to in any case, so that no internal polarization charge remains.

[0005]

However, when the power supply from the power source to the EL element is cut off while the EL element is emitting light, internal polarization charge remains in the EL element. Therefore, when the power is turned on next time, even if a voltage for making the EL element in the non-light emitting state is applied, light is emitted due to the internal polarization charge.

For example, when a voltage of -Vth is applied at the position where the power supply from the power source to the EL element is cut off and the EL element is in the non-light emitting state when the power source is next turned on, the voltage changes from →→→
And the EL element emits light at →. Similarly, it is in the position when the power is cut off, and when the next power is turned on, E
When a voltage of Vth that makes the L element non-luminous is applied,
Changes from → to →, and the EL element emits light at →.

Therefore, when the dot matrix display or the segment display is performed by the EL element, when the power is turned on, the display just before the power is cut off appears for a moment. To be precise, it is a mixed display of the display immediately before power-off and the first display after power-on. For this reason, the display feels strange when the power is turned on. The above is the Japanese Patent Publication No. 5-27837.
The same applies when the EL element is driven by an EL driving device as disclosed in Japanese Patent Publication No.

On the other hand, the applicant of the present invention previously filed Japanese Patent Application No.
The EL display device was proposed in the specification of No. 260636.
The EL display device during the after power interruption by ignition key switch of the vehicle a certain period, by applying a voltage to the EL element reduces the internal polarization charge of the EL element, the power supply when the power is turned on again by the subsequent ignition key switch The display just before the cutoff is not displayed.

However, in such an EL display device, the voltage is applied to the EL element during the above-described fixed period by the power transistor connected in series to the power source. This means that the power transistor is connected in the high current line of the power supply. For this reason, since the power transistor will interrupt a large current due to its switching action, the power transistor inevitably needs to have a large physique, resulting in an increase in the amount of heat generated. A problem occurs.

Therefore, in order to deal with the above, the present invention devises a circuit configuration for applying a voltage to the EL element after the power is cut off, and does not rely on a large-sized transistor to display a display. It is an object of the present invention to provide an EL display device that eliminates the discomfort of display at the start.

[0011]

In order to solve the above problems, an EL display device according to a first aspect of the present invention includes an EL element (1) having a plurality of EL element portions (111, 112, ...), Driving means (2, 3, 4, 6) for selectively driving the plurality of EL element portions to emit light based on a light emission driving voltage.
When a power supply voltage supplying circuit that supplies the original light emitting drive voltage to the drive means (Ba) or al of the power supply (5), wherein
And a power supply control means for causing supplies the light emission drive voltage to the drive means from the voltage supply circuit to voltage supply circuit power supply control to (7,8,9), said power supply control means, power supply from said power supply during a predetermined time period from the time that it is time to shut off, the voltage of the light emission start voltage near to at least light emission drive all the EL element portion has been had to be applied
In order to drive the light emission from the voltage supply circuit to the driving means,
It is designed to supply a working voltage,
The circuit is a transformer (54) and is attached to this transformer.
Voltage is applied to the transistor (53) and the power supply terminal.
Then, the regulation that controls the switching of the transistor
And a switch (51) for switching the transistor.
Operation causes the transformer to be powered by the power source.
And to generate the voltage for driving the light emission by the transformation
The power supply control means is configured to
Circuit (7,
9) is provided to perform the power supply control.
It

[0012] As of this, when you cut off the power supply from the power source
Drive for at least a certain period of time from the beginning of the period
A voltage near the light emission start voltage is applied to all the EL elements
Because There is applied, can be eliminated internal polarization charge of all the EL element <br/> to reduce the discomfort of the display such as the display immediately before the power-off at the next display start appears.

[0013] In this case, as described above, the sheet electric control means performs the power supply control to the voltage supply circuit regardless of the power line. Therefore, it is not necessary to directly connect a large-sized transistor to the power supply line, and there is no extra heat generation when the large current flowing through the power supply line is controlled by the transistor.

The EL display device according to a second aspect of the present invention includes an EL element (1) having a plurality of EL element sections (111, 112, ...) And a plurality of the EL element sections for driving light emission. and drive means for selectively emitting drive based on the voltage (2,3,4,6), the power supply (Ba) or al of the voltage supply circuit for supplying the original light emitting driving voltage to the driving means of the feed (5 ) and, and a power supply control unit that causes the supply (7, 8, 9) the light emission drive voltage to the drive unit the voltage supply circuit power supply control to the said voltage supply circuit, the sheet
The power control means applies a voltage in the vicinity of the light emission start voltage to all the EL element parts that have been driven to emit light at least once after the time when the power supply from the power source is cut off.
In order to ensure that
Means for supplying the light emission drive voltage.
The voltage supply circuit includes a transformer (54) and
Transistor (53) attached to the lance and power supply terminal
Switches the transistor when a voltage is applied to it
And a regulator (51) for controlling the transition.
The switching operation of the
The voltage for driving the light emission due to the transformation effect under the power supply from the source
It is configured to generate the power supply control unit
Applies or shuts off voltage to the power supply terminal of the regulator.
A circuit (7, 9) for cutting off is provided to control the power supply.
It is characterized by.

[0015] by Re This can also achieve the same effect as the invention described in claim 1. The above voltage mark
The circuit for adding and shutting off is as in the invention according to claim 3.
To the power supply and the power supply terminal of the regulator
With a transistor (75) provided between
can do. In addition, the application and interruption of the above voltage
The circuit to be executed is the same as the invention according to claim 4,
Vehicle that applies or shuts off voltage to the power supply terminal of the emulator
Circuit means (9).

[0016]

[0017]

[0018]

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 shows an embodiment of an EL display device according to the present invention. 2 shows a schematic sectional structure of the EL element 1 of FIG. Note that this EL display device is suitable for use in, for example, a meter display for automobiles.

In FIG. 2, the EL element 1 is an EL display panel and is composed of a transparent electrode 12, an insulating layer 13, a light emitting layer 14, an insulating layer 15 and a back electrode 16 which are laminated on a glass substrate 11. ing. Then, the EL element 1 emits light when a positive and negative pulse voltage is applied between the transparent electrode 12 and the back electrode 16. In the EL element 1, as can be seen from FIG. 2, light is extracted from the glass substrate 11. The rear electrode 16 may be a transparent electrode so that light can be extracted from both upper and lower directions in FIG.

The EL element 1 is different from the structure shown in FIG. 2 in that a plurality of transparent electrodes 12 and back electrodes 16 are arranged in a matrix to form scanning electrodes and data electrodes, so that a plurality of EL element portions described later are arranged in a matrix. It is configured to be placed and displayed. Specifically, an odd number of scan electrodes 20 in the row direction
, 202, ... Even-numbered scan electrodes 301, 302, ... Are formed, and data electrodes 401, 402, 40 are arranged in the column direction.
.. are formed.

Scan electrodes 201, 301, 202, 30
, And the data electrodes 401, 402, 403 ,.
1, 112, ... 121 ,. Note that these EL element portions have a capacitive property, and thus are represented by a symbol of a capacitor in FIG. In order to drive the display of the EL element 1, both scanning electrode driving circuits 2 and 3, a data electrode driving circuit 4, a power supply circuit 5 and a scanning voltage generating circuit 6 are provided.

The scan electrode drive circuit 2 is a push-pull type drive circuit, and the scan electrode drive circuit 2 is connected to the logic circuit 20 and odd scan electrodes 201, 202, ... P-channel FETs 21a, 22a. , And N-channel FETs 21b, 22b, ... And odd-numbered scan electrodes 201, 20 according to the output from the logic circuit 20.
A scanning voltage is applied to 2, ...

Further, FETs 21a, 21b, 22a, 2
The parasitic diodes 21c, 21
d, 22c, 22d, ... Are formed, and these parasitic diodes set the scan electrodes to a desired reference voltage. The scan electrode drive circuit 3 has substantially the same configuration as the scan electrode drive circuit 2, and the scan electrode drive circuit 3 includes a logic circuit 30, P channel FETs 31a, 32a ,.
And N-channel FETs 31b, 32b, ... And an even number of scan electrodes 301 according to the output from the logic circuit 30,
A scanning voltage is applied to 302, ....

The data electrode drive circuit 4 is also substantially the same as the logic circuit 40 and the P channel FETs 41a and 4a.
, And N-channel FETs 41b, 42b, ..., And supplies a data voltage to the data electrodes 401, 402, 403 ,. The scan electrode drive circuits 2 and 3 and the data electrode drive circuit 4 include a scan voltage generation circuit 6 and a power supply circuit 5.
The scanning voltage and the data voltage are supplied from.

The scanning voltage generating circuit 6 outputs the scanning voltage as
The voltage of (Vth + Vm) or the voltage of 0V (ground voltage) is supplied to the common line L1 on the P-channel FET source side, and Vm
Voltage or -Vth voltage is supplied to the N-channel FET source side common line L2. As will be described later, the power supply circuit 5 supplies a voltage of 45V to the P-channel FET source side common line as a data voltage, and the N-channel FET.
Supply the ground voltage to the source side common line. Further, the power supply circuit 5 applies the floating voltages F5V and F250V as power supply voltages to the scan electrode drive circuits 2 and 3, as described later.

In the above structure, in order to make the EL element 1 emit light, it is necessary to apply a positive and negative pulse voltage between the scan electrode and the data electrode. Therefore, the pulse voltage for reversing the polarity between the positive and negative in each field. Are created for each scanning line to drive them. The operation in the positive and negative fields will be described below with reference to the timing chart shown in FIG. In the timing chart shown in FIG. 3, in the FETs 21a, 21b, 31a, 31b,
The ON state is shown as a high level and the OFF state is shown as a low level. In addition, the voltage waveform is shown as having no waveform rounding. (Operation in Positive Field) In the positive field, the scanning voltage generating circuit 6 supplies a voltage of (Vth + Vm) to the P-channel FET source side common line L1 and a Vm voltage to the N-channel FET source side common line L2. Supplied.

At this time, the scanning electrodes 201, 301, 20
The reference voltages of 2, 302, ...
The voltage is Vm due to the operation of the parasitic diodes 21d, 22d, ... Of the FET. Further, the FETs 41a, 42a, 43a, ... Side of the data electrode drive circuit 4 are turned on,
The voltage of the data electrode is set to Vm. In this state, the voltage applied to all the EL element portions becomes 0 V, and therefore the EL elements do not emit light.

After that, the light emitting operation in the positive field is started. First, the P-channel FET 21a of the scan electrode driving circuit 2 connected to the scan electrode 201 of the first row is turned on to set the voltage of the scan electrode 201 to (Vth + Vm). In addition, all the output stage FETs of the scan electrode driving circuits 2 and 3 connected to the other scan electrodes are turned off to put those scan electrodes in a floating state.

Further, the data electrodes 401, 402, 40
P channel FE of the data electrode driving circuit 4 connected to the data electrode of the EL element portion to be made to emit light out of 3, ...
T is turned off, the N-channel FET is turned on, the P-channel FET of the data electrode drive circuit 4 connected to the data electrode of the EL element portion which is not desired to emit light is turned on, and the N-channel FET is turned off.

As a result, the voltage of the data electrode of the EL element portion desired to emit light becomes the ground voltage, and a voltage (Vth + Vm) equal to or higher than the threshold voltage is applied to the EL element portion, and the EL element portion emits light. In addition, the voltage of the data electrode of the EL element portion which does not want to emit light remains Vm,
Since the voltage of Vth is applied to the EL element section, the EL element section does not emit light.

In the timing chart of FIG. 3, the P-channel FET 41a and the N-channel FET 41b of the data electrode drive circuit 4 are turned off and the EL element section 111 is turned on.
Voltage of (Vth + Vm) is applied to
1 shows a state in which 1 is emitted. After that, P of the scan electrode drive circuit 2 connected to the scan electrode 201 of the first row
Turn off the channel FET 21a and turn on the N channel FE.
By turning on T21b, E on the scan electrode 201
The electric charge accumulated in the L element part is discharged.

Next, the P-channel FET 31a of the scan electrode drive circuit 3 connected to the scan electrode 301 of the second row
Is turned on to set the voltage of the scan electrode 301 to (Vth + Vm). In addition, all the output stage FETs of the scan electrode driving circuits 2 and 3 connected to the other scan electrodes are turned off to put those scan electrodes in a floating state. In addition, by setting the voltage levels of the data electrodes 401, 402, 403, ... To a voltage level corresponding to the EL element portion that does not want to emit light and the EL element portion that does not want to emit light, the second row is performed in the same manner as described above. Then, the EL element section is driven to emit light.

In the timing chart of FIG. 3, the P-channel FET 41a of the data electrode drive circuit 4 is turned on, the N-channel FET 41b is turned off, the voltage of the data electrode 401 is set to Vm, and the voltage of Vth is applied to the EL element section 121. The non-light emitting state in which the EL element portion 121 is not made to emit light is shown. After this, the P-channel FET 3 of the scan electrode driving circuit 3 connected to the scan electrode 301 of the second row
By turning off 1a and turning on N-channel FET 31b, the electric charge accumulated in the EL element portion on scan electrode 301 is discharged.

Thereafter, in the same manner, line-sequential scanning is performed by repeating the above operation until the final scanning line. (Operation in Negative Field) In the negative field, the scanning voltage generating circuit 6 supplies the ground voltage to the P-channel FET source side common line L1 and the -Vth voltage to the N-channel FET source side common line L2. It

At this time, the scanning electrodes 201, 301, 20
The reference voltages of 2, 302, ...
The ground voltage is generated by the operation of the parasitic diodes 21c, 22c, ... Of the FET. Further, the FETs 41b, 42b, 43b, ... Side of the data electrode drive circuit 4 is turned on to set the voltage of the data electrode to the ground voltage. In this state, all EL
The EL element does not emit light because the voltage applied to the element section becomes 0V.

Thereafter, line-sequential scanning is performed in the negative field as well as in the positive field. In this case, a voltage of -Vth is applied to the scan electrodes of the row for display selection. On the data electrode side, contrary to the positive field, the voltage of the data electrode desired to emit light is set to Vm, and the data electrode not desired to emit light is kept at the ground voltage. Therefore, with respect to the scan electrode to which the voltage of -Vth is applied, the voltage V is applied to the data electrode.
When m is applied,-(Vth
Since a voltage of + Vm) is applied, the EL element section emits light. If the voltage of the data electrode is the ground voltage, E
Since the voltage of −Vth is applied to the L element portion, the EL element portion does not emit light.

By driving the positive and negative fields as described above, one cycle of display operation is completed, and this operation is repeated. Next, a specific configuration of the scan electrode drive circuits 2 and 3 described above will be described with reference to FIG. In the present embodiment, as the scan electrode drive circuits 2 and 3, the μPD 16302 is used.
A scan driver IC commercially available as a mold is used. Since the scan electrode drive circuits 2 and 3 have the same configuration, the scan electrode drive circuit 2 will be described as an example.

The scan electrode drive circuit 2 has a shift register 211. This shift register 211 is
When the R / L bar (the bar represents a negative logic signal as shown in the figure, the same applies hereinafter) is at a high level, the row selection pulse signal (the cycle is the vertical synchronization signal) input to the data input terminal A. (Corresponding signal) is sequentially shifted by the CLK signal and sequentially output from the S ₁ terminal to the S ₄₀ terminal.

Although FIG. 4 shows one shift register that outputs 40 outputs, if the output terminal B of this shift register is connected to the data input terminal A of the shift register in the subsequent stage, A desired number of outputs can be obtained by using a plurality of shift registers. Further, in the present embodiment, the blanking (BLK) signal and the OE bar signal as the output enable signal are always at the low level. Further, the PC bar signal is input as a signal for selecting the P channel FET and the N channel FET.

In the structure shown in FIG. 4, when the row selection pulse signal is input to the shift register 211, the row selection pulse signal is sequentially shifted and output. FIG. 5 shows a timing chart in the positive field. While the row selection pulse signal is being output, the period during which the P-channel FET and the N-channel FET are turned on is switched according to the switching between the high level (H level) and the low level (L level) of the PC bar signal, and The corresponding voltage is output terminal O
Is output from.

In FIG. 5, Z indicates a high impedance period, P indicates a period during which the P-channel FET is turned on to perform charging, and N indicates an N-channel FET turned on to perform discharging. Indicates the period. In the negative field, the H level and L level of the PC bar signal are opposite to those in the positive field. In this way, the P-channel FETs 21a, 31a, 22a, 32a, ...
Channel FETs 21b, 31b, 22b, 32b, ...
Is turned on and off according to the positive and negative fields as shown in the timing chart of FIG.
A scanning voltage is sequentially applied to 1, 202, 302, ....

Next, the structure of the logic circuit 40 in the data electrode drive circuit 4 will be described with reference to FIG. In this embodiment, as the data electrode drive circuit 4, a TD6 manufactured by Toshiba is used.
Data driver IC marketed as 2C948 type
Is used. The data electrode drive circuit 4 includes a shift register circuit 411, a latch circuit 412, a counter 4
13, a comparator 414, an exclusive OR circuit 415,
It is composed of an output circuit 416. This output circuit 41
6 is the P-channel FETs 41a, 42a shown in FIG.
, And N-channel FETs 41b, 42b ,.

In FIG. 6, the shift register circuit 411 is shown.
A 4-bit column data signal (gradation data for gradation display) is input to A PORT IN and B PORT IN. The input column data signal is transferred to each shift register shown in the figure in synchronization with the rising edge of the dot clock signal CK1. After all the column data signals have been transferred to the shift register circuit 411, when the STB (strobe) bar signal forming the horizontal synchronizing signal becomes low level (hereinafter, referred to as L level), the output of the shift register circuit 411 at that time is latched. Latched in circuit 412,
The data is held while the STB bar signal is at the L level.

Next, when the CL (clear) bar signal changes from L level to high level (hereinafter referred to as H level), the counter 41 for determining the pulse width of the voltage applied to the light emitting layer.
3 and the comparator 414 become operable. At this time,
The column data signal is 0V from the comparator 414.
An H level signal is output except for (data not displayed).

The counter 413 counts up with the clock signal CK2, and the comparator 414 compares the count value of the counter 413 with the outputs Q ₁ , ... Q ₄₀ latched by the latch circuit 412, and when they match each other. Then, the output is changed from H level to L level. The output of the comparator 414 is input to the exclusive OR circuit 415. In the negative field, the P / C bar signal is at L level, the output of the comparator 414 is directly output to the output circuit 416, and the voltage Vm is output to the data electrode. In the positive field, the P / C bar signal is at the H level, a signal obtained by inverting the output of the comparator 414 is output to the output circuit 416, and the ground voltage is output to the data electrode.

Therefore, a voltage having a pulse width corresponding to the modulation data is applied to each data electrode, and gradation display is performed. Although FIG. 6 shows one data driver IC that outputs 40 outputs, A PORT OUT and B PORT OUT of this driver IC are connected to A PORT IN and B PORT IN of the subsequent driver IC. Thus, a desired number of outputs may be obtained by a plurality of data driver ICs.

Next, the configuration of the power supply circuit 5 described above will be described in detail with reference to FIGS. 7 and 8 in relation to the configurations of the switch circuit 7 and the control circuit 8. Power supply circuit 5
Is connected to the ACC terminal of the ignition key switch IG of the vehicle via the switch circuit 7 and the control circuit 8. Where ignition key switch IG
Is the battery voltage (+ B voltage) from the positive side terminal + B of the battery Ba when the movable contact is turned on to the ACC terminal.
Is applied to the power supply circuit 5 via the control circuit 8 and the switch circuit 7.

The power supply circuit 5 includes a switching regulator 51, both resistors 52a and 52b, a transistor 53, a transformer 54, backflow blocking diodes 55a to 55c, capacitors 56a to 56c, and resistors 57a and 57b. The switching regulator 51 receives the battery voltage + B from the battery Ba when the transistor 75 of the switch circuit 7 described later is turned on, and outputs the regulator voltage from the terminal E1 under PWM control.

The transistor 53 receives the regulator voltage through the resistors 52a and 52b under the PWM control of the switching regulator 51 to turn on, and turns off when the generation of the regulator voltage is stopped. This means that the transistor 53 performs a switching operation by outputting the regulator voltage and stopping it. The transformer 54 has its primary winding 54a connected to the transistor 5
Under the switching operation of No. 3, the battery voltage + B is received from the battery Ba and excited to generate a low voltage. In addition, the transformer 54 includes secondary windings 54b, 54c, 5
At 4d, the low voltage of the temporary winding 54 is boosted to generate each boosted voltage.

In the present embodiment, the transformer 54 is commercially available, and the transistor 53 is built in the transformer 54. Here, the transistor 53 is large in size due to the fact that it interrupts a large current in the primary winding 54a of the transformer 54, and thus generates a large amount of heat, but the primary winding 54a and the secondary windings 54b, 54c, 54d naturally generate heat. To do.
Therefore, even if a large transistor is built in the transformer 54, there is no particular problem in relation to heat.

The capacitor 56a receives the boosted voltage from the secondary winding 54b of the transformer 54 through the diode 55a and smoothes it to generate a voltage of 45V. Capacitor 5
6b receives the boosted voltage from the secondary winding 54c of the transformer 54 through a diode 55b and smoothes it to generate a floating voltage F5V. Also, the capacitor 56c
Receives a boosted voltage from the secondary winding 54d of the transformer 54 through a diode 55c and smoothes it to generate a floating voltage F210V.

The switch circuit 7 includes both resistors 71 and 72, a transistor 73, a resistor 74 and a transistor 75. In the switch circuit 7, the transistor 73 is turned on by receiving a high-level PWON signal generated from the control circuit 8 via the resistors 71 and 72 as described later. The transistor 73 is turned off when the PWON signal drops to low level.

The transistor 75 is turned on by turning on the transistor 73 and applies the battery voltage + B of the battery Ba to the switching regulator 51 of the power supply circuit 5. In addition, the transistor 75 is the transistor 73
The battery voltage of the battery Ba + B
Is shut off from the switching regulator 51. The control circuit 8 has a circuit configuration for outputting the PWON signal and the column data signal. Specifically, as shown in FIG. 8, the control circuit 8 includes a counter 81, a flip-flop circuit 82, both resistors 83 and 84, and a transistor 8.
5, a resistor 86, an inverter 87 and an AND gate 88.

The transistor 85 is connected to the ACC terminal of the movable contact of the ignition key switch IG,
From the battery Ba to the battery voltage + B, both resistors 83, 84
Is turned on by being applied via. Also, the transistor 85
Is the AC of the movable contact of the ignition key switch IG.
Battery voltage of battery Ba + due to disconnection from C terminal
It is cut off from B and turned off.

The inverter 87 inverts the collector voltage (5 V or 0 V) of the transistor 85 to obtain the AND gate 8.
Output to 8. The AND gate 88 outputs the column data signal to the data electrode drive circuit 4 only when the output of the inverter 87 is high level. The counter 81 counts the row selection pulse signal, which is cleared by the collector voltage (0V) from the transistor 85 and is input to the data input terminal A of the scan driver IC of the shift register 211, twice from the output terminal Q2. Generate the output signal of.

The flip-flop circuit 82 is set by the high level inversion signal from the inverter 87, outputs the PWON signal from the output terminal Q at the high level, and outputs the high level from the output terminal Q2 of the counter 81. It is reset by the signal and makes the PWON signal low level. In other words, the PWON signal becomes high level when the movable contact of the ignition key switch IG is turned on to the ACC terminal, and the ignition key switch IG
Is turned off (after the closing of the movable contact to the ACC terminal is cut off), it is kept at the high level while two row selection pulse signals are generated, and then becomes the low level. This means that P
The WON signal means that after the ignition key switch IG is turned off, the EL element 1 is maintained at the high level for a period in which the EL element 1 can be entirely erased for one display screen or more.

Further, until the ignition key switch IG is turned off, when the PWON signal is at a high level, the EL element 1 displays an image according to a normal operation. A scan voltage is output from the scan drive circuits 2 and 3 to continue line-sequential scanning, but the column data signal is 0V.
When (the output of the AND gate 88 becomes low level), the screen is erased according to the line sequential scanning. That is, all EL element parts are in a non-light emitting state.

In this case, since the cycle of the row selection pulse signal corresponds to the vertical synchronizing signal, even if the ignition key switch IG is turned off during the screen scanning, the screen can be erased for one screen scanning period or more. it can. In the present embodiment configured as described above, the operation of the EL display device after turning off the ignition key switch IG will be described based on FIG.

When the ignition key switch IG is turned off, when the screen is erased in the negative field as shown in FIG. 9, for example, a voltage of -Vth is applied to the scan electrodes and 0V is applied to the data electrodes. When the screen is erased in the positive field, a voltage of (Vth + Vm) is applied to the scan electrodes and a voltage of Vm is applied to the data electrodes.

Further, as described above, even after the ignition key switch IG is turned off, the PWO from the control circuit 8
The N signal is maintained at the high level for a period longer than one display screen scanning period of the EL element 1. Therefore, after turning off the ignition key switch IG, the screen is erased for one screen scanning period or more. As a result, the internal polarization charge of the EL element 1 is prevented from remaining, and the ignition key switch IG
It is possible to eliminate the problem that the image immediately before the ignition key switch IG is turned off is displayed for a moment when the movable contact is re-applied to the ACC terminal.

Further, as described above, the large current flowing through the large current line of the battery Ba is supplied to the transformer 54 of the power supply circuit 5.
Therefore, it is not necessary to separately connect a large power transistor for interrupting a large current in series to the large current line of the battery Ba, since the transistor 53 incorporated therein is used for the disconnection. Therefore, heat generation that occurs when using this large power transistor can be prevented in advance.

The transistor 53 is a transformer 54.
The large current flowing from the battery Ba to the primary winding 54a is interrupted and the transistor 53 is built in the transformer 54 as described above. Also, due to the current flowing through both windings of the transformer 54, both windings naturally generate heat. Therefore, in the transformer 54, the transistor 53
Even if the heat is generated, there is no particular problem. (Second Embodiment) FIGS. 10 and 11 show a second embodiment of the present invention.

The second embodiment shows an example in which the switching regulator 51 described in the first embodiment can be driven at 5V. Along with this, in order to make effective use of the meter circuit 9 by utilizing the fact that the existing meter circuit 9 of the vehicle generates an output of 5V, the meter circuit 9 is as shown in FIG. , Connected to the power supply circuit 5.

The meter circuit 9 includes a CPU 91, a three-terminal regulator 92, both resistors 93 and 94, and both transistors 95 and 96. When the movable contact of the ignition key switch IG is turned on to the ACC terminal, the CPU 91 is supplied with power from the battery Ba through the ACC terminal, generates a high level signal, and applies it to the transistor 95 via both resistors 93 and 94. As a result, the transistor 95 is turned on.

Further, the CPU 91 maintains the output of the high level signal for a certain period of time after the ignition key switch IG is turned off until it enters the sleep mode, and thereafter changes the high level signal to the low level signal. This is
It means that the transistor 95 maintains the ON state during the generation of the high level signal from the CPU 91, and turns off when the low level signal is generated.

The transistor 96 is turned on by turning on the transistor 95 and outputs a voltage of 5 V to the switching regulator 51 of the power supply circuit 5 based on the regulator voltage from the three-terminal regulator 92. As a result, the power supply circuit 5 has the switch circuit 7 described in the first embodiment.
Based on the output voltage of the meter circuit 9 in place of the voltage of the battery Ba via the
5V and F210V are output to the data electrode drive circuit 4 and the scan electrode drive circuits 2 and 3 as in the first embodiment.

However, in the second embodiment, the output voltage 5V of the meter circuit 9 is the battery voltage + B from the battery Ba through the PWON signal of the control circuit 8 and the switch circuit 7 described in the first embodiment. Play both roles as As described in the first embodiment, the circuit in which the control circuit 8 outputs the column data signal based on the battery voltage + B from the ACC terminal of the ignition key switch IG, that is, both resistors 83 and 84, the transistor 8 is used.
The circuit composed of 5, the resistor 86, the inverter 87, and the AND gate 88 is similarly used in the second embodiment. In the second embodiment configured as described above,
After the ignition key switch IG is turned off (see symbol a in FIG. 11), the CPU 91 enters the sleep mode for a certain time (see symbol T in FIG. 11) of the EL element 1.
If it is longer than the screen scanning period, after the ignition key switch IG is turned off, the screen display of the EL element 1 is completely erased before the CPU 91 shifts to the sleep mode.
It is possible to stop the supply of the voltage from the power supply circuit 5 to the EL element 1 at the same time as the sleep.

As a result, it is possible to effectively utilize the existing meter circuit 9 of the automobile and to achieve the same effects as those of the first embodiment. In this case, the switch circuit 7 is also unnecessary. In implementing the present invention, the present invention is not limited to an EL display device that performs matrix display, and the present invention is similarly applied to an EL display device that performs segment display. it can.

In implementing the present invention, the EL element 1
When erasing the screen display of, it is not necessary to apply a light emission start voltage to all EL element parts,
The light emission starting voltage may be applied only to the element. Further, in any of the above-described embodiments, E
In the case where the screen of the L element is erased, the voltage applied to the EL element is set to the light emission start voltage Vth. However, if it is not the light emission start voltage Vth itself, but a voltage in the vicinity thereof,
It is possible to sufficiently reduce the residual internal polarization charge of the EL element.

Further, in carrying out the present invention, not only the EL display device for automobiles but also the EL display device for general home appliances can be applied with the same effect as the first embodiment. Can be achieved. The power supply voltage may be supplied to the control circuit 8 via an appropriate power switch instead of the ignition key switch IG. Further, in implementing the present invention, when the vehicle is an electric vehicle, the battery voltage + B of the battery Ba may be applied to the control circuit 8 via a key switch instead of the ignition key switch IG.

[Brief description of drawings]

FIG. 1 is a schematic overall configuration diagram showing a first embodiment of an automotive EL display device according to the present invention.

FIG. 2 is a schematic sectional view of the EL device of FIG.

FIG. 3 is a diagram showing a drive timing chart of what is shown in FIG.

FIG. 4 is a specific configuration diagram of a scan electrode driving circuit.

5 is a timing chart showing an operation of the scan electrode driving circuit of FIG. 4 in a positive field.

FIG. 6 is a specific configuration diagram of a data electrode drive circuit.

FIG. 7 is a diagram showing a configuration of a power supply circuit in relation to a control circuit, a switch circuit, a scan electrode drive circuit, and a data electrode drive circuit.

8 is a diagram showing a specific circuit configuration of the control circuit of FIG.

9 is a timing chart showing a screen erasing operation in the EL display device of FIG.

FIG. 10 is a circuit configuration diagram showing a second embodiment of the present invention.

FIG. 11 is an output (PWO of the circuit for the meter in FIG.
9 is a timing chart showing the relationship between (N signal) and normal screen display and screen display deletion of EL elements.

FIG. 12 is a diagram showing a QV characteristic of an EL element.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... EL element, 2 ... Scan electrode drive circuit, 4 ... Data electrode drive circuit, 5 ... Power supply circuit, 6 ... Scan voltage generation circuit,
7 ... switch circuit, 8 ... control circuit, 9 ... meter circuit,
83, 84, 86 resistance, 85 ... Transistor, 87 ... Inverter, 88 ... AND gate, 111, 112 ... EL
Element part, Ba ... Battery.

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tsuneji Hattori 1 Toyota-cho, Toyota-shi, Aichi Within Toyota Motor Corporation (56) References JP-A-11-95724 (JP, A) JP-A-7-255170 (JP, A) JP-A-11-54269 (JP, A) JP-A-5-260733 (JP, A) JP-A-11-119194 (JP, A) JP-A-9-212124 (JP, A) Actual Kai 63-184596 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G09G 3/30 G09G 3/20 612 G09G 3/20 670

Claims (4)

(57) [Claims] 1. A plurality of EL element parts (111, 112,
An EL element (1) having a ...), the plurality of selectively emitting drive to drive means on the basis of the EL element portion to the light emission drive voltage (2,3,4,6), the power supply (Ba) or these voltage supply circuit for supplying the original light emitting driving voltage to the driving means of the feed (5), for the light emission drive the voltage supply circuit power supply control to the said voltage supply circuit to <br/> said driving means A power supply control unit (7, 8, 9) for supplying a voltage, wherein the power supply control unit is driven to emit light at least for a certain period of time from the time when the power supply from the power source is cut off. EL element portions emitting initiation voltage near the voltage of
Is applied from the voltage supply circuit
So that the light emission drive voltage is supplied to the drive means.
The voltage supply circuit includes a transformer (54) and this transformer.
Transistor (53) attached to the battery and the power supply terminal
Switching control of the transistor when pressure is applied
And a regulator (51) for
The switching operation of the
Under the power supply of
And the power supply control means is the power supply terminal of the regulator.
It is equipped with a circuit (7, 9) for applying and blocking voltage to
An EL display device characterized by performing power supply control . 2. A plurality of EL element parts (111, 112,
An EL element (1) having a ...), the plurality of selectively emitting drive to drive means on the basis of the EL element portion to the light emission drive voltage (2,3,4,6), the power supply (Ba) or these voltage supply circuit for supplying the original light emitting driving voltage to the driving means of the feed (5), for the light emission drive the voltage supply circuit power supply control to the said voltage supply circuit to <br/> said driving means A power supply control means (7, 8, 9) for supplying a voltage, wherein the power supply control means is driven to emit light at least once at least once after the time to cut off the power supply from the power source. voltage of the light-emitting initiation voltage near the EL element portion
In order to be applied, the voltage supply circuit
The light emitting drive voltage is supplied to the drive means.
The voltage supply circuit includes a transformer (54) and this transformer.
Transistor (53) attached to the battery and the power supply terminal
Switching control of the transistor when pressure is applied
And a regulator (51) for
The switching operation of the
Under the power supply of
And the power supply control means is the power supply terminal of the regulator.
It is equipped with a circuit (7, 9) for applying and blocking voltage to
An EL display device characterized by performing power supply control . 3. A circuit for applying and shutting off the voltage is
Provided between the power supply and the power supply terminal of the regulator
EL display device according to claim 1 or 2, characterized in that it comprises an associated transistor (75) . 4. A circuit for applying and shutting off the voltage is
Apply or cut off voltage to the power supply terminal of the regulator.
The EL display device according to claim 1 or 2 , which is a circuit means (9) of a vehicle .