JP3422901B2 - Image scanner - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image scanner, and more particularly to an image scanner having a resolution improved by optimal signal processing.

[0002]

2. Description of the Related Art One of image input devices for inputting image data to a computer is an image scanner used for data input in an electronic filing device. For example, in a financial industry such as a bank or an insurance company, it is necessary to input to a computer the items described in a huge number of contracts and other forms generated in business. Therefore, in order to perform this input accurately and at high speed and to realize the search function etc.,
An electronic filing system is constructed by directly inputting the description items on a form as image data into a computer by an electronic filing device. The image scanner is an indispensable device for inputting the description items on the form as image data.

The image scanner takes in image data as follows. For example, an operator places a plurality of forms on the paper feed unit of the image scanner. The image scanner supplies (feeds) one sheet from the paper feeding unit to the reading unit. The line sensor (CCD) of the reading unit reads the image data such as characters on the form and the image data (digital data) that can be processed by the computer
Then, the data is transferred to the host computer. The scanned form is ejected to the paper ejection section of the image scanner.

[0004]

By the way, in general,
An image scanner is always required to improve the image quality of read image data. That is, even if a large number of image scanners are competing with each other, if the price of the device is the same, more demand will be placed on the high resolution image scanner. The resolution of the image scanner is basically determined by the reading accuracy of the optical system of the reading means. Therefore, in order to increase the resolution of the image scanner, an optical system having a better reading accuracy may be used as the optical system of the reading means.

However, using an optical system having a higher resolution is not realistic because the cost of the image scanner increases greatly. Therefore, it is desirable to increase the resolution without changing the configuration of the optical system of the reading means. That is, instead of directly improving the resolution by improving the optical system, it is necessary to indirectly increase the resolution by performing signal processing for improving the resolution.

On the other hand, the image scanner is always required to improve the reading speed of image data. That is, much demand is placed on the image scanner, which has a high reading speed as well as the resolution. Therefore, even when the resolution is improved by the signal processing, the signal processing should not prevent the reading speed from increasing. In other words, if the signal processing is complicated, real-time signal processing becomes impossible as the amount of image data increases. From this point of view, it is necessary to realize optimum signal processing as signal processing for improving resolution.

An object of the present invention is to provide an image scanner having an improved resolution by performing optimum signal processing on read image data. Another object of the present invention is to provide an image scanner capable of improving the resolution and increasing the reading speed by performing optimum signal processing on the read image data.

[0008]

FIG. 1 is a block diagram of the principle of the present invention, showing the configuration of an image scanner 100 according to the present invention. The image scanner 100 includes a reading unit 1 that reads the image data of the paper 300, and a signal processing unit 5 that forms image data by performing a predetermined calculation on the image data read by the reading unit 1. The signal processing means 5 performs a predetermined process on the image data read by the reading means 1 to form image data and a data signal forming circuit 52, and performs a predetermined operation on the image data formed by the data signal forming circuit 52. And a high resolution processing circuit 51 that forms binarized image data.

[0009] High-resolution processing circuit 51, the image data reading means 1 has read, subjected to enhancement processing, after this, the coefficients and the image data to modify the emphasis coefficient as the emphasis coefficient representing the degree of emphasis of the front and rear Interpolation processing using a predetermined number of image data to form emphasized interpolation image data, and an emphasis interpolation processing circuit 40, and a reading unit 1.
The floating slice level of the image data read by, and the floating slice level whose level fluctuates according to the value of the image data in the vicinity of the image data, the floating coefficient indicating the degree of floating, and the floating coefficient are corrected. And a further coefficient that is a fixed slice level, and a predetermined number of image data before and after the image data in the emphasized interpolation image data from the emphasis interpolation processing circuit 40. The floating slice circuit 60 that outputs a fixed slice level and the floating slice level from the floating slice circuit 60 are used to binarize the emphasized interpolation image data from the emphasis interpolation processing circuit 40 to form binarized image data. And a binarization density conversion circuit 70.

According to the image scanner 100 of the present invention, the read image data is enhanced and interpolated to form enhanced interpolated image data, and the enhanced interpolated image data is sliced using the floating slice level. Binarize. This floating slice level changes according to the value of image data in the vicinity of the image data. Therefore, this can increase the resolution in a pseudo manner. Thereby, the resolution can be increased without changing the configuration of the optical system of the reading unit 1. That is,
By performing signal processing without improving the optical system, pseudo resolution can be increased. Therefore, the resolution can be improved without significantly increasing the cost of the image scanner 100.

Further, since the signal processing performed by the image scanner 100 of the present invention is simple, the signal processing can be performed in real time even if the amount of image data increases.
Therefore, the signal processing does not prevent the reading speed from increasing. That is, it is possible to adopt the optimum signal processing as the signal processing for improving the resolution to improve the resolution and increase the reading speed.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, for convenience of explanation, a double-sided reading mode and a single-sided reading mode in the image scanner 100 of the present invention will be described.

2 and 3 show the structure of the image scanner 100. The image scanner 100 has a housing 18
In FIG. 0, a front surface optical unit (carrier) 10 which is a main part of the (first) reading means 1 and a back surface optical unit 20 which is a main part of the (second) reading means 2 are provided. Front-side optical unit 10 and back-side optical unit 2
0 is a well-known light source for reading image data,
A lens system and a line sensor (CCD) are provided.

The back side optical unit 20 is used only in the double-sided reading mode, and thus is fixedly provided to the housing 180. Since the front surface optical unit 10 is used in both the double-sided reading mode and the single-sided reading mode, it is provided so as to be movable in a predetermined direction (as a carrier type). That is, the surface optical unit 10
Is used as a main part of the first reading means 1 at the position shown in FIG. 2 in the double-sided reading mode,
Further, in the single-sided reading mode, it is used by being moved in the arrow direction shown in FIG.

In the double-sided reading mode, as shown in FIGS. 2 and 3, a plurality of sheets 300 are placed on the sheet stacker 181 and are automatically transferred to the first and second reading units 1 and 2 one by one. Supplied. Therefore, the double-sided reading mode is also the ADF (Auto Document Feeder) mode. The sheet 300 is supplied to the first and second reading units 1 and 2 by the sheet supply unit 7 mainly including the pick roller 147 and the feed rollers 148 and 149. That is, the paper supply unit 7 supplies the paper 300 by feeding the paper in a predetermined direction (sub-scanning direction) at a predetermined speed. Specifically, the paper 300
Are picked up one by one by the pick roller 147, sent to the feed roller 149 through a predetermined reading position by the feed roller 148, and discharged onto the paper discharge table 182 after the reading is completed. Therefore, during this period, the paper 300
Is moved in a predetermined direction, and the first and second reading means 1 and 2 are fixed. The speed of movement of the paper 300 is a predetermined constant speed.

The first and second reading means 1 and 2 are
The image data of the sheet 300 is read at each of predetermined reading positions. Here, as shown in FIG. 3, the reading positions of the first and second reading units 1 and 2 are made slightly different from each other in the feeding direction of the sheet 300. Specifically, the reading position of the first reading unit 1 is slightly upstream of the reading position of the second reading unit 2 in the sheet feeding direction.

In the single-sided reading mode, as shown in FIG. 2, only one sheet of paper 300 is placed on the plate-shaped platen (platen glass) 183 by the operator.
At this time, the surface of the paper 300 is on the lower side (the platen 183 side)
It is said that The front surface optical unit 10 is moved to the start position under the platen 183 prior to the start of the single-sided reading mode, and during the single-sided reading mode, at a predetermined speed in the same direction as the arrow in FIG. 2 (sub-scanning direction). Can be moved. Movement of the surface optical unit 10 (stepping)
It is performed by the motor 145 and the belt 146. During this time, the sheet 300 is fixed on the platen 183.

The sub-scanning direction is the feeding direction of the paper 300 and the moving direction of the front surface optical unit 10, and the paper 3
00 in the vertical direction. Further, the main scanning direction is the direction of the reading line in the first and second reading means 1 and 2, which corresponds to the lateral direction of the paper 300, and thus goes straight in the sub scanning direction.

FIG. 4 shows the structure of the image scanner 100. The image scanner 100 is connected to the host computer 200 and transfers image data to the host computer 200. As a result, the image data read from the paper 300 is input to the host computer 200.

The microprocessor 8 controls the reading control means 4, the signal processing means 5, the data transfer means 6 and the paper feeding means 7 to make the image scanner 100.
Take overall control of. In addition, the microprocessor 8
Switching between the double-sided reading mode and the single-sided reading mode is performed according to a predetermined instruction input from the outside of the image scanner 100 by the operator. That is, the control signals necessary for executing these modes are formed and input to the reading control means 4, the signal processing means 5, the data transfer means 6 and the paper supply means 7. Further, the microprocessor 8 designates the density in the high resolution processing according to a predetermined instruction input from the outside of the image scanner 100 by the operator.

The first reading means 1 is a line sensor,
It consists of an amplifier and an analog-to-digital converter (not shown). The line sensor is composed of a CCD and outputs an image signal (analog signal) corresponding to the image data on the paper 300. The analog output of the line sensor is amplified to a predetermined level by an amplifier, converted into a digital signal by an analog-digital conversion unit, and then input to the signal processing means 5. This digital signal is, for example, a signal of 8 bits (256 gradations) per pixel.

The second reading means 2 has the same structure as the first reading means 1. Therefore, in the double-sided reading mode, the signal processing unit 5 substantially parallels the digital signal of the front side of the sheet 300 from the first reading unit 1 and the digital signal of the back side of the sheet 300 from the second reading unit 2. Further, in the single-sided reading mode, the digital signal (only) of the surface of the sheet 300 from the first reading unit 1 is input.

The reading control means 4 forms and controls the control signals necessary for controlling the line sensor, the amplifier and the analog-digital conversion section of the first and second reading means 1 and 2. Further, the reading control means 4
Controls the motor 145 by forming a control signal necessary for controlling the motor 145. It should be noted that the reading control means 4 is actually provided corresponding to the first and second reading means 1 and 2. As the motor 145, an ADF system (stepping) motor that supplies the sheet 300 in the double-sided reading mode, a motor (stepping) that drives the first reading unit 1 in the sub-scanning direction in the single-sided reading mode, and the like are provided.

The signal processing unit 5 performs predetermined signal processing by performing a predetermined calculation on the digital signals input from the first and second reading units 1 and 2 to form optimized image data. To do. Signal processing means 5
The high resolution processing circuit 51 of FIG. 1 (see FIG. 1) performs high resolution processing for increasing the resolution based on the input image data (digital signal), and further binarizes it (white or black binary signal). Value) to perform a binarization process. Since the signal processing performed by the high resolution processing circuit 51 is simple processing,
Even if image data that is twice as large as the conventional image data is input from the first and second reading units 1 and 2, it can be processed in real time to form a binarized signal. The data signal forming circuit 52 (see FIG. 1) of the signal processing means 5 forms image data for the high resolution processing circuit 51. For example, well-known shading correction processing, gradation correction processing by gamma conversion, and the like are performed to form optimized image data. Note that, in reality, the signal processing means 5 has the first
Also, two systems are provided corresponding to each of the second reading means 1 and 2, but a part of the processing circuit is shared by these two systems.

The data transfer means 6 sends the optimized image data input from the signal processing means 5 to the host computer 2
Data transfer to 00. The image data to be transferred is
In the double-sided reading mode, the image data of the front surface and the back surface of the sheet 300 from the first and second reading units 1 and 2, and in the single-sided reading mode, the image data of the front surface of the sheet 300 from the first reading unit 1. (Only).

5 to 8 show the resolution increasing process. In particular, FIG. 5 shows the configuration of the high resolution processing circuit 51, FIGS. 6 and 7 show the processing state of image data by the high resolution processing, and FIG. 8 conceptually shows the result of the high resolution processing. . 6 and 7 successively form one figure,
The processing for image data in the same main scanning direction (that is, the same line for reading) is shown.

As shown in FIG. 5, a high resolution processing circuit 5
1 includes a delay circuit 30, an emphasis interpolation processing circuit 40, a floating slice circuit 60, a binarization density conversion circuit 70, and a density control signal generation circuit 90.

The delay circuit 30 includes a data signal forming circuit 5
The image data from 2 (original image data X) is input.
The original image data X is image data for one pixel, and is composed of 8-bit (256 gradations) digital data. As shown in FIG. 6, the original image data X has ... X 2 (n−1), X 2n, X 2 (n + 1), ...
Lined up like X 2 (n + 2).

A digital signal obtained by converting an analog signal read by the line sensor is referred to as original image data and is represented by X. Here, n is a positive integer, and its upper limit depends on the number of pixels in one line of the line sensor. The subscript of the read pixel X is represented by 2n or the like (that is, an even number) for the convenience of expression when inserting the interpolated image data therebetween. In the following description, for convenience of explanation, it is assumed that the pixel (pixel of interest) that is the target of the high-resolution processing at present is X2n.

The original image data X is input from the delay circuit 30 to the emphasis interpolation processing circuit 40 at a predetermined timing. Note that the delay circuit 30 outputs the original image data of a plurality of pixels before and after the pixel required for processing, in addition to the pixel of interest X2n. The emphasis interpolation processing circuit 40 performs interpolation processing and emphasis processing on the original image data X to form and output the emphasis interpolation image data Z. This emphasized interpolation image data Z is input to the binarization density conversion circuit 70.
The emphasis interpolation processing circuit 40 includes an interpolation processing circuit 41 and an emphasis processing circuit 42. The interpolation processing circuit 41 uses the original image data X
Interpolation processing is performed using the image data of the pixel of interest and the next pixel, and the interpolated image data Y is formed. Since one piece of interpolation data is inserted between each piece of the original image data X, the interpolation image data Y has a data amount twice as large as the original image data X. That is, the resolution is pseudo double. The enhancement processing circuit 42 performs enhancement processing of the interpolation image data Y output from the interpolation processing circuit 41 using image data of pixels before and after the pixel of interest, and forms enhanced image data (that is, enhanced interpolation image data) Z. To do.

Specifically, the interpolation processing circuit 41 performs a data interpolation process on the pixel of interest to determine the value of the pixel which is to be interpolated between the pixel of interest X2n and the pixel X2 (n + 1) one pixel after that. Ask. Therefore, the interpolation processing circuit 41 performs a predetermined operation Y2n + 1 = (X2n for obtaining the interpolation pixel Y2n + 1.
+ X 2 (n + 1)) / 2. Therefore, this process is a process of obtaining the average value of the pixel of interest X2n and the image data of the pixel X2 (n + 1) that is one pixel after the pixel of interest X2n. By repeating this processing in order, as shown in FIG. 6, in the main scanning direction, ... Y 2 (n−1), Y 2 (n−1) +1,
Y2n, Y2n + 1, Y2 (n + 1), Y2 (n + 1) +1, Y2 (n
+2) ... Interpolated image data Y arranged in sequence is obtained. Since the read image data X2n and the like do not need to be interpolated, there is a relationship such as X2n = Y2n.

The enhancement processing circuit 42 performs image enhancement processing to change the interpolated image data Y2n of the pixel of interest X2n to a value that enhances it. Therefore, the emphasis processing circuit 42 performs a predetermined calculation Z2n = K for emphasizing the interpolated image data Y2n.
XY2n + (1-K) x (Y2 (n-1) + Y2 (n + 1)) / 2
I do. Therefore, this process is a process for increasing the signal amplitude, and the emphasized signal is a function with the image data Y 2 (n−1) and Y 2 (n + 1) of one pixel before and after the pixel of interest X 2n as variables. Is a process for obtaining.

Here, the emphasis processing circuit 42 uses an emphasis coefficient K which is predetermined by the characteristics of the apparatus or which is designated by the operator. The emphasis coefficient K represents the degree of emphasis. As the value of the emphasis coefficient K is larger than “1”, the effect of the emphasis becomes larger, but if the value of the emphasis coefficient K is too large, the gradation is conversely disturbed. Therefore, the value depends on the characteristics of the device or the operator's instruction. It is set to an appropriate value. By repeating this processing in order, as shown in FIG. 6, in the main scanning direction, ... Z 2 (n−1), Z 2 (n−1) +1, Z 2n, Z 2n
+1, Z 2 (n + 1), Z 2 (n + 1) +1, Z 2 (n + 2) ...
The emphasized image data Z arranged as shown in FIG.

On the other hand, the emphasized image data Z is input to the floating slice circuit 60 at a predetermined timing. The floating slice circuit 60 performs floating slice processing on the emphasized image data Z using the image data of a plurality of (for example, two) pixels before and after the emphasized image data Z2n of the pixel of interest, and sets the floating slice level F. Form and output. This floating slice level F is also input to the binarization density conversion circuit 70.

Specifically, the floating slice circuit 60 performs a floating slice process on the target pixel X2n to binarize the target pixel X2n (or its emphasized image data Z2n) (floating slice level). ) Find F2n. Therefore, the floating slice circuit 60 performs a predetermined calculation F2n = (1-
T) × S + T × (Z max — 2n + Z min — 2n) / 2. Here, Z max — 2n and Z min — 2n are image data Z2 (n−2), Z2 (n−1), Z2 (n + 1), and Z2 (Z2 (n−2), Z2 (n−1), Z2 ( n + 2)
Is the maximum and minimum value of Therefore, this process is a process for obtaining the floating slice level F as a function having four image data before and after the pixel of interest as variables. The coefficient S is a constant and is a slice level that is determined in advance by the characteristics of the apparatus or is instructed by the operator (FIG. 8).
(See (B)).

Here, the floating slice circuit 60 has a coefficient T which is predetermined by the device characteristics or which is designated by the operator.
To use. The coefficient T represents the degree of floating (fluctuation). As the value of the coefficient K is larger than “0”, the effect of the floating (fluctuation) slice becomes larger, but if the value of the coefficient T is too large, the gradation is conversely disturbed. It is set to an appropriate value depending on the target. By repeating this processing in order, as shown in FIG. 7, in the main scanning direction ... F 2 (n−1), F 2 (n−1) +1,
F2n, F2n + 1, F2 (n + 1), F2 (n + 1) +1, F2 (n
+2) ... Floating slice level F is obtained.

The binarization density conversion circuit 70 binarizes the emphasized image data Z from the emphasizing interpolation processing circuit 40 using the floating slice level F from the floating slice circuit 60 to obtain the binarized image data B. Then, the density control signal from the density control signal generation circuit 90 is used to control the density of the binarized image data B to form and output the density converted image data B. It should be noted that the density-converted image data B is also binarized image data and has only different densities, and therefore is represented by the symbol B.

The binarization density conversion circuit 70 comprises a binarization processing circuit 71 and a density conversion processing circuit 72. The binarization processing circuit 71 binarizes the enhanced image data Z from the enhancement interpolation processing circuit 40 using the floating slice level F from the floating slice circuit 60 to form binarized image data B. The density conversion processing circuit 72 uses the density control signal from the density control signal generation circuit 90 to perform the binarization processing circuit 71.
The density control is performed on the binarized image data B from 1 to 3 to form the density converted image data B.

Specifically, the binarization processing circuit 71 performs the binarization processing of the pixel of interest X2n and outputs the emphasized image data Z.
Let 2n be a binary signal. For this purpose, the binarization processing circuit 71
Slices the emphasized image data Z2n at the floating slice level F2n corresponding to the data. Therefore, if Z2n> F2n, B2n = 1 (e.g., corresponding to black), and otherwise, B2n = 0 (e.g., corresponding to white). By repeating this process, as shown in FIG. 7, in the main scanning direction, ... B 2 (n−1) = white, B 2 (n−1)
+ 1 = white, B2n = black, B2n + 1 = white, B2 (n + 1) = white,
Binarized image data B arranged as B 2 (n + 1) + 1 = black, B 2 (n + 2) = black ...

The density conversion processing circuit 72 performs the density conversion processing and the binarized image data B from the binarization processing circuit 71.
Convert the data density of. Therefore, the density conversion processing circuit 72 extracts (thinning) data from the binarized image data B at a predetermined ratio according to the density control signal from the density control signal generation circuit 90, and, in a predetermined case, controls the density. Change the data that should be discarded according to the signal.

On the other hand, the density control signal generation circuit 90 forms the density control signal (ZOOM) according to the density designation from the microprocessor 8. Here, the operator's instruction input for specifying the density is performed, for example, by inputting the resolution of the output image as 600 dpi (dot per inch), 300 dpi, or the like. For example, when the reading performance (resolution) of the line sensor is 400 dpi,
800 dpi (double the resolution) by the interpolation processing of the present invention
Of the interpolated image data Y, the binary image data B of the resolution is formed using the interpolated image data Y, and the binary image data of the read density (resolution) newly designated by using the interpolated image data Y Data) B is formed. That is, the emphasized image data Z is binarized by the floating slice level F, and then the density conversion is performed. The operator does not need to be aware of the reading performance of the line sensor.

For example, when the resolution of the line sensor (original image data X) is 400 dpi and the resolution of the density designation instruction input is 600 dpi, the density control signal is formed as follows. That is, since the interpolated image data Y and the binarized image data B are 800 dpi, if the data is discarded from the binarized image data B at a rate of one in four (collected at a rate of three in four). For example, data with a density of 600 dpi is obtained. Therefore, the density control signal is output in synchronization with the binarized image data B, and is a signal (for example, high level) for instructing the discarding once for every four binarized image data B, and the others. It is a signal (for example, low level) for instructing collection as the density-converted image data B without discarding. According to this density control signal, FIG.
As shown in, the binary image data B 2n, B 2 (n + 2), for example, is discarded at a rate of one for every four binary image data B. It should be noted that in FIG. 7, this is represented by adding the character "extract", and the other data is represented by adding the character "take".

However, if the binarized image data B2n is discarded as it is, the data has a black isolated point (a value "black" different from the binarized data "white" of the two image data before and after it). Since it represents the binary data that it has,
The black display, which should have existed at that position, is missing, resulting in a defective image.

Therefore, the density conversion processing circuit 72 extracts the data of the black or white isolated point, and changes the data to be discarded when the data at that position is the target of the discarding. That is, the binarized image data B2n is left without being discarded, and the binarized image data B2n + 1 immediately after the data (or the binarized image data B (2n-1) + immediately before the binarized image data B2n +
Discard 1). As a result, image data faithful to the original image can be obtained. Binarized image data B 2 (n
+2) is not the data at the isolated point, so it is discarded as it is. By repeating the above processing, FIG.
, In the main scanning direction, ... B 2 (n
−1) = white, B 2 (n−1) + 1 = white, B 2n = black, B 2 (n + 1)
= Density, B 2 (n + 1) +1 = black ...

According to the image scanner 100 of the present invention, its resolution can be defined independently of the reading performance of the line sensor and can be varied within a predetermined range, and the value can be specified by the operator from outside the image scanner 100. can do. Further, the image scanner 100 of the present invention temporarily forms image data having a double resolution and then uses this to form image data having a designated reading density. Therefore, it is possible to absorb the deterioration of the signal due to the quantization error in the reading and to obtain the image data which is faithful or clear to the original image. Furthermore, since the data of white or black isolated points appearing in the original image in the density conversion remains without being deleted, even if the resolution of the image scanner 100 is defined independently of the performance of the line sensor, it is faithful to the original image. Image data can be obtained.

As shown in FIG. 8, the image scanner 100 of the present invention reads the character "MARS" printed or handwritten (test pattern) on the paper 300. At this time, the original image data X on the reading line shown in FIG. 8A does not become a clear binary signal as shown in FIG. 8B. That is, it changes under the influence of the surroundings of the pixel. For example, in the central portion of "M", the portion that should originally be black is missing and is easily read as white, and in the central portion of "A", the portion that is originally white is painted out and is easily read as black. That is, this is a typical example of “missing” and “crushing”.

Therefore, as shown in FIG. 8C, the amplitude of the original image data X is increased to the emphasized image data Z, and the slice level is slightly changed in the direction in which the amplitude is increased to change the floating slice level. And This allows
It is possible to prevent the original image data from being lost or crushed.
Furthermore, an isolated point such as the tip of the central portion of "M" can be accurately binarized as black by the floating slice, and image data faithful to the original image can be obtained.

FIG. 9 shows an actual configuration of the high resolution circuit, which is to be compared with FIG. In FIG. 9, the delay circuit 30 includes a pixel X2n from the data signal forming circuit 52.
Image data such as (original image data X2n) is input.
From the delay circuit 30, in addition to the target pixel X2n, 2
Original image data X 2 (n−2), X 2 (n−1), X
2 (n + 1) and X2 (n + 2) are output. At this time, the delay circuit 30 stores the original image data X 2 after the pixel X 2n three times.
(n + 3) is input.

Original image data X 2 (n−1), X 2n, X 2 (n +
1) is input to the emphasis interpolation processing circuit 40. As can be seen from the comparison with FIG. 5, in practice, the original image data X is first subjected to the emphasis process to obtain the emphasized image data, and then the interpolation process using the emphasized image data is performed to form the interpolated image data. It Further, the correction coefficient G is used in addition to the coefficient K, and the coefficient K is corrected using this. Therefore, the enhancement interpolation processing circuit 40 performs the interpolation process and the enhancement process on the image data X2n of the pixel of interest, and the image data X2 (n-1) and X2 (of the image data X2n and one pixel before and after the image data X2n. n
+1) and predetermined coefficients K and G.

On the other hand, the original image data X2 (n-2), X2 (n-)
1), X2 (n + 1), and X2 (n + 2) are input to the floating slice circuit 60. As can be seen from the comparison with FIG. 5, the floating slice processing is not actually performed on the emphasized image data,
A floating slice level F is formed on the original image data X. Further, the correction coefficient H is used in addition to the coefficient T, and the coefficient T is corrected using this. Furthermore, a predetermined coefficient S is used. Therefore, the floating slice circuit 60 is
The floating slice process for the image data X2n is performed using the image data of two pixels before and after the image data X2n and the predetermined coefficients T, S and H.

The output of the emphasis interpolation processing circuit 40 (hereinafter, this is represented by Z) and the floating slice level F from the floating slice circuit 60 are input to the binarization density conversion circuit 70.
As can be seen from the comparison with FIG. 5, in reality, the density interpolation processing and the binarization processing are simultaneously performed on the emphasized interpolation image data Z to form the binarized image data. Further, the floating slice level F and the density control signal are converted into a binary density conversion circuit 70.
Entered in. Therefore, the binarization density conversion circuit 70 performs the density conversion process and the binarization process on the image data X2n of the pixel of interest using the image data X2n, its floating slice level F, and the density control signal.

FIG. 10 shows the configuration of the emphasis interpolation processing circuit 40, FIG. 11 shows the configuration of the floating slice circuit 60, and FIG.
Reference numeral 2 shows the configurations of the binarized density conversion circuit 70 and the density control signal generation circuit 90.

As shown in FIG. 10, the original image data X 2 (n
−1) and X 2 (n + 1) are input to the adder 43, and the output thereof is (X 2 (n−1) + X 2 (n + 1)) / 2. This value and the original image data X2n are input to the subtractor 44, and X
2n- (X2 (n-1) + X2 (n + 1)) / 2 is output. This value and the coefficient K ′ are input to the multiplier 45, and K ′ × (X
2n- (X2 (n-1) + X2 (n + 1)) / 2) is output.
This value and the pixel of interest X2n are input to the adder 47, and K '* (X2n- (X2 (n-1) + X2 (n + 1)) is output as the output.
/ 2) + X2n = K * X2n + (1-K) * (X2 (n-1) +
X 2 (n + 1)) / 2 is obtained. That is, the emphasized image data Z
Is. This value and the original image data X2n are input to the selector 48, and one of them is selectively output by the output of the comparator 46. Here, K '= K-1.

The comparator 46 outputs to the output X2n- of the subtractor 44.
(X2 (n-1) + X2 (n + 1)) / 2 and the coefficient G are input and compared. When the former value is smaller than the coefficient G, a selection signal for setting the value of the coefficient K to "1" is output (that is, the original image data X2n is selected). In other cases, a selection signal that leaves the value of the coefficient K as it is (that is, the output of the adder 47 is K × X2n + (1-K)).
× (X 2 (n−1) + X 2 (n + 1)) / 2 is selected). The coefficient G is a value determined from the S / N ratio or the like peculiar to the image scanner 100. The smaller the value of the coefficient G, the more effective the minute signal can be detected. However, since the ineffective noise is also detected on the contrary, it is determined by the characteristics of the device or by the operator's instruction.

Therefore, the output of the selector 48 is the output of the comparator 46.
Is output as the original image data X2n when it is a selection signal for setting the value of the coefficient K to "1", and is otherwise emphasized image data Z. The output of the selector 48 is input to the delay circuit 49 and is output at the timing shifted by half the phase. That is, the original image data X2n of the pixel of interest or its emphasized image data Z and the original image data X2 of the pixel one after that.
(n + 1) or its emphasized image data Z is input to the adder 50 at a timing shifted by a half phase, and the average value ((X2n or Z2n) + (X2 (n
+1) or Z 2 (n + 1)) / 2 or (X 2n or Z 2n) itself is output. That is, the emphasized interpolation image data Z.

In this way, as the emphasized image data Z,
Not only the average value of the emphasized signal, but the original image data X2n
The average value of may be output. Since the interpolation processing is performed using this, the original image data X2n or the average value of the emphasized data is used as the emphasized interpolated image data Z. This is the reason why the enhancement process is performed prior to the interpolation process, and by doing so, empirically clearer image data can be obtained. Note that the hardware amount is also reduced by such a configuration.

As shown in FIG. 11, the original image data X2 (n
-2), X2 (n-1), X2 (n + 1), X2 (n + 2) are maximum values /
It is input to the minimum value detection circuit 61. The maximum value (X max of the four original image data detected by the maximum / minimum value detection circuit 61 2n) and minimum value (X min 2n) is input to the subtractor 62 and the adder 64.

Output from subtractor 62 (maximum value-minimum value)
= X max 2n-X min 2n and coefficient H enter comparator 63
Forced and compared. When the former value is smaller than the coefficient H
Selection signal such that the value of the coefficient T described later is "0"
Is output (that is, the coefficient S is selected). Other than this
In this case, if the selection signal that leaves the value of the coefficient T unchanged
It is output (that is, (1-T) × S + T × (X max 2n
+ X min Select 2n) / 2). Coefficient H is a valid image
It is for identifying information. The value of coefficient H is small
The more effective a minute signal can be detected, the contrary
Effective noise is also detected, so the value is
Or by operator instructions. one
Output from the adder 64 (maximum value + minimum value) / 2 =
(X max 2n + X min 2n) / 2 is input to the subtractor 65
And the difference from the coefficient S is output. This difference (X max 2n + X
 min 2n) / 2−S and the coefficient T are input to the multiplier 66.
T × ((Xmax 2n + X min 2n) / 2-S) appears
I will be forced. This output and the coefficient S are input to the adder 67.
S + T × ((X max 2n + X min 2n) / 2-S)
= (1−T) × S + T × (X max 2n + X min 2n) /
2 is output. That is, the floating slice F. This out
The force and the coefficient S are input to the selector 68.

Therefore, the output of the selector 68 is the output of the comparator 63.
Is a fixed slice level S when the output of is a selection signal that sets the value of the coefficient T to "0", and is a floating slice F in other cases. As described above, as the floating slice F, not only the slice signal subjected to the floating process but also the fixed slice level S may be output as it is. Then, the slice processing is performed using this.
As a result, empirically clearer image data can be obtained. Note that the hardware amount is also reduced by such a configuration.

In FIG. 12, the control signal for designating the density from the microprocessor 8 is input to the adder 91 of the density control signal forming circuit 90. For example, as described above, when the resolution of the line sensor is 400 dpi and the resolution of the density designation instruction input is 600 dpi, one out of every four pieces of the emphasized interpolation image data Z is discarded (in other words, 800). If you collect 600 per piece)
A density of 600 dpi can be realized. Therefore, the value set as the density designation is set to "600".

The output from the subtractor 93 is input to the adder 91. This is a subtraction value of "-0" or "-800" that is output in synchronization with the (800 dpi) emphasized interpolation image data Z. The adder 91 outputs the added value at the timing. This added value output is input to the comparator 92 and the subtractor 93. The subtractor 93 outputs the output of the comparator 92 (ZOO
According to the instruction of M), a value obtained by subtracting “800” or “0” from the value of the adder 91 is output. For example, if ZOOM is at high level, a value obtained by subtracting "800" from the value of the adder 91 is output.

The comparator 92 compares the comparison value "800" with the added value of the adder 91, and when the added value is less than 800, instructs the discard (for example, at the low level).
A density control signal (ZOOM) is output, and in other cases, a density control signal is output as it is, that is, a density control signal (for example, at a high level) that directs collection is output. This density control signal is supplied to the binarized density conversion circuit 70 and the subtractor 93.
Entered in.

The subtractor 93 outputs the held content when the density control signal indicates the discard, and outputs (the held content-800) otherwise.

From the above, the density control signal is 800 dp
In synchronization with the emphasized interpolation image data Z of i, for example, 80
It is an output (for example, high level) instructing collection at a ratio of 0 to 600, and this is repeated. When the resolution of the density designation instruction input is 800 dpi, it is not necessary to discard it, so that the comparator 92 outputs only a signal (for example, high level) instructing collection.

On the other hand, the emphasized interpolation image data Z from the emphasis interpolation processing circuit 40 and the floating slice F from the floating slice circuit 60 are input to the comparator 73 for comparison. The output of the comparator 73 is such that the emphasized interpolation image data Z is a floating slice F.
If it is larger, it is set to "black (or 1)", and otherwise it is set to "white (or 0)". That is, the binarized image data B (data equal to) is output. This output is input to the delay circuit 74. The delay circuit 74 outputs the binarized image data B of the pixel of interest and the one binarized image data B before and after it at a predetermined timing. This output and the density control signal (ZO
OM) is input to the isolated point detection circuit 75. When the density control signal is a signal for instructing discarding, the isolated point detection circuit 75 compares the input three binarized image data B and determines whether or not the pixel of interest is an isolated point. A signal that indicates whether or not it is an isolated point is detected and is output. In other cases, a signal that indicates that it is not an isolated point is output without performing isolated point detection. Therefore, for example, for the binarized image data B2n in FIG. 7, a signal indicating that it is an isolated point is output, and for the binarized image data B2 (n + 2), a signal indicating that it is not an isolated point is output. It This output is input to the selector 77.

The emphasized interpolation image data Z from the emphasis interpolation processing circuit 40 is input to the delay circuit 76. The delay circuit 76 outputs the emphasized interpolated image data Z of the pixel of interest and the emphasized interpolated image data Z of the pixel immediately after that at a predetermined timing. This output is input to the selector 77. Selector 77
When the output of the isolated point detection circuit 75 is a signal indicating that the isolated point is not an isolated point, the emphasized interpolation image data Z of the pixel of interest and the pixel one pixel after that is output in that order to detect the isolated point. When the output of the circuit 75 is a signal indicating that the pixel is an isolated point, the emphasized interpolation image data Z of the pixel of interest and the pixel one pixel after the pixel of interest are rearranged and output. Therefore, for example, the binarized image data B2n of FIG.
Is output after being replaced with the binarized image data B 2n + 1 immediately after that, and the binarized image data B 2 (n + 2) is output in the same order without being replaced with the binarized image data 1 after that. To do.

Enhanced interpolation image data Z from the selector 77,
The floating slice F from the floating slice circuit 60 and the density control signal from the density control signal forming circuit 90 are input to the comparator 78. When the density control signal is a signal instructing the discarding, the comparator 78 does not perform the process of comparing the emphasized interpolation image data Z with the floating slice F and does not output the corresponding binarized image data. In other cases, the emphasized interpolation image data Z is compared with the floating slice F and binarization processing is performed. Therefore, the output of the comparator 78 in this case is “black” when the emphasized interpolated image data Z is larger than the floating slice F, and is “white” otherwise. That is, the binarized image data B is output. This output is input to a delay circuit (not shown) and output after adjusting the output timing.

Therefore, for example, the binarized image data B of FIG.
For 2n, the binarized image data B2n + 1 immediately after that is replaced and output. This is because the binarized image data B2n is an isolated point, and the binarized image data B2n is present at the position where the density control signal indicates the discarding. As a result of the replacement in the selector 77, the binarized image data B2n + 1 (located at B2n after the replacement) is discarded and the binarized image data B2n (located at B2n + 1 after the replacement) is an isolated point. The density-converted image data B is output without being discarded as shown in FIG. In addition, in FIG.
The binarized image data B2n is represented by "pull-out", and the binarized image data B2n + 1 is represented by "pull-out".

On the other hand, the binarized image data B 2 (n + 2) is output in that order without being replaced with the binarized image data immediately after it. This is because the binarized image data B 2 (n + 2) is not an isolated point. Even if the binarized image data B is present at a position where the density control signal does not instruct to be discarded, the binarized image data B is output in that order without replacement. Therefore, the binarized image data B 2 (n +
1) is removed. However, since the data is not an isolated point, the density-converted image data B 2 (n + 1) +1 immediately before the data is output as “black” as shown in FIG. It is displayed without loss even by conversion and interpolation processing.

[0070]

As described above, according to the present invention,
In an image scanner equipped with a double-sided reading mode that reads the image data on the front and back sides of the paper, it is obtained by emphasizing and interpolating using a floating slice level whose level fluctuates according to the value of image data near the image data. By binarizing the emphasized interpolated image data, it is possible to artificially increase the resolution and eliminate the influence of neighboring pixels on the image data. Therefore, the signal processing can be performed without changing the configuration of the optical system. Can increase the resolution, and the resolution can be improved without significantly increasing the cost of the image scanner. Also, since this signal processing is simple,
Signal processing can be performed in real time even if the amount of image data increases, and optimal signal processing is adopted as signal processing to improve resolution, improving resolution without significantly increasing the cost of the image scanner. It is possible to achieve both high reading speed and high reading speed.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is an explanatory diagram of an image scanner structure.

FIG. 3 is an explanatory diagram of a structure of an image scanner.

FIG. 4 is a configuration diagram of an image scanner.

FIG. 5 is a configuration diagram of a high resolution processing circuit.

FIG. 6 is an explanatory diagram of high resolution processing.

FIG. 7 is an explanatory diagram of high resolution processing.

FIG. 8 is an explanatory diagram of high resolution processing.

FIG. 9 is a configuration diagram of a high resolution processing circuit.

FIG. 10 is a block diagram of an emphasis interpolation processing circuit.

FIG. 11 is a configuration diagram of a floating slice circuit.

FIG. 12 is a configuration diagram of a binarization density conversion circuit.

[Explanation of symbols]

1 First reading means 8 microprocessors 30 delay circuits 40 emphasis interpolation processing circuit 41 Interpolation processing circuit 42 emphasis processing circuit 51 High resolution processing circuit 52 data signal forming circuit 60 floating slice circuits 70 Binary density conversion circuit 71 Binarization processing circuit 72 Density conversion processing circuit 90 Density control signal generation circuit 100 image scanner 200 host computer 300 sheets

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06T 1/00-5/50

Claims (3)

(57) [Claims] 1. An image scanner, comprising: reading means for reading image data on a sheet; and signal processing means for forming image data by performing a predetermined operation on the image data read by the reading means. A data signal forming circuit for forming image data by performing a predetermined process on the image data read by the reading unit; and a binary image by performing a predetermined operation on the image data formed by the data signal forming circuit. A resolution-enhancing processing circuit for forming data, wherein the resolution-enhancing processing circuit performs an enhancement process on the image data read by the reading means, and thereafter, an enhancement coefficient indicating the degree of enhancement and the enhancement coefficient. Performs an interpolation process using a coefficient for correcting and a predetermined number of image data before and after the image data,
An enhancement interpolation processing circuit that forms enhanced interpolation image data, and a floating slice level for the image data read by the reading unit, the floating slice level varying according to the value of image data in the vicinity of the image data. The level is a floating coefficient that represents the degree of floating, a coefficient that modifies the floating coefficient, yet another coefficient that is a fixed slice level, and a value before and after the image data in the emphasized interpolation image data from the emphasis interpolation processing circuit. A floating slice circuit that outputs a fixed slice level in a predetermined case using a predetermined number of image data and a floating slice level from the floating slice circuit is used to perform emphasis interpolation from the emphasis interpolation processing circuit. And a binarization density conversion circuit for binarizing the image data to form binarized image data. Image scanner. 2. The resolution increasing processing circuit further includes a density control signal generation circuit that forms a density control signal according to a density designation instruction input, and the binarization density conversion circuit according to the density control signal, The image according to claim 1 , wherein the enhanced interpolation image data from the enhanced interpolation processing circuit is discarded at a predetermined ratio to form density-converted image data having a data density corresponding to the density control signal. Scanner. 3. The binarization density conversion circuit detects an isolated point in the enhanced interpolation image data from the enhanced interpolation processing circuit, and the enhanced interpolation image data existing at the isolated point is the object of the discarding. The image scanner according to claim 2 , wherein the position is changed in some cases.