JP3427769B2 - Wonder absorption circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wander absorbing circuit in PCM multiplex transmission.

[0002]

2. Description of the Related Art PCM multiplex transmission is performed using three types of signals, a frame head indicating the start position of a frame for synchronizing data, data, and a clock. However, external noise during long-distance transmission may cause a wander that causes a phase difference between the data and the frame head or the clock, resulting in loss of synchronization. However, the conventional technology does not have a measure for absorbing the loss of synchronization of data by this type of wander.

In FIG. 2, 64 kbps at 2.048 Mbps
An example of a time chart of the frame head 21, the clock 22 and the data 23 at the time of PCM data transmission in the case where the above data is multiplexed on 32 channels is shown. This example (Fig. 2)
Shows a time chart at the normal time when no wander occurs.

[0004]

However, the prior art has the following problems. In the PCM multiplex transmission, since there is no means for avoiding the above-mentioned wander, when fluctuation called "wander" occurs during data transmission, data synchronization is lost and there is no means for easily recovering it. There was a point.

FIG. 3 shows an example of a time chart when a wander occurs. In this example (FIG. 3), the frame head 31, which is sent every 8 kHz, is displaced by a wander by one clock of 2.048 MHz from the normal position. In this case, the fetch position of the data 33 is deviated by 1 bit from the normal data fetch position. In this state, data is out of synchronization.

Further, FIG. 4 shows data representing a result of observing a wander state generated in an actual system with an oscilloscope. An example is shown in which the frame head is deviated by about one clock before and after the normal position.

Furthermore, in order to perform data transmission efficiently and with minimum loss, it is necessary to externally set the PCM channel selection and the maximum wander time, and automatically set the optimum extension timing. .

The present invention has been made in view of the above problems, and an object of the present invention is to prevent wandering of data and to perform wander absorption for efficient data transmission with minimum loss. The point is to provide the circuit.

[0009]

The present invention has the following constitution in order to solve the above problems. According to a first aspect of the present invention, there is provided a wander absorbing circuit for absorbing a wander generated in digital communication, which receives and holds a frame head, a clock and data, and extends their cycles according to a timing signal. The holding means for outputting and the frequency division timing at which the wander can be absorbed are determined, the period expansion multiple is calculated from the frequency division timing, the expansion timing signal representing the expansion multiple is generated, and the retention means and stretching the timing generation means for outputting, the stretching timing generation hands
The expansion timing to the selected channel for the stage
A channel selection means for instructing the generation and output of signals, the
For the stretch timing generation means,
A wander absorbing circuit characterized by comprising an output means for setting and outputting a large time . The gist of the invention according to claim 2 is that the holding means receives and holds the frame head, and a frame head holding circuit that extends and outputs a cycle of the frame head according to the extension timing signal, and receives the clock. And a clock holding circuit that holds and holds the period and outputs the data after extending the period according to the extension timing signal, and a data holding circuit that receives and holds the data and outputs the period after extending and outputting the period according to the extension timing signal. A contract characterized by comprising
Resides in Wonder absorption circuit according to Motomeko 1. Summary of the Invention set forth in claim 3, wherein the stretching timing generating means in accordance with the following calculation ^{_{formula, T w <T * 2 N}} ≦ 125us / 8 for determining the stretching timing (N = integer) ^{2 N:} stretching Timing T _w : Maximum wander generation time T: Input clock cycle (1 clock time) T * 2 ^N : A cycle after extension of one clock cycle. The wander absorbing circuit according to claim 1 or 2 . The gist of the invention of claim 4 is the claim
The present invention resides in a digital communication device including the wander absorbing circuit according to any one of 1 to 3 . A fifth aspect of the present invention resides in a telephone including the wander absorbing circuit according to any one of the first to third aspects.

[0010]

1 is a block diagram showing the internal structure of a wander absorbing circuit 10 in PCM multiplex transmission according to the present invention. A frame head holding circuit 11, a clock holding circuit 12, a PCM data holding circuit 13, an extension timing generation circuit 14, a PCM channel selection circuit 15, and a wander generation maximum time setting circuit 16 are provided.

The frame head holding circuit 11, the clock holding circuit 12, and the PCM data holding circuit 13 are supplied with the frame head, the clock, and PCM-multiplexed data, respectively. The PCM channel selection circuit 15 is a PC which is desired to perform wander absorption from the outside through the signal line 151.
Set M channel. Similarly, in the wander generation maximum time setting circuit 16, the wander generation maximum time generated in the system to which the present invention is applied is set from the outside through the signal line 161. A frame head through the signal line 111 and a clock through the signal line 121 are input to the stretch timing setting circuit 14 in order to count the stretch timing. Further, the PCM channel designated through the signal line 152 and the wander generation maximum time designated through the signal line 162 are input.

The expansion timing generation circuit 14 calculates and generates an appropriate expansion timing from the above-mentioned input signal, and outputs the expansion timing through the signal line 143 to the frame head holding circuit 11, the clock holding circuit 12, the PCM data holding circuit 13. Will be notified. In addition, the PCM channel selection circuit 15 determines whether the designated PCM channel is optimum as a result of calculation.
Notification is made through the signal line 144.

The output of the present invention is the output from the frame head holding circuit 11 through the signal line 112, the stretched frame head, the stretched clock from the clock holding circuit 12 through the signal line 122, and the signal line. The data after being expanded from the PCM data holding circuit 13 through 132.

FIG. 2 shows an example of a normal time chart in which no wander is generated when 64 CHbps data is multiplexed on 32 channels at a speed of 2.048 Mbps.
The time chart shows a frame head 21 of 8 KHz, a clock 22 of 2.048 MHz and 2.048 Mbps.
3 shows the temporal relationship of the PCM data 23 of FIG.

FIG. 3 shows a time chart in the case where a wander is generated in the frame head when 64 CHbps data is multiplexed on 32 channels at a speed of 2.048 Mbps. The time chart shows a frame head 31 of 8 KHz, a clock 32 of 2.048 MHz and 2.048 M.
The temporal relationship of the bps data 33 is shown. The 8 KHz frame head 31 is 2.048 MHz in comparison with the normal time chart in which no wander is generated in FIG.
The figure shows a state in which the z1 clock is positioned ahead in time. That is, this is the state in which wonder has occurred.

FIG. 4 shows a result of actually measuring a wander generated in an actual system with an oscilloscope. The frame head and clock generated by wonder are shown. The frame head generates a wander that is deviated from the normal position by about 1 clock before and after.

FIG. 5 shows an example of a time chart of the input signal and the output signal in FIG. As an input signal, a frame head (signal line 111), a clock (signal line 121),
The time chart of the signal of the frame head (signal line 112), the clock (signal line 122), and the data (signal line 132) as an output signal of the data (signal line 131) is shown.
The time relationship between the input signal and the output signal when the expansion timing is two times and four times is shown. FIG. 7 shows an application example of the present invention.

Next, the operation of the circuit shown in FIG. 1 will be described. , FIG. FIG. 1 is a block diagram showing an internal configuration of a wander absorbing circuit in PCM multiplex transmission of the present invention, in which a frame head holding circuit 11, a clock holding circuit 12, a PCM data holding circuit 13, an extension timing generation circuit 14, and a PCM channel selection. Circuit 15
And a wander generation maximum time setting circuit 16.

An 8 KHz frame head is supplied to the frame head holding circuit 11 through the signal line 111, a clock for PCM multiplexing is supplied to the clock holding circuit 12 through the signal line 121, and a signal line 1 is supplied to the PCM data holding circuit 13.
PCM multiplex data is input through 31.

The transmission of PCM multiplexed data is usually 8 KH
z frame head, clock and PCM data. In the PCM channel selection circuit 15, a PCM channel for performing wander absorption is set from the outside through a signal line 151. This is because the time axis is stretched within one frame of PCM of 8 KHz, so that it is not possible to temporally stretch all multiplexed channels, and a specific PCM channel to be subjected to wander absorption is designated. This is because.

Similarly, the wander generation maximum time setting circuit 16
Also, the wander generation maximum time generated in the system to which the present invention is applied is set from the outside through the signal line 161. This determines whether or not the wander for the channel designated by the PCM channel selection circuit 15 can be absorbed.
This is because the expansion timing generation circuit 14 performs this.
A numerical value designation method for the circuit from the outside is, for example, a CPU
It may be performed from the data bus of.

In the expansion timing setting circuit 14,
Signal line 1 is used to count the stretch timing.
A frame head through 11 and a clock through a signal line 121 are input. Further, the specified PCM channel through the signal line 152 and the maximum wander generation time through the signal line 162 are input.

The stretch timing generation circuit 14 calculates and generates an appropriate stretch timing from the above-mentioned input signal, and sends the stretch timing signal line 143 to the frame head holding circuit 11, the clock holding circuit 12, and the PCM data holding circuit 13. Notify through. Also,
The PCM channel selection circuit 15 is notified through the signal line 152 whether the designated PCM channel number is appropriate as a result of the calculation.

Below, the expansion timing generation circuit 1
The calculation method of the stretch timing within 4 will be described. The extension time is an exponential multiple of 2 of the input clock rate because it is created by dividing the input clock. The frequency division timing is determined according to the following calculation formula. T _w <T × 2 ^N ≦ 125 us / 8 (N = 1, 2, 3, 4, 5) 2 ^N : stretching timing (stretching multiple), T _w : wander generation maximum time. T: Input clock cycle (1 clock time). T × 2 ^N : Cycle after stretching one clock cycle. 125us / 8: 8KHz 1 frame period 125us
1 clock cycle when 8 bits for 1 channel are extended in time and transmitted.

In the above equation, the clock cycle after stretching
The minimum value of T × 2 ^N ″ is the time during which the maximum wander can be absorbed, and the maximum value is one clock cycle when transmitting one channel in one frame.

In the above equation, "T × 2 ^N " indicates an integral multiple of the clock period. The frame head and data are usually
Since the data is transmitted in one clock cycle, if one clock cycle is long in time, there is a timing margin for the clock to process the frame head and data even if a temporal fluctuation called wander occurs. Therefore, if the value of “T × 2 ^N ” is longer than the wander generation maximum time, the wander can be absorbed. For example, here, T _w : Wonder generation maximum time = 1us T: Input clock period (1 clock time) = 488
If ns (2.048 MHZ) is set, the above formula is 1us <488ns × ^2N ≦ 15us, and N = 2 is obtained. Therefore, from here, stretching timing (stretching ^{multiples) = 2 N = 2 2 =} 4 times become.

The stretch timing generation circuit 14 performs the above calculation, and uses this timing and the input frame head and clock to generate a stretch timing by a counter circuit or the like. The generated timing is transmitted via the signal line 143 to the frame head holding circuit 1
1, a clock holding circuit 12, and a PCM data holding circuit 13
To notify.

The frame head holding circuit 11, the clock holding circuit 12, and the PCM data holding circuit 13 relatively stretch the time axis according to the stretching timing. Stretched frame head, clock, PCM
The data is output through the signal lines 112, 122 and 132, respectively.

FIG. 5 shows a time chart of the input and output signals. The time chart shows an example of a time chart stretched to 2 times and 4 times. Further, FIG. 6 shows a time chart explaining the increase of the wander absorption time due to stretching. This shows the increase in wonder absorption time before stretching, after 2 times stretching and after 4 times stretching. Crops by increasing the enlargement ratio
The timing of the frame head
And Tsetup of data and Tho
The absolute value of ld (hold time) increases,
It shows that the margin of the equipment becomes higher.

FIG. 7 shows one application example of the wander absorbing circuit of the present invention.

The PCM transmission apparatus A (master) 50 has a wander absorbing circuit 10, a PCM multiplexing circuit 52, a PCM separating circuit 53, and a frame head / clock generating circuit 54 as an internal configuration. At the time of transmission, the wander absorption circuit 10 in the PCM transmission apparatus A (master) 50 receives the PCM multiplex data of the PCM multiplex circuit 52, absorbs the wander, and the PCM of the PCM transmission apparatus B (slave) 55.
The PCM multiplexed data is transmitted to the separation circuit 56 via the signal line 511. The frame head and clock are received from the frame head / clock generation circuit 54 for timing generation. Further, at the time of reception, the PCM multiplex data of the wander absorbing circuit 57 of the PCM transmission device B (slave) 55 is received by the PCM separation circuit 53 via the signal line 571.

Similarly, the PCM transmission device B (slave) 5
Reference numeral 5 indicates the internal structure of the wonder absorption circuit 10 and the PCM.
It has a multiplexing circuit 58 and a PCM separation circuit 56. At the time of transmission, the wander absorbing circuit 10 in the PCM transmission apparatus B (slave) 55 supplies the PCM multiplexed data of the PCM multiplexing circuit 58, the frame head and the clock to the signal line 5 respectively.
It is received from the frame head / clock generation circuit 54 via 41 and 542 to absorb the wonder.

Since the wander absorbing circuit according to the embodiment is constructed as described above, it has the following effects.

According to the present invention, in PCM multiplex transmission, a PC for designating a specific channel for which wander is desired to be absorbed
An M channel selection circuit 15 and a wander generation maximum time setting circuit 16 capable of externally setting the wander generation maximum time are provided, and the frame head, clock, and data are temporally stretched according to the conditions specified by these two circuits. Circuit that absorbs the generated wander (11, 1
2, 13, 14), it is possible to prevent out-of-sync of data and perform normal data transmission.

In the present embodiment, the present invention is not limited to this, and can be suitably applied in applying the present invention.

Further, the number, positions, shapes, etc. of the above-mentioned constituent members are not limited to those in the above-mentioned embodiment, and the numbers, positions, shapes, etc. suitable for carrying out the present invention can be adopted.

In each drawing, the same components are designated by the same reference numerals.

[0038]

Since the present invention is configured as described above, it has the following effects. Firstly, there is an effect that it is possible to prevent out-of-sync of data due to occurrence of a wander that cannot be absorbed by the conventional method.

Secondly, since it is possible to externally set the PCM channel and set the maximum time of the wander and automatically set the optimum extension timing, it is possible to perform data transmission efficiently and with a minimum loss. Becomes

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of an embodiment of the present invention.

FIG. 2 is data representing an example of a time chart during PCM multiplex transmission.

FIG. 3 is a time chart showing an example when a wander occurs in the frame head in FIG.

FIG. 4 is data obtained by actually measuring an example of a wander generated in an existing system with an oscilloscope.

5 is a time chart showing the relationship between input signals and output signals of the frame head holding circuit 11, the clock holding circuit 12, and the PCM data holding circuit 13 of the present invention shown in FIG.

FIG. 6 is a time chart explaining an increase in wander absorption time due to stretching.

FIG. 7 is an example of application of the wonder absorption circuit 10 of the present invention shown in FIG.

[Explanation of symbols]

10 Wonder absorption circuit 11 Frame head holding circuit 12 clock holding circuit 13 PCM data holding circuit 14 Stretch timing generation circuit 15 PCM channel selection circuit 16 Wonder generation maximum time setting circuit 21 frame head 22 2.048MHz clock 23 PCM data 31 frame head 32 2.048MHz clock 33 data 50 PCM transmission device A (master) 51 Wonder absorption circuit 52 PCM multiplex circuit 53 PCM separation circuit 54 frame head / clock generation circuit 55 PCM transmission device B (slave) 56 PCM separation circuit 57 Wonder absorption circuit 58 PCM multiplex circuit 111,112 signal line 121, 122 signal line 131, 132 signal line 143, 144 signal lines 151-153 signal lines 161 and 162 signal lines 511 signal line 541 signal line 542 signal line 571 signal line

Claims (5)

(57) [Claims] 1. A wander absorbing circuit for absorbing a wander generated in digital communication, which receives and holds a frame head, a clock and data.
Holding means for extending and outputting those cycles in accordance with a stretch timing signal, determining a dividing timing capable of absorbing a wander, calculating a stretching multiple of the cycle from the dividing timing, and expressing the stretching multiple. generates a stretched timing signal, and stretching the timing generation means for outputting to said holding means, with respect to the stretching timing generation means, selecting channels
The generation and output of the stretch timing signal to the
For the channel selection means shown and the expansion timing generation means,
A wander absorbing circuit, comprising: an output unit that sets and outputs a raw maximum time . 2. The holding means receives and holds the frame head, and extends and outputs a cycle of the frame head according to the extension timing signal, and a frame head holding circuit that receives and holds the clock, and A clock holding circuit that extends and outputs a cycle according to the extension timing signal; and a data holding circuit that receives and holds the data and extends and outputs the cycle according to the extension timing signal. The wander absorbing circuit according to claim 1, which is characterized in that. 3. The enlargement timing generation means includes:
According to the following ^{_{equation, T w <T * 2 N}} ≦ 125us / 8 for determining the stretching timing (N = integer) ^{2 N:} stretching Timing _T w: Wonder generating maximum time T: input clock period (1 clock time) 3. The wander absorbing circuit according to claim 1 or 2 , wherein T * 2 ^{N is} a cycle after extension of one clock cycle. 4. A digital communication device comprising the wander absorbing circuit according to claim 1 . 5. A telephone equipped with the wander absorbing circuit according to claim 1 .